3  * PCIe host controller driver for UniPhier SoCs
23 #include "pcie-designware.h"
75 static void uniphier_pcie_ltssm_enable(struct uniphier_pcie *pcie,  in uniphier_pcie_ltssm_enable()  argument
80 	val = readl(pcie->base + PCL_APP_READY_CTRL);  in uniphier_pcie_ltssm_enable()
85 	writel(val, pcie->base + PCL_APP_READY_CTRL);  in uniphier_pcie_ltssm_enable()
88 static void uniphier_pcie_init_rc(struct uniphier_pcie *pcie)  in uniphier_pcie_init_rc()  argument
93 	val = readl(pcie->base + PCL_MODE);  in uniphier_pcie_init_rc()
96 	writel(val, pcie->base + PCL_MODE);  in uniphier_pcie_init_rc()
99 	val = readl(pcie->base + PCL_APP_PM0);  in uniphier_pcie_init_rc()
101 	writel(val, pcie->base + PCL_APP_PM0);  in uniphier_pcie_init_rc()
104 	val = readl(pcie->base + PCL_PINCTRL0);  in uniphier_pcie_init_rc()
109 	writel(val, pcie->base + PCL_PINCTRL0);  in uniphier_pcie_init_rc()
111 	uniphier_pcie_ltssm_enable(pcie, false);  in uniphier_pcie_init_rc()
116 	val = readl(pcie->base + PCL_PINCTRL0);  in uniphier_pcie_init_rc()
118 	writel(val, pcie->base + PCL_PINCTRL0);  in uniphier_pcie_init_rc()
121 static int uniphier_pcie_wait_rc(struct uniphier_pcie *pcie)  in uniphier_pcie_wait_rc()  argument
127 	ret = readl_poll_timeout(pcie->base + PCL_PIPEMON, status,  in uniphier_pcie_wait_rc()
130 		dev_err(pcie->pci.dev,  in uniphier_pcie_wait_rc()
140 	struct uniphier_pcie *pcie = to_uniphier_pcie(pci);  in uniphier_pcie_link_up()  local
143 	val = readl(pcie->base + PCL_STATUS_LINK);  in uniphier_pcie_link_up()
151 	struct uniphier_pcie *pcie = to_uniphier_pcie(pci);  in uniphier_pcie_start_link()  local
153 	uniphier_pcie_ltssm_enable(pcie, true);  in uniphier_pcie_start_link()
160 	struct uniphier_pcie *pcie = to_uniphier_pcie(pci);  in uniphier_pcie_stop_link()  local
162 	uniphier_pcie_ltssm_enable(pcie, false);  in uniphier_pcie_stop_link()
165 static void uniphier_pcie_irq_enable(struct uniphier_pcie *pcie)  in uniphier_pcie_irq_enable()  argument
167 	writel(PCL_RCV_INT_ALL_ENABLE, pcie->base + PCL_RCV_INT);  in uniphier_pcie_irq_enable()
168 	writel(PCL_RCV_INTX_ALL_ENABLE, pcie->base + PCL_RCV_INTX);  in uniphier_pcie_irq_enable()
176 	struct uniphier_pcie *pcie = to_uniphier_pcie(pci);  in uniphier_pcie_irq_mask()  local
182 	val = readl(pcie->base + PCL_RCV_INTX);  in uniphier_pcie_irq_mask()
184 	writel(val, pcie->base + PCL_RCV_INTX);  in uniphier_pcie_irq_mask()
193 	struct uniphier_pcie *pcie = to_uniphier_pcie(pci);  in uniphier_pcie_irq_unmask()  local
199 	val = readl(pcie->base + PCL_RCV_INTX);  in uniphier_pcie_irq_unmask()
201 	writel(val, pcie->base + PCL_RCV_INTX);  in uniphier_pcie_irq_unmask()
230 	struct uniphier_pcie *pcie = to_uniphier_pcie(pci);  in uniphier_pcie_irq_handler()  local
236 	val = readl(pcie->base + PCL_RCV_INT);  in uniphier_pcie_irq_handler()
247 	writel(val, pcie->base + PCL_RCV_INT);  in uniphier_pcie_irq_handler()
252 	val = readl(pcie->base + PCL_RCV_INTX);  in uniphier_pcie_irq_handler()
256 		generic_handle_domain_irq(pcie->intx_irq_domain, bit);  in uniphier_pcie_irq_handler()
264 	struct uniphier_pcie *pcie = to_uniphier_pcie(pci);  in uniphier_pcie_config_intx_irq()  local
282 	pcie->intx_irq_domain = irq_domain_add_linear(np_intc, PCI_NUM_INTX,  in uniphier_pcie_config_intx_irq()
284 	if (!pcie->intx_irq_domain) {  in uniphier_pcie_config_intx_irq()
301 	struct uniphier_pcie *pcie = to_uniphier_pcie(pci);  in uniphier_pcie_host_init()  local
308 	uniphier_pcie_irq_enable(pcie);  in uniphier_pcie_host_init()
317 static int uniphier_pcie_host_enable(struct uniphier_pcie *pcie)  in uniphier_pcie_host_enable()  argument
321 	ret = clk_prepare_enable(pcie->clk);  in uniphier_pcie_host_enable()
325 	ret = reset_control_deassert(pcie->rst);  in uniphier_pcie_host_enable()
329 	uniphier_pcie_init_rc(pcie);  in uniphier_pcie_host_enable()
331 	ret = phy_init(pcie->phy);  in uniphier_pcie_host_enable()
335 	ret = uniphier_pcie_wait_rc(pcie);  in uniphier_pcie_host_enable()
342 	phy_exit(pcie->phy);  in uniphier_pcie_host_enable()
344 	reset_control_assert(pcie->rst);  in uniphier_pcie_host_enable()
346 	clk_disable_unprepare(pcie->clk);  in uniphier_pcie_host_enable()
360 	struct uniphier_pcie *pcie;  in uniphier_pcie_probe()  local
363 	pcie = devm_kzalloc(dev, sizeof(*pcie), GFP_KERNEL);  in uniphier_pcie_probe()
364 	if (!pcie)  in uniphier_pcie_probe()
367 	pcie->pci.dev = dev;  in uniphier_pcie_probe()
368 	pcie->pci.ops = &dw_pcie_ops;  in uniphier_pcie_probe()
370 	pcie->base = devm_platform_ioremap_resource_byname(pdev, "link");  in uniphier_pcie_probe()
371 	if (IS_ERR(pcie->base))  in uniphier_pcie_probe()
372 		return PTR_ERR(pcie->base);  in uniphier_pcie_probe()
374 	pcie->clk = devm_clk_get(dev, NULL);  in uniphier_pcie_probe()
375 	if (IS_ERR(pcie->clk))  in uniphier_pcie_probe()
376 		return PTR_ERR(pcie->clk);  in uniphier_pcie_probe()
378 	pcie->rst = devm_reset_control_get_shared(dev, NULL);  in uniphier_pcie_probe()
379 	if (IS_ERR(pcie->rst))  in uniphier_pcie_probe()
380 		return PTR_ERR(pcie->rst);  in uniphier_pcie_probe()
382 	pcie->phy = devm_phy_optional_get(dev, "pcie-phy");  in uniphier_pcie_probe()
383 	if (IS_ERR(pcie->phy))  in uniphier_pcie_probe()
384 		return PTR_ERR(pcie->phy);  in uniphier_pcie_probe()
386 	platform_set_drvdata(pdev, pcie);  in uniphier_pcie_probe()
388 	ret = uniphier_pcie_host_enable(pcie);  in uniphier_pcie_probe()
392 	pcie->pci.pp.ops = &uniphier_pcie_host_ops;  in uniphier_pcie_probe()
394 	return dw_pcie_host_init(&pcie->pci.pp);  in uniphier_pcie_probe()
398 	{ .compatible = "socionext,uniphier-pcie", },
405 		.name = "uniphier-pcie",