Lines Matching +full:axg +full:- +full:pcie +full:- +full:phy
1 // SPDX-License-Identifier: GPL-2.0
3 * PCIe host controller driver for Amlogic MESON SoCs
17 #include <linux/phy/phy.h>
21 #include "pcie-designware.h"
23 #define to_meson_pcie(x) dev_get_drvdata((x)->dev)
28 /* PCIe specific config registers */
72 struct phy *phy; member
79 struct device *dev = mp->pci.dev; in meson_pcie_get_reset()
92 struct meson_pcie_rc_reset *mrst = &mp->mrst; in meson_pcie_get_resets()
94 mrst->port = meson_pcie_get_reset(mp, "port", PCIE_NORMAL_RESET); in meson_pcie_get_resets()
95 if (IS_ERR(mrst->port)) in meson_pcie_get_resets()
96 return PTR_ERR(mrst->port); in meson_pcie_get_resets()
97 reset_control_deassert(mrst->port); in meson_pcie_get_resets()
99 mrst->apb = meson_pcie_get_reset(mp, "apb", PCIE_SHARED_RESET); in meson_pcie_get_resets()
100 if (IS_ERR(mrst->apb)) in meson_pcie_get_resets()
101 return PTR_ERR(mrst->apb); in meson_pcie_get_resets()
102 reset_control_deassert(mrst->apb); in meson_pcie_get_resets()
110 struct dw_pcie *pci = &mp->pci; in meson_pcie_get_mems()
112 pci->dbi_base = devm_platform_ioremap_resource_byname(pdev, "elbi"); in meson_pcie_get_mems()
113 if (IS_ERR(pci->dbi_base)) in meson_pcie_get_mems()
114 return PTR_ERR(pci->dbi_base); in meson_pcie_get_mems()
116 mp->cfg_base = devm_platform_ioremap_resource_byname(pdev, "cfg"); in meson_pcie_get_mems()
117 if (IS_ERR(mp->cfg_base)) in meson_pcie_get_mems()
118 return PTR_ERR(mp->cfg_base); in meson_pcie_get_mems()
127 ret = phy_init(mp->phy); in meson_pcie_power_on()
131 ret = phy_power_on(mp->phy); in meson_pcie_power_on()
133 phy_exit(mp->phy); in meson_pcie_power_on()
142 phy_power_off(mp->phy); in meson_pcie_power_off()
143 phy_exit(mp->phy); in meson_pcie_power_off()
148 struct meson_pcie_rc_reset *mrst = &mp->mrst; in meson_pcie_reset()
151 ret = phy_reset(mp->phy); in meson_pcie_reset()
155 reset_control_assert(mrst->port); in meson_pcie_reset()
156 reset_control_assert(mrst->apb); in meson_pcie_reset()
158 reset_control_deassert(mrst->port); in meson_pcie_reset()
159 reset_control_deassert(mrst->apb); in meson_pcie_reset()
203 struct device *dev = mp->pci.dev; in meson_pcie_probe_clocks()
204 struct meson_pcie_clk_res *res = &mp->clk_res; in meson_pcie_probe_clocks()
206 res->port_clk = meson_pcie_probe_clock(dev, "port", PORT_CLK_RATE); in meson_pcie_probe_clocks()
207 if (IS_ERR(res->port_clk)) in meson_pcie_probe_clocks()
208 return PTR_ERR(res->port_clk); in meson_pcie_probe_clocks()
210 res->general_clk = meson_pcie_probe_clock(dev, "general", 0); in meson_pcie_probe_clocks()
211 if (IS_ERR(res->general_clk)) in meson_pcie_probe_clocks()
212 return PTR_ERR(res->general_clk); in meson_pcie_probe_clocks()
214 res->clk = meson_pcie_probe_clock(dev, "pclk", 0); in meson_pcie_probe_clocks()
215 if (IS_ERR(res->clk)) in meson_pcie_probe_clocks()
216 return PTR_ERR(res->clk); in meson_pcie_probe_clocks()
223 return readl(mp->cfg_base + reg); in meson_cfg_readl()
228 writel(val, mp->cfg_base + reg); in meson_cfg_writel()
233 gpiod_set_value_cansleep(mp->reset_gpio, 1); in meson_pcie_assert_reset()
235 gpiod_set_value_cansleep(mp->reset_gpio, 0); in meson_pcie_assert_reset()
249 struct device *dev = mp->pci.dev; in meson_size_to_payload()
261 return fls(size) - 8; in meson_size_to_payload()
266 struct dw_pcie *pci = &mp->pci; in meson_set_max_payload()
282 struct dw_pcie *pci = &mp->pci; in meson_set_max_rd_req_size()
316 * There is a bug in the MESON AXG PCIe controller whereby software in meson_pcie_rd_own_conf()
322 *val = (*val & ((1 << (size * 8)) - 1)) << (8 * (where & 3)); in meson_pcie_rd_own_conf()
326 *val = (*val >> (8 * (where & 3))) & ((1 << (size * 8)) - 1); in meson_pcie_rd_own_conf()
341 struct device *dev = pci->dev; in meson_pcie_link_up()
382 pp->bridge->ops = &meson_pci_ops; in meson_pcie_host_init()
401 struct device *dev = &pdev->dev; in meson_pcie_probe()
408 return -ENOMEM; in meson_pcie_probe()
410 pci = &mp->pci; in meson_pcie_probe()
411 pci->dev = dev; in meson_pcie_probe()
412 pci->ops = &dw_pcie_ops; in meson_pcie_probe()
413 pci->pp.ops = &meson_pcie_host_ops; in meson_pcie_probe()
414 pci->num_lanes = 1; in meson_pcie_probe()
416 mp->phy = devm_phy_get(dev, "pcie"); in meson_pcie_probe()
417 if (IS_ERR(mp->phy)) { in meson_pcie_probe()
418 dev_err(dev, "get phy failed, %ld\n", PTR_ERR(mp->phy)); in meson_pcie_probe()
419 return PTR_ERR(mp->phy); in meson_pcie_probe()
422 mp->reset_gpio = devm_gpiod_get(dev, "reset", GPIOD_OUT_LOW); in meson_pcie_probe()
423 if (IS_ERR(mp->reset_gpio)) { in meson_pcie_probe()
425 return PTR_ERR(mp->reset_gpio); in meson_pcie_probe()
442 dev_err(dev, "phy power on failed, %d\n", ret); in meson_pcie_probe()
460 ret = dw_pcie_host_init(&pci->pp); in meson_pcie_probe()
462 dev_err(dev, "Add PCIe port failed, %d\n", ret); in meson_pcie_probe()
475 .compatible = "amlogic,axg-pcie",
478 .compatible = "amlogic,g12a-pcie",
487 .name = "meson-pcie",
495 MODULE_DESCRIPTION("Amlogic PCIe Controller driver");