Lines Matching +full:syscon +full:- +full:pcie +full:- +full:mode

1 // SPDX-License-Identifier: GPL-2.0
3 * pci-j721e - PCIe controller driver for TI's J721E SoCs
5 * Copyright (C) 2020 Texas Instruments Incorporated - http://www.ti.com
10 #include <linux/clk-provider.h>
17 #include <linux/mfd/syscon.h>
25 #include "pcie-cadence.h"
27 #define cdns_pcie_to_rc(p) container_of(p, struct cdns_pcie_rc, pcie)
57 u32 mode; member
72 enum j721e_pcie_mode mode; member
81 static inline u32 j721e_pcie_user_readl(struct j721e_pcie *pcie, u32 offset) in j721e_pcie_user_readl() argument
83 return readl(pcie->user_cfg_base + offset); in j721e_pcie_user_readl()
86 static inline void j721e_pcie_user_writel(struct j721e_pcie *pcie, u32 offset, in j721e_pcie_user_writel() argument
89 writel(value, pcie->user_cfg_base + offset); in j721e_pcie_user_writel()
92 static inline u32 j721e_pcie_intd_readl(struct j721e_pcie *pcie, u32 offset) in j721e_pcie_intd_readl() argument
94 return readl(pcie->intd_cfg_base + offset); in j721e_pcie_intd_readl()
97 static inline void j721e_pcie_intd_writel(struct j721e_pcie *pcie, u32 offset, in j721e_pcie_intd_writel() argument
100 writel(value, pcie->intd_cfg_base + offset); in j721e_pcie_intd_writel()
105 struct j721e_pcie *pcie = priv; in j721e_pcie_link_irq_handler() local
106 struct device *dev = pcie->cdns_pcie->dev; in j721e_pcie_link_irq_handler()
109 reg = j721e_pcie_intd_readl(pcie, STATUS_REG_SYS_2); in j721e_pcie_link_irq_handler()
110 if (!(reg & pcie->linkdown_irq_regfield)) in j721e_pcie_link_irq_handler()
115 j721e_pcie_intd_writel(pcie, STATUS_CLR_REG_SYS_2, pcie->linkdown_irq_regfield); in j721e_pcie_link_irq_handler()
119 static void j721e_pcie_config_link_irq(struct j721e_pcie *pcie) in j721e_pcie_config_link_irq() argument
123 reg = j721e_pcie_intd_readl(pcie, ENABLE_REG_SYS_2); in j721e_pcie_config_link_irq()
124 reg |= pcie->linkdown_irq_regfield; in j721e_pcie_config_link_irq()
125 j721e_pcie_intd_writel(pcie, ENABLE_REG_SYS_2, reg); in j721e_pcie_config_link_irq()
130 struct j721e_pcie *pcie = dev_get_drvdata(cdns_pcie->dev); in j721e_pcie_start_link() local
133 reg = j721e_pcie_user_readl(pcie, J721E_PCIE_USER_CMD_STATUS); in j721e_pcie_start_link()
135 j721e_pcie_user_writel(pcie, J721E_PCIE_USER_CMD_STATUS, reg); in j721e_pcie_start_link()
142 struct j721e_pcie *pcie = dev_get_drvdata(cdns_pcie->dev); in j721e_pcie_stop_link() local
145 reg = j721e_pcie_user_readl(pcie, J721E_PCIE_USER_CMD_STATUS); in j721e_pcie_stop_link()
147 j721e_pcie_user_writel(pcie, J721E_PCIE_USER_CMD_STATUS, reg); in j721e_pcie_stop_link()
152 struct j721e_pcie *pcie = dev_get_drvdata(cdns_pcie->dev); in j721e_pcie_link_up() local
155 reg = j721e_pcie_user_readl(pcie, J721E_PCIE_USER_LINKSTATUS); in j721e_pcie_link_up()
169 static int j721e_pcie_set_mode(struct j721e_pcie *pcie, struct regmap *syscon, in j721e_pcie_set_mode() argument
172 struct device *dev = pcie->cdns_pcie->dev; in j721e_pcie_set_mode()
174 u32 mode = pcie->mode; in j721e_pcie_set_mode() local
178 if (mode == PCI_MODE_RC) in j721e_pcie_set_mode()
181 ret = regmap_update_bits(syscon, offset, mask, val); in j721e_pcie_set_mode()
183 dev_err(dev, "failed to set pcie mode\n"); in j721e_pcie_set_mode()
188 static int j721e_pcie_set_link_speed(struct j721e_pcie *pcie, in j721e_pcie_set_link_speed() argument
189 struct regmap *syscon, unsigned int offset) in j721e_pcie_set_link_speed() argument
191 struct device *dev = pcie->cdns_pcie->dev; in j721e_pcie_set_link_speed()
192 struct device_node *np = dev->of_node; in j721e_pcie_set_link_speed()
201 val = link_speed - 1; in j721e_pcie_set_link_speed()
202 ret = regmap_update_bits(syscon, offset, GENERATION_SEL_MASK, val); in j721e_pcie_set_link_speed()
209 static int j721e_pcie_set_lane_count(struct j721e_pcie *pcie, in j721e_pcie_set_lane_count() argument
210 struct regmap *syscon, unsigned int offset) in j721e_pcie_set_lane_count() argument
212 struct device *dev = pcie->cdns_pcie->dev; in j721e_pcie_set_lane_count()
213 u32 lanes = pcie->num_lanes; in j721e_pcie_set_lane_count()
218 if (pcie->max_lanes == 4) in j721e_pcie_set_lane_count()
221 val = LANE_COUNT(lanes - 1); in j721e_pcie_set_lane_count()
222 ret = regmap_update_bits(syscon, offset, mask, val); in j721e_pcie_set_lane_count()
229 static int j721e_enable_acspcie_refclk(struct j721e_pcie *pcie, in j721e_enable_acspcie_refclk() argument
230 struct regmap *syscon) in j721e_enable_acspcie_refclk() argument
232 struct device *dev = pcie->cdns_pcie->dev; in j721e_enable_acspcie_refclk()
233 struct device_node *node = dev->of_node; in j721e_enable_acspcie_refclk()
240 "ti,syscon-acspcie-proxy-ctrl", in j721e_enable_acspcie_refclk()
244 "ti,syscon-acspcie-proxy-ctrl has invalid arguments\n"); in j721e_enable_acspcie_refclk()
250 ret = regmap_update_bits(syscon, 0, mask, val); in j721e_enable_acspcie_refclk()
259 static int j721e_pcie_ctrl_init(struct j721e_pcie *pcie) in j721e_pcie_ctrl_init() argument
261 struct device *dev = pcie->cdns_pcie->dev; in j721e_pcie_ctrl_init()
262 struct device_node *node = dev->of_node; in j721e_pcie_ctrl_init()
265 struct regmap *syscon; in j721e_pcie_ctrl_init() local
268 syscon = syscon_regmap_lookup_by_phandle(node, "ti,syscon-pcie-ctrl"); in j721e_pcie_ctrl_init()
269 if (IS_ERR(syscon)) { in j721e_pcie_ctrl_init()
270 dev_err(dev, "Unable to get ti,syscon-pcie-ctrl regmap\n"); in j721e_pcie_ctrl_init()
271 return PTR_ERR(syscon); in j721e_pcie_ctrl_init()
275 ret = of_parse_phandle_with_fixed_args(node, "ti,syscon-pcie-ctrl", 1, in j721e_pcie_ctrl_init()
280 ret = j721e_pcie_set_mode(pcie, syscon, offset); in j721e_pcie_ctrl_init()
282 dev_err(dev, "Failed to set pci mode\n"); in j721e_pcie_ctrl_init()
286 ret = j721e_pcie_set_link_speed(pcie, syscon, offset); in j721e_pcie_ctrl_init()
292 ret = j721e_pcie_set_lane_count(pcie, syscon, offset); in j721e_pcie_ctrl_init()
294 dev_err(dev, "Failed to set num-lanes\n"); in j721e_pcie_ctrl_init()
299 syscon = syscon_regmap_lookup_by_phandle_optional(node, in j721e_pcie_ctrl_init()
300 "ti,syscon-acspcie-proxy-ctrl"); in j721e_pcie_ctrl_init()
301 if (!syscon) in j721e_pcie_ctrl_init()
304 return j721e_enable_acspcie_refclk(pcie, syscon); in j721e_pcie_ctrl_init()
334 .mode = PCI_MODE_RC,
342 .mode = PCI_MODE_EP,
348 .mode = PCI_MODE_RC,
356 .mode = PCI_MODE_EP,
363 .mode = PCI_MODE_RC,
370 .mode = PCI_MODE_EP,
376 .mode = PCI_MODE_RC,
384 .mode = PCI_MODE_EP,
391 .compatible = "ti,j721e-pcie-host",
395 .compatible = "ti,j721e-pcie-ep",
399 .compatible = "ti,j7200-pcie-host",
403 .compatible = "ti,j7200-pcie-ep",
407 .compatible = "ti,am64-pcie-host",
411 .compatible = "ti,am64-pcie-ep",
415 .compatible = "ti,j784s4-pcie-host",
419 .compatible = "ti,j784s4-pcie-ep",
427 struct device *dev = &pdev->dev; in j721e_pcie_probe()
428 struct device_node *node = dev->of_node; in j721e_pcie_probe()
432 struct j721e_pcie *pcie; in j721e_pcie_probe() local
439 u32 mode; in j721e_pcie_probe() local
445 return -EINVAL; in j721e_pcie_probe()
447 mode = (u32)data->mode; in j721e_pcie_probe()
449 pcie = devm_kzalloc(dev, sizeof(*pcie), GFP_KERNEL); in j721e_pcie_probe()
450 if (!pcie) in j721e_pcie_probe()
451 return -ENOMEM; in j721e_pcie_probe()
453 switch (mode) { in j721e_pcie_probe()
456 return -ENODEV; in j721e_pcie_probe()
460 return -ENOMEM; in j721e_pcie_probe()
462 if (!data->byte_access_allowed) in j721e_pcie_probe()
463 bridge->ops = &cdns_ti_pcie_host_ops; in j721e_pcie_probe()
465 rc->quirk_retrain_flag = data->quirk_retrain_flag; in j721e_pcie_probe()
466 rc->quirk_detect_quiet_flag = data->quirk_detect_quiet_flag; in j721e_pcie_probe()
468 cdns_pcie = &rc->pcie; in j721e_pcie_probe()
469 cdns_pcie->dev = dev; in j721e_pcie_probe()
470 cdns_pcie->ops = &j721e_pcie_ops; in j721e_pcie_probe()
471 pcie->cdns_pcie = cdns_pcie; in j721e_pcie_probe()
475 return -ENODEV; in j721e_pcie_probe()
479 return -ENOMEM; in j721e_pcie_probe()
481 ep->quirk_detect_quiet_flag = data->quirk_detect_quiet_flag; in j721e_pcie_probe()
482 ep->quirk_disable_flr = data->quirk_disable_flr; in j721e_pcie_probe()
484 cdns_pcie = &ep->pcie; in j721e_pcie_probe()
485 cdns_pcie->dev = dev; in j721e_pcie_probe()
486 cdns_pcie->ops = &j721e_pcie_ops; in j721e_pcie_probe()
487 pcie->cdns_pcie = cdns_pcie; in j721e_pcie_probe()
490 dev_err(dev, "INVALID device type %d\n", mode); in j721e_pcie_probe()
494 pcie->mode = mode; in j721e_pcie_probe()
495 pcie->linkdown_irq_regfield = data->linkdown_irq_regfield; in j721e_pcie_probe()
500 pcie->intd_cfg_base = base; in j721e_pcie_probe()
505 pcie->user_cfg_base = base; in j721e_pcie_probe()
507 ret = of_property_read_u32(node, "num-lanes", &num_lanes); in j721e_pcie_probe()
508 if (ret || num_lanes > data->max_lanes) { in j721e_pcie_probe()
509 dev_warn(dev, "num-lanes property not provided or invalid, setting num-lanes to 1\n"); in j721e_pcie_probe()
513 pcie->num_lanes = num_lanes; in j721e_pcie_probe()
514 pcie->max_lanes = data->max_lanes; in j721e_pcie_probe()
517 return -EINVAL; in j721e_pcie_probe()
523 dev_set_drvdata(dev, pcie); in j721e_pcie_probe()
531 ret = j721e_pcie_ctrl_init(pcie); in j721e_pcie_probe()
538 "j721e-pcie-link-down-irq", pcie); in j721e_pcie_probe()
544 j721e_pcie_config_link_irq(pcie); in j721e_pcie_probe()
546 switch (mode) { in j721e_pcie_probe()
553 pcie->reset_gpio = gpiod; in j721e_pcie_probe()
572 pcie->refclk = clk; in j721e_pcie_probe()
577 * 5.1, Section 2.9.2, Symbol "T_PERST-CLK", indicates PERST# in j721e_pcie_probe()
579 * stable. The REFCLK to the connector in RC mode is selected in j721e_pcie_probe()
589 clk_disable_unprepare(pcie->refclk); in j721e_pcie_probe()
622 struct j721e_pcie *pcie = platform_get_drvdata(pdev); in j721e_pcie_remove() local
623 struct cdns_pcie *cdns_pcie = pcie->cdns_pcie; in j721e_pcie_remove()
624 struct device *dev = &pdev->dev; in j721e_pcie_remove()
626 clk_disable_unprepare(pcie->refclk); in j721e_pcie_remove()
634 struct j721e_pcie *pcie = dev_get_drvdata(dev); in j721e_pcie_suspend_noirq() local
636 if (pcie->mode == PCI_MODE_RC) { in j721e_pcie_suspend_noirq()
637 gpiod_set_value_cansleep(pcie->reset_gpio, 0); in j721e_pcie_suspend_noirq()
638 clk_disable_unprepare(pcie->refclk); in j721e_pcie_suspend_noirq()
641 cdns_pcie_disable_phy(pcie->cdns_pcie); in j721e_pcie_suspend_noirq()
648 struct j721e_pcie *pcie = dev_get_drvdata(dev); in j721e_pcie_resume_noirq() local
649 struct cdns_pcie *cdns_pcie = pcie->cdns_pcie; in j721e_pcie_resume_noirq()
652 ret = j721e_pcie_ctrl_init(pcie); in j721e_pcie_resume_noirq()
656 j721e_pcie_config_link_irq(pcie); in j721e_pcie_resume_noirq()
662 ret = cdns_pcie_enable_phy(pcie->cdns_pcie); in j721e_pcie_resume_noirq()
666 if (pcie->mode == PCI_MODE_RC) { in j721e_pcie_resume_noirq()
669 ret = clk_prepare_enable(pcie->refclk); in j721e_pcie_resume_noirq()
676 * 5.1, Section 2.9.2, Symbol "T_PERST-CLK", indicates PERST# in j721e_pcie_resume_noirq()
678 * stable. The REFCLK to the connector in RC mode is selected in j721e_pcie_resume_noirq()
681 if (pcie->reset_gpio) { in j721e_pcie_resume_noirq()
683 gpiod_set_value_cansleep(pcie->reset_gpio, 1); in j721e_pcie_resume_noirq()
688 clk_disable_unprepare(pcie->refclk); in j721e_pcie_resume_noirq()
697 rc->avail_ib_bar[bar] = true; in j721e_pcie_resume_noirq()
701 clk_disable_unprepare(pcie->refclk); in j721e_pcie_resume_noirq()
717 .name = "j721e-pcie",