Lines Matching full:epp
19 * Hardware SPP (a.k.a. compatibility), EPP, and ECP modes are
30 * EPP and ECP mode need to be tested. I currently do not own any
42 * This chip supports SPP, bidirectional, EPP and ECP modes. It has a 16 byte
141 * @eppAddr: EPP Address Register
142 * @eppData0: EPP Data Register 0
143 * @eppData1: EPP Data Register 1
144 * @eppData2: EPP Data Register 2
145 * @eppData3: EPP Data Register 3
179 #define DSR_TIMEOUT (1U << 0) /* EPP timeout */
327 "ECP", "EPP", "???", in parport_ip32_dump_state()
1058 /*--- EPP mode functions -----------------------------------------------*/
1061 * parport_ip32_clear_epp_timeout - clear Timeout bit in EPP mode
1092 * parport_ip32_epp_read - generic EPP read function
1131 * parport_ip32_epp_write - generic EPP write function
1169 * parport_ip32_epp_read_data - read a block of data in EPP mode
1183 * parport_ip32_epp_write_data - write a block of data in EPP mode
1197 * parport_ip32_epp_read_addr - read a block of addresses in EPP mode
1211 * parport_ip32_epp_write_addr - write a block of addresses in EPP mode
1983 * @base: base address of standard and EPP registers
1988 * of the standard and EPP registers are computed from address @base. The
2107 /* Set up access functions to use EPP hardware. */ in parport_ip32_probe_port()
2113 pr_probe(p, "Hardware support for EPP mode enabled\n"); in parport_ip32_probe_port()
2148 printmode(EPP); in parport_ip32_probe_port()
2225 ", bit 3: hardware EPP mode"