1 // SPDX-License-Identifier: GPL-2.0
9 #include <linux/nvmem-provider.h>
39  * The Spreadtrum AP efuse contains 2 parts: normal efuse and secure efuse,
40  * and we can only access the normal efuse in kernel. So define the normal
41  * block offset index and normal block numbers.
50  * Since different Spreadtrum SoC chip can have different normal block numbers
79  * On Spreadtrum platform, we have multi-subsystems will access the unique
87 	mutex_lock(&efuse->mutex);  in sprd_efuse_lock()
89 	ret = hwspin_lock_timeout_raw(efuse->hwlock,  in sprd_efuse_lock()
92 		dev_err(efuse->dev, "timeout get the hwspinlock\n");  in sprd_efuse_lock()
93 		mutex_unlock(&efuse->mutex);  in sprd_efuse_lock()
102 	hwspin_unlock_raw(efuse->hwlock);  in sprd_efuse_unlock()
103 	mutex_unlock(&efuse->mutex);  in sprd_efuse_unlock()
108 	u32 val = readl(efuse->base + SPRD_EFUSE_PW_SWT);  in sprd_efuse_set_prog_power()
115 	writel(val, efuse->base + SPRD_EFUSE_PW_SWT);  in sprd_efuse_set_prog_power()
117 	/* Open or close efuse power need wait 1000us to make power stable. */  in sprd_efuse_set_prog_power()
125 	writel(val, efuse->base + SPRD_EFUSE_PW_SWT);  in sprd_efuse_set_prog_power()
127 	/* Open or close efuse power need wait 1000us to make power stable. */  in sprd_efuse_set_prog_power()
133 	u32 val = readl(efuse->base + SPRD_EFUSE_ENABLE);  in sprd_efuse_set_read_power()
140 	writel(val, efuse->base + SPRD_EFUSE_ENABLE);  in sprd_efuse_set_read_power()
142 	/* Open or close efuse power need wait 1000us to make power stable. */  in sprd_efuse_set_read_power()
148 	u32 val = readl(efuse->base + SPRD_EFUSE_ENABLE);  in sprd_efuse_set_prog_lock()
155 	writel(val, efuse->base + SPRD_EFUSE_ENABLE);  in sprd_efuse_set_prog_lock()
160 	u32 val = readl(efuse->base + SPRD_EFUSE_ENABLE);  in sprd_efuse_set_auto_check()
167 	writel(val, efuse->base + SPRD_EFUSE_ENABLE);  in sprd_efuse_set_auto_check()
172 	u32 val = readl(efuse->base + SPRD_EFUSE_ENABLE);  in sprd_efuse_set_data_double()
179 	writel(val, efuse->base + SPRD_EFUSE_ENABLE);  in sprd_efuse_set_data_double()
184 	u32 val = readl(efuse->base + SPRD_EFUSE_PW_SWT);  in sprd_efuse_set_prog_en()
191 	writel(val, efuse->base + SPRD_EFUSE_PW_SWT);  in sprd_efuse_set_prog_en()
206 	       efuse->base + SPRD_EFUSE_MAGIC_NUM);  in sprd_efuse_raw_prog()
209 	 * Power on the efuse, enable programme and enable double data  in sprd_efuse_raw_prog()
217 	 * Enable the auto-check function to validate if the programming is  in sprd_efuse_raw_prog()
223 	writel(*data, efuse->base + SPRD_EFUSE_MEM(blk));  in sprd_efuse_raw_prog()
225 	/* Disable auto-check and data double after programming */  in sprd_efuse_raw_prog()
234 	status = readl(efuse->base + SPRD_EFUSE_ERR_FLAG);  in sprd_efuse_raw_prog()
236 		dev_err(efuse->dev,  in sprd_efuse_raw_prog()
240 		       efuse->base + SPRD_EFUSE_ERR_CLR);  in sprd_efuse_raw_prog()
241 		ret = -EBUSY;  in sprd_efuse_raw_prog()
244 		writel(0, efuse->base + SPRD_EFUSE_MEM(blk));  in sprd_efuse_raw_prog()
249 	writel(0, efuse->base + SPRD_EFUSE_MAGIC_NUM);  in sprd_efuse_raw_prog()
260 	 * Need power on the efuse before reading data from efuse, and will  in sprd_efuse_raw_read()
261 	 * power off the efuse after reading process.  in sprd_efuse_raw_read()
269 	*val = readl(efuse->base + SPRD_EFUSE_MEM(blk));  in sprd_efuse_raw_read()
274 	/* Power off the efuse */  in sprd_efuse_raw_read()
281 	status = readl(efuse->base + SPRD_EFUSE_ERR_FLAG);  in sprd_efuse_raw_read()
283 		dev_err(efuse->dev,  in sprd_efuse_raw_read()
287 		       efuse->base + SPRD_EFUSE_ERR_CLR);  in sprd_efuse_raw_read()
288 		return -EBUSY;  in sprd_efuse_raw_read()
297 	bool blk_double = efuse->data->blk_double;  in sprd_efuse_read()
298 	u32 index = offset / SPRD_EFUSE_BLOCK_WIDTH + efuse->data->blk_offset;  in sprd_efuse_read()
307 	ret = clk_prepare_enable(efuse->clk);  in sprd_efuse_read()
317 	clk_disable_unprepare(efuse->clk);  in sprd_efuse_read()
327 	bool blk_double = efuse->data->blk_double;  in sprd_efuse_write()
335 	ret = clk_prepare_enable(efuse->clk);  in sprd_efuse_write()
354 	clk_disable_unprepare(efuse->clk);  in sprd_efuse_write()
363 	struct device_node *np = pdev->dev.of_node;  in sprd_efuse_probe()
370 	pdata = of_device_get_match_data(&pdev->dev);  in sprd_efuse_probe()
372 		dev_err(&pdev->dev, "No matching driver data found\n");  in sprd_efuse_probe()
373 		return -EINVAL;  in sprd_efuse_probe()
376 	efuse = devm_kzalloc(&pdev->dev, sizeof(*efuse), GFP_KERNEL);  in sprd_efuse_probe()
378 		return -ENOMEM;  in sprd_efuse_probe()
380 	efuse->base = devm_platform_ioremap_resource(pdev, 0);  in sprd_efuse_probe()
381 	if (IS_ERR(efuse->base))  in sprd_efuse_probe()
382 		return PTR_ERR(efuse->base);  in sprd_efuse_probe()
386 		dev_err(&pdev->dev, "failed to get hwlock id\n");  in sprd_efuse_probe()
390 	efuse->hwlock = devm_hwspin_lock_request_specific(&pdev->dev, ret);  in sprd_efuse_probe()
391 	if (!efuse->hwlock) {  in sprd_efuse_probe()
392 		dev_err(&pdev->dev, "failed to request hwlock\n");  in sprd_efuse_probe()
393 		return -ENXIO;  in sprd_efuse_probe()
396 	efuse->clk = devm_clk_get(&pdev->dev, "enable");  in sprd_efuse_probe()
397 	if (IS_ERR(efuse->clk)) {  in sprd_efuse_probe()
398 		dev_err(&pdev->dev, "failed to get enable clock\n");  in sprd_efuse_probe()
399 		return PTR_ERR(efuse->clk);  in sprd_efuse_probe()
402 	mutex_init(&efuse->mutex);  in sprd_efuse_probe()
403 	efuse->dev = &pdev->dev;  in sprd_efuse_probe()
404 	efuse->data = pdata;  in sprd_efuse_probe()
409 	econfig.name = "sprd-efuse";  in sprd_efuse_probe()
410 	econfig.size = efuse->data->blk_nums * SPRD_EFUSE_BLOCK_WIDTH;  in sprd_efuse_probe()
415 	econfig.dev = &pdev->dev;  in sprd_efuse_probe()
416 	nvmem = devm_nvmem_register(&pdev->dev, &econfig);  in sprd_efuse_probe()
418 		dev_err(&pdev->dev, "failed to register nvmem\n");  in sprd_efuse_probe()
426 	{ .compatible = "sprd,ums312-efuse", .data = &ums312_data },
434 		.name = "sprd-efuse",