hw/idt/ntb_hw_idt.h

84  *      the size of one DWORD
86  * So to simplify the driver code, there is only DWORD-sized read/write
90 /* PCI Express command/status register	(DWORD) */
92 /* PCI Express Device Capabilities	(DWORD) */
96 /* PCI Express Link Capabilities	(DWORD) */
100 /* PCI Express Device Capabilities 2	(DWORD) */
104 /* PCI Power Management Control and Status (DWORD) */
109 /* NT Endpoint Control			(DWORD) */
111 /* NT Endpoint Interrupt Status/Mask	(DWORD) */
114 /* NT Endpoint Signal Data		(DWORD) */
116 /* NT Endpoint Global Signal		(DWORD) */
118 /* Internal Error Reporting Mask 0/1	(DWORD) */
122 /* NT Outbound Doorbell Set		(DWORD) */
124 /* NT Inbound Doorbell Status/Mask	(DWORD) */
128 /* Outbound Message N			(DWORD) */
133 /* Inbound Message N			(DWORD) */
138 /* Inbound Message Source N		(DWORD) */
143 /* Message Status			(DWORD) */
145 /* Message Status Mask			(DWORD) */
148 /* BAR N Setup/Limit Address/Lower and Upper Translated Base Address (DWORD) */
174 /* NT Mapping Table Address/Status/Data	(DWORD) */
178 /* Requester ID (Bus:Device:Function) Capture	(DWORD) */
181 /* Lookup Table Offset/Lower, Middle and Upper data	(DWORD) */
186 /* NT Endpoint Uncorrectable/Correctable Errors Emulation registers (DWORD) */
200 /* NT-function control register		(DWORD) */
202 /* BAR setup/limit/base address registers (DWORD) */
230 /* NT-function control register		(DWORD) */
232 /* BAR setup/limit/base address registers (DWORD) */
260 /* NT-function control register		(DWORD) */
262 /* BAR setup/limit/base address registers (DWORD) */
290 /* NT-function control register		(DWORD) */
292 /* BAR setup/limit/base address registers (DWORD) */
320 /* NT-function control register		(DWORD) */
322 /* BAR setup/limit/base address registers (DWORD) */
350 /* NT-function control register		(DWORD) */
352 /* BAR setup/limit/base address registers (DWORD) */
380 /* NT-function control register		(DWORD) */
382 /* BAR setup/limit/base address registers (DWORD) */
410 /* NT-function control register		(DWORD) */
412 /* BAR setup/limit/base address registers (DWORD) */
437 /* IDT PCIe-switch control register	(DWORD) */
439 /* Boot Configuration Vector Status	(DWORD) */
441 /* Port Clocking Mode			(DWORD) */
443 /* Reset Drain Delay			(DWORD) */
445 /* Port Operating Mode Change Drain Delay (DWORD) */
447 /* Side Effect Delay			(DWORD) */
449 /* Upstream Secondary Bus Reset Delay	(DWORD) */
502 /* Switch Event Status/Mask/Partition mask (DWORD) */
506 /* Switch Event Link Up/Down Status/Mask (DWORD) */
511 /* Switch Event Fundamental Reset Status/Mask (DWORD) */
514 /* Switch Event Hot Reset Status/Mask	(DWORD) */
517 /* Switch Event Failover Mask		(DWORD) */
519 /* Switch Event Global Signal Status/Mask (DWORD) */
522 /* NT Global Doorbell Status		(DWORD) */
524 /* Switch partition N message M control (msgs routing table) (DWORD) */
557 /* SMBus Status and Control registers	(DWORD) */
560 /* Serial EEPROM Interface		(DWORD) */
562 /* MBus I/O Expander Address N		(DWORD) */
569 /* General Purpose Events Control and Status registers (DWORD) */
578 /* SMBus Configuration Block header log	(DWORD) */