540 	t7xx_pcie_mac_set_int(md_ctrl->t7xx_dev, md_ctrl->hw_info.phy_interrupt_id);  in t7xx_cldma_enable_irq()
545 	t7xx_pcie_mac_clear_int(md_ctrl->t7xx_dev, md_ctrl->hw_info.phy_interrupt_id);  in t7xx_cldma_disable_irq()
935 	t7xx_pci_disable_sleep(md_ctrl->t7xx_dev);  in t7xx_cldma_send_skb()
957 			if (!t7xx_pci_sleep_disable_complete(md_ctrl->t7xx_dev)) {  in t7xx_cldma_send_skb()
974 		if (!t7xx_pci_sleep_disable_complete(md_ctrl->t7xx_dev)) {  in t7xx_cldma_send_skb()
989 	t7xx_pci_enable_sleep(md_ctrl->t7xx_dev);  in t7xx_cldma_send_skb()
1079 	struct t7xx_addr_base *pbase = &md_ctrl->t7xx_dev->base_addr;  in t7xx_hw_info_init()
1107 int t7xx_cldma_alloc(enum cldma_id hif_id, struct t7xx_pci_dev *t7xx_dev)  in t7xx_cldma_alloc()  argument
1109 	struct device *dev = &t7xx_dev->pdev->dev;  in t7xx_cldma_alloc()
1117 	md_ctrl->t7xx_dev = t7xx_dev;  in t7xx_cldma_alloc()
1124 	t7xx_dev->md->md_ctrl[hif_id] = md_ctrl;  in t7xx_cldma_alloc()
1128 static void t7xx_cldma_resume_early(struct t7xx_pci_dev *t7xx_dev, void *entity_param)  in t7xx_cldma_resume_early()  argument
1153 static int t7xx_cldma_resume(struct t7xx_pci_dev *t7xx_dev, void *entity_param)  in t7xx_cldma_resume()  argument
1165 		t7xx_mhccif_mask_clr(t7xx_dev, D2H_SW_INT_MASK);  in t7xx_cldma_resume()
1170 static void t7xx_cldma_suspend_late(struct t7xx_pci_dev *t7xx_dev, void *entity_param)  in t7xx_cldma_suspend_late()  argument
1188 static int t7xx_cldma_suspend(struct t7xx_pci_dev *t7xx_dev, void *entity_param)  in t7xx_cldma_suspend()  argument
1195 		t7xx_mhccif_mask_set(t7xx_dev, D2H_SW_INT_MASK);  in t7xx_cldma_suspend()
1228 	return t7xx_pci_pm_entity_register(md_ctrl->t7xx_dev, md_ctrl->pm_entity);  in t7xx_cldma_pm_init()
1236 	t7xx_pci_pm_entity_unregister(md_ctrl->t7xx_dev, md_ctrl->pm_entity);  in t7xx_cldma_pm_uninit()
1262 	t7xx_pcie_mac_clear_int(md_ctrl->t7xx_dev, interrupt);  in t7xx_cldma_isr_handler()
1264 	t7xx_pcie_mac_clear_int_status(md_ctrl->t7xx_dev, interrupt);  in t7xx_cldma_isr_handler()
1265 	t7xx_pcie_mac_set_int(md_ctrl->t7xx_dev, interrupt);  in t7xx_cldma_isr_handler()
1339 	t7xx_pcie_mac_clear_int(md_ctrl->t7xx_dev, hw_info->phy_interrupt_id);  in t7xx_cldma_init()
1340 	md_ctrl->t7xx_dev->intr_handler[hw_info->phy_interrupt_id] = t7xx_cldma_isr_handler;  in t7xx_cldma_init()
1341 	md_ctrl->t7xx_dev->intr_thread[hw_info->phy_interrupt_id] = NULL;  in t7xx_cldma_init()
1342 	md_ctrl->t7xx_dev->callback_param[hw_info->phy_interrupt_id] = md_ctrl;  in t7xx_cldma_init()
1343 	t7xx_pcie_mac_clear_int_status(md_ctrl->t7xx_dev, hw_info->phy_interrupt_id);  in t7xx_cldma_init()