Lines Matching refs:phy_idx
637 enum rtw89_phy_idx phy_idx) in rtw8852bx_set_gain_offset() argument
687 rtw89_phy_write32_idx(rtwdev, R_P0_RPL1, B_P0_RPL1_BIAS_MASK, tmp, phy_idx); in rtw8852bx_set_gain_offset()
691 rtw89_phy_write32_idx(rtwdev, R_P1_RPL1, B_P0_RPL1_BIAS_MASK, tmp, phy_idx); in rtw8852bx_set_gain_offset()
750 enum rtw89_phy_idx phy_idx) in rtw8852bx_ctrl_ch() argument
760 B_PATH0_BAND_SEL_MSK_V1, 1, phy_idx); in rtw8852bx_ctrl_ch()
763 B_PATH0_BAND_SEL_MSK_V1, 0, phy_idx); in rtw8852bx_ctrl_ch()
768 B_PATH1_BAND_SEL_MSK_V1, 1, phy_idx); in rtw8852bx_ctrl_ch()
771 B_PATH1_BAND_SEL_MSK_V1, 0, phy_idx); in rtw8852bx_ctrl_ch()
775 rtw89_phy_write32_idx(rtwdev, R_FC0_BW_V1, B_FC0_BW_INV, sco_comp, phy_idx); in rtw8852bx_ctrl_ch()
803 rtw8852bx_set_gain_offset(rtwdev, subband, phy_idx); in rtw8852bx_ctrl_ch()
904 enum rtw89_phy_idx phy_idx) in rtw8852bx_ctrl_bw() argument
910 rx_path_0 = rtw89_phy_read32_idx(rtwdev, R_CHBW_MOD_V1, B_ANT_RX_SEG0, phy_idx); in rtw8852bx_ctrl_bw()
914 rtw89_phy_write32_idx(rtwdev, R_FC0_BW_V1, B_FC0_BW_SET, 0x0, phy_idx); in rtw8852bx_ctrl_bw()
915 rtw89_phy_write32_idx(rtwdev, R_CHBW_MOD_V1, B_CHBW_MOD_SBW, 0x1, phy_idx); in rtw8852bx_ctrl_bw()
916 rtw89_phy_write32_idx(rtwdev, R_CHBW_MOD_V1, B_CHBW_MOD_PRICH, 0x0, phy_idx); in rtw8852bx_ctrl_bw()
920 B_P0_RFMODE_ORI_RX_ALL, 0x333, phy_idx); in rtw8852bx_ctrl_bw()
922 B_P1_RFMODE_ORI_RX_ALL, 0x333, phy_idx); in rtw8852bx_ctrl_bw()
925 B_PATH0_BAND_NRBW_EN_V1, 0x0, phy_idx); in rtw8852bx_ctrl_bw()
927 B_PATH1_BAND_NRBW_EN_V1, 0x0, phy_idx); in rtw8852bx_ctrl_bw()
931 rtw89_phy_write32_idx(rtwdev, R_FC0_BW_V1, B_FC0_BW_SET, 0x0, phy_idx); in rtw8852bx_ctrl_bw()
932 rtw89_phy_write32_idx(rtwdev, R_CHBW_MOD_V1, B_CHBW_MOD_SBW, 0x2, phy_idx); in rtw8852bx_ctrl_bw()
933 rtw89_phy_write32_idx(rtwdev, R_CHBW_MOD_V1, B_CHBW_MOD_PRICH, 0x0, phy_idx); in rtw8852bx_ctrl_bw()
937 B_P0_RFMODE_ORI_RX_ALL, 0x333, phy_idx); in rtw8852bx_ctrl_bw()
939 B_P1_RFMODE_ORI_RX_ALL, 0x333, phy_idx); in rtw8852bx_ctrl_bw()
942 B_PATH0_BAND_NRBW_EN_V1, 0x0, phy_idx); in rtw8852bx_ctrl_bw()
944 B_PATH1_BAND_NRBW_EN_V1, 0x0, phy_idx); in rtw8852bx_ctrl_bw()
948 rtw89_phy_write32_idx(rtwdev, R_FC0_BW_V1, B_FC0_BW_SET, 0x0, phy_idx); in rtw8852bx_ctrl_bw()
949 rtw89_phy_write32_idx(rtwdev, R_CHBW_MOD_V1, B_CHBW_MOD_SBW, 0x0, phy_idx); in rtw8852bx_ctrl_bw()
950 rtw89_phy_write32_idx(rtwdev, R_CHBW_MOD_V1, B_CHBW_MOD_PRICH, 0x0, phy_idx); in rtw8852bx_ctrl_bw()
954 B_P0_RFMODE_ORI_RX_ALL, 0x333, phy_idx); in rtw8852bx_ctrl_bw()
956 B_P1_RFMODE_ORI_RX_ALL, 0x333, phy_idx); in rtw8852bx_ctrl_bw()
959 B_PATH0_BAND_NRBW_EN_V1, 0x1, phy_idx); in rtw8852bx_ctrl_bw()
961 B_PATH1_BAND_NRBW_EN_V1, 0x1, phy_idx); in rtw8852bx_ctrl_bw()
965 rtw89_phy_write32_idx(rtwdev, R_FC0_BW_V1, B_FC0_BW_SET, 0x1, phy_idx); in rtw8852bx_ctrl_bw()
966 rtw89_phy_write32_idx(rtwdev, R_CHBW_MOD_V1, B_CHBW_MOD_SBW, 0x0, phy_idx); in rtw8852bx_ctrl_bw()
968 pri_ch, phy_idx); in rtw8852bx_ctrl_bw()
972 B_P0_RFMODE_ORI_RX_ALL, 0x333, phy_idx); in rtw8852bx_ctrl_bw()
974 B_P1_RFMODE_ORI_RX_ALL, 0x333, phy_idx); in rtw8852bx_ctrl_bw()
983 rtw89_phy_write32_idx(rtwdev, R_FC0_BW_V1, B_FC0_BW_SET, 0x2, phy_idx); in rtw8852bx_ctrl_bw()
984 rtw89_phy_write32_idx(rtwdev, R_CHBW_MOD_V1, B_CHBW_MOD_SBW, 0x0, phy_idx); in rtw8852bx_ctrl_bw()
986 pri_ch, phy_idx); in rtw8852bx_ctrl_bw()
991 B_P0_RFMODE_ORI_RX_ALL, val, phy_idx); in rtw8852bx_ctrl_bw()
993 B_P1_RFMODE_ORI_RX_ALL, val, phy_idx); in rtw8852bx_ctrl_bw()
1010 B_P1_RFMODE_ORI_RX_ALL, 0x111, phy_idx); in rtw8852bx_ctrl_bw()
1013 B_P0_RFMODE_ORI_RX_ALL, 0x111, phy_idx); in rtw8852bx_ctrl_bw()
1028 enum rtw89_phy_idx phy_idx) in rtw8852bx_5m_mask() argument
1055 B_ASSIGN_SBD_OPT_EN_V1, 0x0, phy_idx); in rtw8852bx_5m_mask()
1079 B_ASSIGN_SBD_OPT_EN_V1, 0x1, phy_idx); in rtw8852bx_5m_mask()
1082 static void __rtw8852bx_bb_reset_all(struct rtw89_dev *rtwdev, enum rtw89_phy_idx phy_idx) in __rtw8852bx_bb_reset_all() argument
1084 rtw89_phy_write32_idx(rtwdev, R_S0_HW_SI_DIS, B_S0_HW_SI_DIS_W_R_TRIG, 0x7, phy_idx); in __rtw8852bx_bb_reset_all()
1085 rtw89_phy_write32_idx(rtwdev, R_S1_HW_SI_DIS, B_S1_HW_SI_DIS_W_R_TRIG, 0x7, phy_idx); in __rtw8852bx_bb_reset_all()
1087 rtw89_phy_write32_idx(rtwdev, R_RSTB_ASYNC, B_RSTB_ASYNC_ALL, 1, phy_idx); in __rtw8852bx_bb_reset_all()
1088 rtw89_phy_write32_idx(rtwdev, R_RSTB_ASYNC, B_RSTB_ASYNC_ALL, 0, phy_idx); in __rtw8852bx_bb_reset_all()
1089 rtw89_phy_write32_idx(rtwdev, R_S0_HW_SI_DIS, B_S0_HW_SI_DIS_W_R_TRIG, 0x0, phy_idx); in __rtw8852bx_bb_reset_all()
1090 rtw89_phy_write32_idx(rtwdev, R_S1_HW_SI_DIS, B_S1_HW_SI_DIS_W_R_TRIG, 0x0, phy_idx); in __rtw8852bx_bb_reset_all()
1091 rtw89_phy_write32_idx(rtwdev, R_RSTB_ASYNC, B_RSTB_ASYNC_ALL, 1, phy_idx); in __rtw8852bx_bb_reset_all()
1095 enum rtw89_phy_idx phy_idx) in rtw8852bx_bb_macid_ctrl_init() argument
1101 rtw89_mac_txpwr_write32(rtwdev, phy_idx, addr, 0); in rtw8852bx_bb_macid_ctrl_init()
1150 enum rtw89_phy_idx phy_idx) in rtw8852bt_set_csi_tone_idx() argument
1158 0, phy_idx); in rtw8852bt_set_csi_tone_idx()
1167 csi_tone_idx, phy_idx); in rtw8852bt_set_csi_tone_idx()
1168 rtw89_phy_write32_idx(rtwdev, R_SEG0CSI_EN_V1, B_SEG0CSI_EN, 1, phy_idx); in rtw8852bt_set_csi_tone_idx()
1173 enum rtw89_phy_idx phy_idx) in __rtw8852bx_set_channel_bb() argument
1183 rtw8852bx_ctrl_ch(rtwdev, chan, phy_idx); in __rtw8852bx_set_channel_bb()
1184 rtw8852bx_ctrl_bw(rtwdev, pri_ch_idx, chan->band_width, phy_idx); in __rtw8852bx_set_channel_bb()
1187 rtw8852bt_set_csi_tone_idx(rtwdev, chan, phy_idx); in __rtw8852bx_set_channel_bb()
1205 rtw8852bx_5m_mask(rtwdev, chan, phy_idx); in __rtw8852bx_set_channel_bb()
1207 __rtw8852bx_bb_reset_all(rtwdev, phy_idx); in __rtw8852bx_set_channel_bb()
1211 enum rtw89_phy_idx phy_idx, s16 ref) in rtw8852bx_bb_cal_txpwr_ref() argument
1239 enum rtw89_phy_idx phy_idx) in rtw8852bx_set_txpwr_ref() argument
1252 rtw89_mac_txpwr_write32_mask(rtwdev, phy_idx, R_AX_PWR_RATE_CTRL, in rtw8852bx_set_txpwr_ref()
1256 val = rtw8852bx_bb_cal_txpwr_ref(rtwdev, phy_idx, ref_ofdm); in rtw8852bx_set_txpwr_ref()
1260 phy_idx); in rtw8852bx_set_txpwr_ref()
1263 val = rtw8852bx_bb_cal_txpwr_ref(rtwdev, phy_idx, ref_cck); in rtw8852bx_set_txpwr_ref()
1267 phy_idx); in rtw8852bx_set_txpwr_ref()
1273 enum rtw89_phy_idx phy_idx) in rtw8852bx_bb_set_tx_shape_dfir() argument
1312 phy_idx); in rtw8852bx_bb_set_tx_shape_dfir()
1323 enum rtw89_phy_idx phy_idx) in rtw8852bx_set_tx_shape() argument
1332 rtw8852bx_bb_set_tx_shape_dfir(rtwdev, chan, tx_shape_cck, phy_idx); in rtw8852bx_set_tx_shape()
1340 enum rtw89_phy_idx phy_idx) in __rtw8852bx_set_txpwr() argument
1342 rtw89_phy_set_txpwr_byrate(rtwdev, chan, phy_idx); in __rtw8852bx_set_txpwr()
1343 rtw89_phy_set_txpwr_offset(rtwdev, chan, phy_idx); in __rtw8852bx_set_txpwr()
1344 rtw8852bx_set_tx_shape(rtwdev, chan, phy_idx); in __rtw8852bx_set_txpwr()
1345 rtw89_phy_set_txpwr_limit(rtwdev, chan, phy_idx); in __rtw8852bx_set_txpwr()
1346 rtw89_phy_set_txpwr_limit_ru(rtwdev, chan, phy_idx); in __rtw8852bx_set_txpwr()
1350 enum rtw89_phy_idx phy_idx) in __rtw8852bx_set_txpwr_ctrl() argument
1352 rtw8852bx_set_txpwr_ref(rtwdev, phy_idx); in __rtw8852bx_set_txpwr_ctrl()
1378 __rtw8852bx_init_txpwr_unit(struct rtw89_dev *rtwdev, enum rtw89_phy_idx phy_idx) in __rtw8852bx_init_txpwr_unit() argument
1382 ret = rtw89_mac_txpwr_write32(rtwdev, phy_idx, R_AX_PWR_UL_CTRL2, 0x07763333); in __rtw8852bx_init_txpwr_unit()
1386 ret = rtw89_mac_txpwr_write32(rtwdev, phy_idx, R_AX_PWR_COEXT_CTRL, 0x01ebf000); in __rtw8852bx_init_txpwr_unit()
1390 ret = rtw89_mac_txpwr_write32(rtwdev, phy_idx, R_AX_PWR_UL_CTRL0, 0x0002f8ff); in __rtw8852bx_init_txpwr_unit()
1394 rtw8852bx_set_txpwr_ul_tb_offset(rtwdev, 0, phy_idx == RTW89_PHY_1 ? in __rtw8852bx_init_txpwr_unit()
1572 enum rtw89_phy_idx phy_idx) in __rtw8852bx_ctrl_nbtg_bt_tx() argument
1579 enum rtw89_phy_idx phy_idx) in __rtw8852bx_ctrl_btg_bt_rx() argument