Lines Matching refs:phy_idx
867 enum rtw89_phy_idx phy_idx) in rtw8852a_ctrl_ch() argument
872 if (phy_idx == RTW89_PHY_0) { in rtw8852a_ctrl_ch()
878 phy_idx); in rtw8852a_ctrl_ch()
882 phy_idx); in rtw8852a_ctrl_ch()
890 1, phy_idx); in rtw8852a_ctrl_ch()
894 0, phy_idx); in rtw8852a_ctrl_ch()
906 sco_comp, phy_idx); in rtw8852a_ctrl_ch()
913 1, phy_idx); in rtw8852a_ctrl_ch()
917 0, phy_idx); in rtw8852a_ctrl_ch()
921 sco_comp, phy_idx); in rtw8852a_ctrl_ch()
927 phy_idx); in rtw8852a_ctrl_ch()
930 phy_idx); in rtw8852a_ctrl_ch()
1014 enum rtw89_phy_idx phy_idx) in rtw8852a_ctrl_bw() argument
1020 phy_idx); in rtw8852a_ctrl_bw()
1022 phy_idx); in rtw8852a_ctrl_bw()
1024 0x0, phy_idx); in rtw8852a_ctrl_bw()
1028 phy_idx); in rtw8852a_ctrl_bw()
1030 phy_idx); in rtw8852a_ctrl_bw()
1032 0x0, phy_idx); in rtw8852a_ctrl_bw()
1036 phy_idx); in rtw8852a_ctrl_bw()
1038 phy_idx); in rtw8852a_ctrl_bw()
1040 0x0, phy_idx); in rtw8852a_ctrl_bw()
1044 phy_idx); in rtw8852a_ctrl_bw()
1046 phy_idx); in rtw8852a_ctrl_bw()
1049 phy_idx); in rtw8852a_ctrl_bw()
1057 phy_idx); in rtw8852a_ctrl_bw()
1059 phy_idx); in rtw8852a_ctrl_bw()
1062 phy_idx); in rtw8852a_ctrl_bw()
1069 if (phy_idx == RTW89_PHY_0) { in rtw8852a_ctrl_bw()
1127 enum rtw89_phy_idx phy_idx) in rtw8852a_bb_reset_all() argument
1130 phy_idx); in rtw8852a_bb_reset_all()
1132 phy_idx); in rtw8852a_bb_reset_all()
1134 phy_idx); in rtw8852a_bb_reset_all()
1138 enum rtw89_phy_idx phy_idx, bool en) in rtw8852a_bb_reset_en() argument
1143 phy_idx); in rtw8852a_bb_reset_en()
1147 phy_idx); in rtw8852a_bb_reset_en()
1151 enum rtw89_phy_idx phy_idx) in rtw8852a_bb_reset() argument
1157 rtw8852a_bb_reset_all(rtwdev, phy_idx); in rtw8852a_bb_reset()
1165 enum rtw89_phy_idx phy_idx) in rtw8852a_bb_macid_ctrl_init() argument
1171 rtw89_mac_txpwr_write32(rtwdev, phy_idx, addr, 0); in rtw8852a_bb_macid_ctrl_init()
1200 enum rtw89_phy_idx phy_idx) in rtw8852a_bbrst_for_rfk() argument
1204 rtw8852a_bb_reset_all(rtwdev, phy_idx); in rtw8852a_bbrst_for_rfk()
1212 enum rtw89_phy_idx phy_idx) in rtw8852a_set_channel_bb() argument
1222 rtw8852a_ctrl_ch(rtwdev, chan->channel, phy_idx); in rtw8852a_set_channel_bb()
1223 rtw8852a_ctrl_bw(rtwdev, pri_ch_idx, chan->band_width, phy_idx); in rtw8852a_set_channel_bb()
1228 rtw8852a_bbrst_for_rfk(rtwdev, phy_idx); in rtw8852a_set_channel_bb()
1233 rtw8852a_bb_reset_all(rtwdev, phy_idx); in rtw8852a_set_channel_bb()
1239 enum rtw89_phy_idx phy_idx) in rtw8852a_set_channel() argument
1242 rtw8852a_set_channel_bb(rtwdev, chan, phy_idx); in rtw8852a_set_channel()
1269 u8 phy_idx) in rtw8852a_tssi_cont_en_phyidx() argument
1275 if (phy_idx == RTW89_PHY_0) in rtw8852a_tssi_cont_en_phyidx()
1296 enum rtw89_phy_idx phy_idx) in rtw8852a_set_channel_help() argument
1303 rtw8852a_tssi_cont_en_phyidx(rtwdev, false, phy_idx); in rtw8852a_set_channel_help()
1306 rtw8852a_bb_reset_en(rtwdev, phy_idx, false); in rtw8852a_set_channel_help()
1311 rtw8852a_tssi_cont_en_phyidx(rtwdev, true, phy_idx); in rtw8852a_set_channel_help()
1312 rtw8852a_bb_reset_en(rtwdev, phy_idx, true); in rtw8852a_set_channel_help()
1356 enum rtw89_phy_idx phy_idx = rtwvif->phy_idx; in rtw8852a_rfk_channel() local
1358 rtw8852a_rx_dck(rtwdev, phy_idx, true, chanctx_idx); in rtw8852a_rfk_channel()
1359 rtw8852a_iqk(rtwdev, phy_idx, chanctx_idx); in rtw8852a_rfk_channel()
1360 rtw8852a_tssi(rtwdev, phy_idx, chanctx_idx); in rtw8852a_rfk_channel()
1361 rtw8852a_dpk(rtwdev, phy_idx, chanctx_idx); in rtw8852a_rfk_channel()
1365 enum rtw89_phy_idx phy_idx, in rtw8852a_rfk_band_changed() argument
1368 rtw8852a_tssi_scan(rtwdev, phy_idx, chan); in rtw8852a_rfk_band_changed()
1374 rtw8852a_wifi_scan_notify(rtwdev, start, rtwvif->phy_idx); in rtw8852a_rfk_scan()
1384 enum rtw89_phy_idx phy_idx, s16 ref) in rtw8852a_bb_cal_txpwr_ref() argument
1435 enum rtw89_phy_idx phy_idx) in rtw8852a_set_txpwr_ref() argument
1448 rtw89_mac_txpwr_write32_mask(rtwdev, phy_idx, R_AX_PWR_RATE_CTRL, in rtw8852a_set_txpwr_ref()
1452 val = rtw8852a_bb_cal_txpwr_ref(rtwdev, phy_idx, ref_ofdm); in rtw8852a_set_txpwr_ref()
1456 phy_idx); in rtw8852a_set_txpwr_ref()
1459 val = rtw8852a_bb_cal_txpwr_ref(rtwdev, phy_idx, ref_cck); in rtw8852a_set_txpwr_ref()
1463 phy_idx); in rtw8852a_set_txpwr_ref()
1468 enum rtw89_phy_idx phy_idx) in rtw8852a_set_txpwr() argument
1470 rtw89_phy_set_txpwr_byrate(rtwdev, chan, phy_idx); in rtw8852a_set_txpwr()
1471 rtw89_phy_set_txpwr_offset(rtwdev, chan, phy_idx); in rtw8852a_set_txpwr()
1472 rtw89_phy_set_txpwr_limit(rtwdev, chan, phy_idx); in rtw8852a_set_txpwr()
1473 rtw89_phy_set_txpwr_limit_ru(rtwdev, chan, phy_idx); in rtw8852a_set_txpwr()
1477 enum rtw89_phy_idx phy_idx) in rtw8852a_set_txpwr_ctrl() argument
1479 rtw8852a_set_txpwr_ref(rtwdev, phy_idx); in rtw8852a_set_txpwr_ctrl()
1483 rtw8852a_init_txpwr_unit(struct rtw89_dev *rtwdev, enum rtw89_phy_idx phy_idx) in rtw8852a_init_txpwr_unit() argument
1487 ret = rtw89_mac_txpwr_write32(rtwdev, phy_idx, R_AX_PWR_UL_CTRL2, 0x07763333); in rtw8852a_init_txpwr_unit()
1491 ret = rtw89_mac_txpwr_write32(rtwdev, phy_idx, R_AX_PWR_COEXT_CTRL, 0x01ebf004); in rtw8852a_init_txpwr_unit()
1495 ret = rtw89_mac_txpwr_write32(rtwdev, phy_idx, R_AX_PWR_UL_CTRL0, 0x0002f8ff); in rtw8852a_init_txpwr_unit()
1662 enum rtw89_phy_idx phy_idx) in rtw8852a_ctrl_nbtg_bt_tx() argument
1749 enum rtw89_phy_idx phy_idx) in rtw8852a_ctrl_btg_bt_rx() argument