Lines Matching refs:path
141 u8 path) in _adc_fifo_rst() argument
149 enum rtw89_rf_path path, bool is_bybb) in _rfk_rf_direct_cntrl() argument
152 rtw89_write_rf(rtwdev, path, RR_RSV1, RR_RSV1_RST, 0x1); in _rfk_rf_direct_cntrl()
154 rtw89_write_rf(rtwdev, path, RR_RSV1, RR_RSV1_RST, 0x0); in _rfk_rf_direct_cntrl()
158 enum rtw89_rf_path path, bool is_bybb) in _rfk_drf_direct_cntrl() argument
161 rtw89_write_rf(rtwdev, path, RR_BBDC, RR_BBDC_SEL, 0x1); in _rfk_drf_direct_cntrl()
163 rtw89_write_rf(rtwdev, path, RR_BBDC, RR_BBDC_SEL, 0x0); in _rfk_drf_direct_cntrl()
169 u8 path; in _wait_rx_mode() local
172 for (path = 0; path < RF_PATH_MAX; path++) { in _wait_rx_mode()
173 if (!(kpath & BIT(path))) in _wait_rx_mode()
178 rtwdev, path, 0x00, RR_MOD_MASK); in _wait_rx_mode()
181 path, ret); in _wait_rx_mode()
185 static void _dack_reset(struct rtw89_dev *rtwdev, enum rtw89_rf_path path) in _dack_reset() argument
268 enum rtw89_rf_path path, u8 index) in _dack_reload_by_path() argument
281 if (path == RF_PATH_A) in _dack_reload_by_path()
294 tmp |= dack->msbk_d[path][index][i + 12] << (i * 8); in _dack_reload_by_path()
303 tmp |= dack->msbk_d[path][index][i + 8] << (i * 8); in _dack_reload_by_path()
312 tmp |= dack->msbk_d[path][index][i + 4] << (i * 8); in _dack_reload_by_path()
321 tmp |= dack->msbk_d[path][index][i] << (i * 8); in _dack_reload_by_path()
329 tmp = (dack->biask_d[path][index] << 22) | in _dack_reload_by_path()
330 (dack->dadck_d[path][index] << 14); in _dack_reload_by_path()
339 static void _dack_reload(struct rtw89_dev *rtwdev, enum rtw89_rf_path path) in _dack_reload() argument
344 _dack_reload_by_path(rtwdev, path, index); in _dack_reload()
524 enum rtw89_rf_path path, bool is_afe, in _rx_dck_info() argument
530 "[RX_DCK] ==== S%d RX DCK (%s / CH%d / %s / by %s)====\n", path, in _rx_dck_info()
539 static void _rxbb_ofst_swap(struct rtw89_dev *rtwdev, enum rtw89_rf_path path, u8 rf_mode) in _rxbb_ofst_swap() argument
543 val_i = rtw89_read_rf(rtwdev, path, RR_DCK, RR_DCK_S1); in _rxbb_ofst_swap()
544 val_q = rtw89_read_rf(rtwdev, path, RR_DCK1, RR_DCK1_S1); in _rxbb_ofst_swap()
548 rtw89_write_rf(rtwdev, path, RR_LUTWE2, RR_LUTWE2_DIS, 0x1); in _rxbb_ofst_swap()
549 rtw89_write_rf(rtwdev, path, RR_LUTWA, RFREG_MASK, rf_mode); in _rxbb_ofst_swap()
550 rtw89_write_rf(rtwdev, path, RR_LUTWD0, RFREG_MASK, val); in _rxbb_ofst_swap()
551 rtw89_write_rf(rtwdev, path, RR_LUTWE2, RR_LUTWE2_DIS, 0x0); in _rxbb_ofst_swap()
558 static void _set_rx_dck(struct rtw89_dev *rtwdev, enum rtw89_rf_path path, u8 rf_mode) in _set_rx_dck() argument
563 rtw89_write_rf(rtwdev, path, RR_DCK, RR_DCK_LV, 0x0); in _set_rx_dck()
564 rtw89_write_rf(rtwdev, path, RR_DCK, RR_DCK_LV, 0x1); in _set_rx_dck()
568 rtwdev, path, RR_DCK, BIT(8)); in _set_rx_dck()
570 rtw89_write_rf(rtwdev, path, RR_DCK, RR_DCK_LV, 0x0); in _set_rx_dck()
573 path, ret); in _set_rx_dck()
575 _rxbb_ofst_swap(rtwdev, path, rf_mode); in _set_rx_dck()
582 u8 path; in _rx_dck() local
588 for (path = 0; path < RF_PATH_NUM_8851B; path++) { in _rx_dck()
589 _rx_dck_info(rtwdev, phy, path, is_afe, chanctx_idx); in _rx_dck()
591 rf_reg5 = rtw89_read_rf(rtwdev, path, RR_RSV1, RFREG_MASK); in _rx_dck()
593 if (rtwdev->is_tssi_mode[path]) in _rx_dck()
595 R_P0_TSSI_TRK + (path << 13), in _rx_dck()
598 rtw89_write_rf(rtwdev, path, RR_RSV1, RR_RSV1_RST, 0x0); in _rx_dck()
599 rtw89_write_rf(rtwdev, path, RR_MOD, RR_MOD_MASK, RF_RX); in _rx_dck()
600 _set_rx_dck(rtwdev, path, RF_RX); in _rx_dck()
601 rtw89_write_rf(rtwdev, path, RR_RSV1, RFREG_MASK, rf_reg5); in _rx_dck()
603 if (rtwdev->is_tssi_mode[path]) in _rx_dck()
605 R_P0_TSSI_TRK + (path << 13), in _rx_dck()
610 static void _iqk_sram(struct rtw89_dev *rtwdev, u8 path) in _iqk_sram() argument
640 static void _iqk_rxk_setting(struct rtw89_dev *rtwdev, u8 path) in _iqk_rxk_setting() argument
642 rtw89_write_rf(rtwdev, path, RR_MOD, RR_MOD_MASK, 0xc); in _iqk_rxk_setting()
643 rtw89_write_rf(rtwdev, path, RR_RXKPLL, RR_RXKPLL_POW, 0x0); in _iqk_rxk_setting()
644 rtw89_write_rf(rtwdev, path, RR_RXKPLL, RR_RXKPLL_POW, 0x1); in _iqk_rxk_setting()
647 static bool _iqk_check_cal(struct rtw89_dev *rtwdev, u8 path) in _iqk_check_cal() argument
678 path, ret, fail1 || fail2, fail1, fail2); in _iqk_check_cal()
684 u8 path, u8 ktype) in _iqk_one_shot() argument
693 "[IQK]============ S%d ID_A_FLOK_COARSE ============\n", path); in _iqk_one_shot()
695 iqk_cmd = 0x108 | (1 << (4 + path)); in _iqk_one_shot()
699 "[IQK]============ S%d ID_G_FLOK_COARSE ============\n", path); in _iqk_one_shot()
701 iqk_cmd = 0x108 | (1 << (4 + path)); in _iqk_one_shot()
705 "[IQK]============ S%d ID_A_FLOK_FINE ============\n", path); in _iqk_one_shot()
707 iqk_cmd = 0x308 | (1 << (4 + path)); in _iqk_one_shot()
711 "[IQK]============ S%d ID_G_FLOK_FINE ============\n", path); in _iqk_one_shot()
713 iqk_cmd = 0x308 | (1 << (4 + path)); in _iqk_one_shot()
717 "[IQK]============ S%d ID_TXK ============\n", path); in _iqk_one_shot()
719 iqk_cmd = 0x008 | (1 << (path + 4)) | in _iqk_one_shot()
720 (((0x8 + iqk_info->iqk_bw[path]) & 0xf) << 8); in _iqk_one_shot()
724 "[IQK]============ S%d ID_RXAGC ============\n", path); in _iqk_one_shot()
726 iqk_cmd = 0x708 | (1 << (4 + path)) | (path << 1); in _iqk_one_shot()
730 "[IQK]============ S%d ID_RXK ============\n", path); in _iqk_one_shot()
732 iqk_cmd = 0x008 | (1 << (path + 4)) | in _iqk_one_shot()
733 (((0xc + iqk_info->iqk_bw[path]) & 0xf) << 8); in _iqk_one_shot()
737 "[IQK]============ S%d ID_NBTXK ============\n", path); in _iqk_one_shot()
741 iqk_cmd = 0x408 | (1 << (4 + path)); in _iqk_one_shot()
745 "[IQK]============ S%d ID_NBRXK ============\n", path); in _iqk_one_shot()
749 iqk_cmd = 0x608 | (1 << (4 + path)); in _iqk_one_shot()
756 notready = _iqk_check_cal(rtwdev, path); in _iqk_one_shot()
759 _iqk_sram(rtwdev, path); in _iqk_one_shot()
764 path, ktype, iqk_cmd + 1, notready); in _iqk_one_shot()
770 enum rtw89_phy_idx phy_idx, u8 path) in _rxk_2g_group_sel() argument
781 rtw89_debug(rtwdev, RTW89_DBG_RFK, "[IQK]S%x, gp = %x\n", path, gp); in _rxk_2g_group_sel()
783 rtw89_write_rf(rtwdev, path, RR_MOD, RR_MOD_RGM, g_idxrxgain[gp]); in _rxk_2g_group_sel()
784 rtw89_write_rf(rtwdev, path, RR_RXBB, RR_RXBB_C2, g_idxattc2[gp]); in _rxk_2g_group_sel()
789 rtw89_write_rf(rtwdev, path, RR_RXKPLL, RFREG_MASK, 0x80013); in _rxk_2g_group_sel()
791 rf_0 = rtw89_read_rf(rtwdev, path, RR_MOD, RFREG_MASK); in _rxk_2g_group_sel()
796 notready = _iqk_one_shot(rtwdev, phy_idx, path, ID_RXAGC); in _rxk_2g_group_sel()
799 "[IQK]S%x, RXAGC 0x8008 = 0x%x, rxbb = %x\n", path, in _rxk_2g_group_sel()
801 rtw89_read_rf(rtwdev, path, RR_MOD, 0x003e0)); in _rxk_2g_group_sel()
803 rtw89_write_rf(rtwdev, path, RR_RXKPLL, RR_RXKPLL_OFF, 0x13); in _rxk_2g_group_sel()
805 notready = _iqk_one_shot(rtwdev, phy_idx, path, ID_NBRXK); in _rxk_2g_group_sel()
806 iqk_info->nb_rxcfir[path] = in _rxk_2g_group_sel()
809 notready = _iqk_one_shot(rtwdev, phy_idx, path, ID_RXK); in _rxk_2g_group_sel()
812 "[IQK]S%x, WBRXK 0x8008 = 0x%x\n", path, in _rxk_2g_group_sel()
820 _iqk_sram(rtwdev, path); in _rxk_2g_group_sel()
823 rtw89_phy_write32_mask(rtwdev, R_RXIQC + (path << 8), in _rxk_2g_group_sel()
824 MASKDWORD, iqk_info->nb_rxcfir[path] | 0x2); in _rxk_2g_group_sel()
825 iqk_info->is_wb_txiqk[path] = false; in _rxk_2g_group_sel()
827 rtw89_phy_write32_mask(rtwdev, R_RXIQC + (path << 8), in _rxk_2g_group_sel()
829 iqk_info->is_wb_txiqk[path] = true; in _rxk_2g_group_sel()
833 "[IQK]S%x, kfail = 0x%x, 0x8%x3c = 0x%x\n", path, kfail, in _rxk_2g_group_sel()
834 1 << path, iqk_info->nb_rxcfir[path]); in _rxk_2g_group_sel()
839 enum rtw89_phy_idx phy_idx, u8 path) in _rxk_5g_group_sel() argument
853 rtw89_debug(rtwdev, RTW89_DBG_RFK, "[IQK]S%x, gp = %x\n", path, gp); in _rxk_5g_group_sel()
862 rtw89_write_rf(rtwdev, path, RR_RXKPLL, RFREG_MASK, 0x80013); in _rxk_5g_group_sel()
864 rf_0 = rtw89_read_rf(rtwdev, path, RR_MOD, RFREG_MASK); in _rxk_5g_group_sel()
868 notready = _iqk_one_shot(rtwdev, phy_idx, path, ID_RXAGC); in _rxk_5g_group_sel()
871 "[IQK]S%x, RXAGC 0x8008 = 0x%x, rxbb = %x\n", path, in _rxk_5g_group_sel()
873 rtw89_read_rf(rtwdev, path, RR_MOD, RR_MOD_RXB)); in _rxk_5g_group_sel()
875 rtw89_write_rf(rtwdev, path, RR_RXKPLL, RR_RXKPLL_OFF, 0x13); in _rxk_5g_group_sel()
877 notready = _iqk_one_shot(rtwdev, phy_idx, path, ID_NBRXK); in _rxk_5g_group_sel()
878 iqk_info->nb_rxcfir[path] = in _rxk_5g_group_sel()
882 "[IQK]S%x, NBRXK 0x8008 = 0x%x\n", path, in _rxk_5g_group_sel()
885 notready = _iqk_one_shot(rtwdev, phy_idx, path, ID_RXK); in _rxk_5g_group_sel()
888 "[IQK]S%x, WBRXK 0x8008 = 0x%x\n", path, in _rxk_5g_group_sel()
896 _iqk_sram(rtwdev, path); in _rxk_5g_group_sel()
899 rtw89_phy_write32_mask(rtwdev, R_RXIQC + (path << 8), MASKDWORD, in _rxk_5g_group_sel()
900 iqk_info->nb_rxcfir[path] | 0x2); in _rxk_5g_group_sel()
901 iqk_info->is_wb_txiqk[path] = false; in _rxk_5g_group_sel()
903 rtw89_phy_write32_mask(rtwdev, R_RXIQC + (path << 8), MASKDWORD, in _rxk_5g_group_sel()
905 iqk_info->is_wb_txiqk[path] = true; in _rxk_5g_group_sel()
909 "[IQK]S%x, kfail = 0x%x, 0x8%x3c = 0x%x\n", path, kfail, in _rxk_5g_group_sel()
910 1 << path, iqk_info->nb_rxcfir[path]); in _rxk_5g_group_sel()
915 u8 path) in _iqk_5g_nbrxk() argument
927 rtw89_debug(rtwdev, RTW89_DBG_RFK, "[IQK]S%x, gp = %x\n", path, gp); in _iqk_5g_nbrxk()
936 rtw89_write_rf(rtwdev, path, RR_RXKPLL, RFREG_MASK, 0x80013); in _iqk_5g_nbrxk()
938 rf_0 = rtw89_read_rf(rtwdev, path, RR_MOD, RFREG_MASK); in _iqk_5g_nbrxk()
942 notready = _iqk_one_shot(rtwdev, phy_idx, path, ID_RXAGC); in _iqk_5g_nbrxk()
945 "[IQK]S%x, RXAGC 0x8008 = 0x%x, rxbb = %x\n", path, in _iqk_5g_nbrxk()
947 rtw89_read_rf(rtwdev, path, RR_MOD, 0x003e0)); in _iqk_5g_nbrxk()
949 rtw89_write_rf(rtwdev, path, RR_RXKPLL, RR_RXKPLL_OFF, 0x13); in _iqk_5g_nbrxk()
951 notready = _iqk_one_shot(rtwdev, phy_idx, path, ID_NBRXK); in _iqk_5g_nbrxk()
952 iqk_info->nb_rxcfir[path] = in _iqk_5g_nbrxk()
956 "[IQK]S%x, NBRXK 0x8008 = 0x%x\n", path, in _iqk_5g_nbrxk()
960 path, rtw89_phy_read32_mask(rtwdev, R_NCTL_RPT, MASKDWORD)); in _iqk_5g_nbrxk()
966 rtw89_phy_write32_mask(rtwdev, R_RXIQC + (path << 8), in _iqk_5g_nbrxk()
968 iqk_info->is_wb_rxiqk[path] = false; in _iqk_5g_nbrxk()
970 iqk_info->is_wb_rxiqk[path] = false; in _iqk_5g_nbrxk()
974 "[IQK]S%x, kfail = 0x%x, 0x8%x3c = 0x%x\n", path, kfail, in _iqk_5g_nbrxk()
975 1 << path, iqk_info->nb_rxcfir[path]); in _iqk_5g_nbrxk()
981 u8 path) in _iqk_2g_nbrxk() argument
990 rtw89_debug(rtwdev, RTW89_DBG_RFK, "[IQK]S%x, gp = %x\n", path, gp); in _iqk_2g_nbrxk()
992 rtw89_write_rf(rtwdev, path, RR_MOD, RR_MOD_RGM, g_idxrxgain[gp]); in _iqk_2g_nbrxk()
993 rtw89_write_rf(rtwdev, path, RR_RXBB, RR_RXBB_C2, g_idxattc2[gp]); in _iqk_2g_nbrxk()
998 rtw89_write_rf(rtwdev, path, RR_RXKPLL, RFREG_MASK, 0x80013); in _iqk_2g_nbrxk()
1000 rf_0 = rtw89_read_rf(rtwdev, path, RR_MOD, RFREG_MASK); in _iqk_2g_nbrxk()
1004 notready = _iqk_one_shot(rtwdev, phy_idx, path, ID_RXAGC); in _iqk_2g_nbrxk()
1008 path, rtw89_phy_read32_mask(rtwdev, R_NCTL_RPT, MASKDWORD), in _iqk_2g_nbrxk()
1009 rtw89_read_rf(rtwdev, path, RR_MOD, 0x003e0)); in _iqk_2g_nbrxk()
1011 rtw89_write_rf(rtwdev, path, RR_RXKPLL, RR_RXKPLL_OFF, 0x13); in _iqk_2g_nbrxk()
1013 notready = _iqk_one_shot(rtwdev, phy_idx, path, ID_NBRXK); in _iqk_2g_nbrxk()
1014 iqk_info->nb_rxcfir[path] = in _iqk_2g_nbrxk()
1018 "[IQK]S%x, NBRXK 0x8008 = 0x%x\n", path, in _iqk_2g_nbrxk()
1022 path, rtw89_phy_read32_mask(rtwdev, R_NCTL_RPT, MASKDWORD)); in _iqk_2g_nbrxk()
1028 rtw89_phy_write32_mask(rtwdev, R_RXIQC + (path << 8), in _iqk_2g_nbrxk()
1030 iqk_info->is_wb_rxiqk[path] = false; in _iqk_2g_nbrxk()
1032 iqk_info->is_wb_rxiqk[path] = false; in _iqk_2g_nbrxk()
1036 "[IQK]S%x, kfail = 0x%x, 0x8%x3c = 0x%x\n", path, kfail, in _iqk_2g_nbrxk()
1037 1 << path, iqk_info->nb_rxcfir[path]); in _iqk_2g_nbrxk()
1041 static void _iqk_rxclk_setting(struct rtw89_dev *rtwdev, u8 path) in _iqk_rxclk_setting() argument
1045 rtw89_write_rf(rtwdev, path, RR_RXBB2, RR_RXBB2_CKT, 0x1); in _iqk_rxclk_setting()
1047 if (iqk_info->iqk_bw[path] == RTW89_CHANNEL_WIDTH_80) in _iqk_rxclk_setting()
1054 enum rtw89_phy_idx phy_idx, u8 path) in _txk_5g_group_sel() argument
1064 rtw89_write_rf(rtwdev, path, RR_TXIG, RR_TXIG_GR0, a_power_range[gp]); in _txk_5g_group_sel()
1065 rtw89_write_rf(rtwdev, path, RR_TXIG, RR_TXIG_GR1, a_track_range[gp]); in _txk_5g_group_sel()
1066 rtw89_write_rf(rtwdev, path, RR_TXIG, RR_TXIG_TG, a_gain_bb[gp]); in _txk_5g_group_sel()
1075 notready = _iqk_one_shot(rtwdev, phy_idx, path, ID_NBTXK); in _txk_5g_group_sel()
1076 iqk_info->nb_txcfir[path] = in _txk_5g_group_sel()
1079 rtw89_phy_write32_mask(rtwdev, R_KIP_IQP + (path << 8), in _txk_5g_group_sel()
1081 notready = _iqk_one_shot(rtwdev, phy_idx, path, ID_TXK); in _txk_5g_group_sel()
1088 rtw89_phy_write32_mask(rtwdev, R_TXIQC + (path << 8), in _txk_5g_group_sel()
1089 MASKDWORD, iqk_info->nb_txcfir[path] | 0x2); in _txk_5g_group_sel()
1090 iqk_info->is_wb_txiqk[path] = false; in _txk_5g_group_sel()
1092 rtw89_phy_write32_mask(rtwdev, R_TXIQC + (path << 8), in _txk_5g_group_sel()
1094 iqk_info->is_wb_txiqk[path] = true; in _txk_5g_group_sel()
1098 "[IQK]S%x, kfail = 0x%x, 0x8%x38 = 0x%x\n", path, kfail, in _txk_5g_group_sel()
1099 1 << path, iqk_info->nb_txcfir[path]); in _txk_5g_group_sel()
1104 enum rtw89_phy_idx phy_idx, u8 path) in _txk_2g_group_sel() argument
1114 rtw89_write_rf(rtwdev, path, RR_TXIG, RR_TXIG_GR0, g_power_range[gp]); in _txk_2g_group_sel()
1115 rtw89_write_rf(rtwdev, path, RR_TXIG, RR_TXIG_GR1, g_track_range[gp]); in _txk_2g_group_sel()
1116 rtw89_write_rf(rtwdev, path, RR_TXIG, RR_TXIG_TG, g_gain_bb[gp]); in _txk_2g_group_sel()
1125 notready = _iqk_one_shot(rtwdev, phy_idx, path, ID_NBTXK); in _txk_2g_group_sel()
1126 iqk_info->nb_txcfir[path] = in _txk_2g_group_sel()
1129 rtw89_phy_write32_mask(rtwdev, R_KIP_IQP + (path << 8), in _txk_2g_group_sel()
1131 notready = _iqk_one_shot(rtwdev, phy_idx, path, ID_TXK); in _txk_2g_group_sel()
1138 rtw89_phy_write32_mask(rtwdev, R_TXIQC + (path << 8), in _txk_2g_group_sel()
1139 MASKDWORD, iqk_info->nb_txcfir[path] | 0x2); in _txk_2g_group_sel()
1140 iqk_info->is_wb_txiqk[path] = false; in _txk_2g_group_sel()
1142 rtw89_phy_write32_mask(rtwdev, R_TXIQC + (path << 8), in _txk_2g_group_sel()
1144 iqk_info->is_wb_txiqk[path] = true; in _txk_2g_group_sel()
1148 "[IQK]S%x, kfail = 0x%x, 0x8%x38 = 0x%x\n", path, kfail, in _txk_2g_group_sel()
1149 1 << path, iqk_info->nb_txcfir[path]); in _txk_2g_group_sel()
1154 u8 path) in _iqk_5g_nbtxk() argument
1164 rtw89_write_rf(rtwdev, path, RR_TXIG, RR_TXIG_GR0, a_power_range[gp]); in _iqk_5g_nbtxk()
1165 rtw89_write_rf(rtwdev, path, RR_TXIG, RR_TXIG_GR1, a_track_range[gp]); in _iqk_5g_nbtxk()
1166 rtw89_write_rf(rtwdev, path, RR_TXIG, RR_TXIG_TG, a_gain_bb[gp]); in _iqk_5g_nbtxk()
1175 notready = _iqk_one_shot(rtwdev, phy_idx, path, ID_NBTXK); in _iqk_5g_nbtxk()
1176 iqk_info->nb_txcfir[path] = in _iqk_5g_nbtxk()
1184 rtw89_phy_write32_mask(rtwdev, R_TXIQC + (path << 8), in _iqk_5g_nbtxk()
1186 iqk_info->is_wb_rxiqk[path] = false; in _iqk_5g_nbtxk()
1188 iqk_info->is_wb_rxiqk[path] = false; in _iqk_5g_nbtxk()
1192 "[IQK]S%x, kfail = 0x%x, 0x8%x38 = 0x%x\n", path, kfail, in _iqk_5g_nbtxk()
1193 1 << path, iqk_info->nb_txcfir[path]); in _iqk_5g_nbtxk()
1198 u8 path) in _iqk_2g_nbtxk() argument
1208 rtw89_write_rf(rtwdev, path, RR_TXIG, RR_TXIG_GR0, g_power_range[gp]); in _iqk_2g_nbtxk()
1209 rtw89_write_rf(rtwdev, path, RR_TXIG, RR_TXIG_GR1, g_track_range[gp]); in _iqk_2g_nbtxk()
1210 rtw89_write_rf(rtwdev, path, RR_TXIG, RR_TXIG_TG, g_gain_bb[gp]); in _iqk_2g_nbtxk()
1219 notready = _iqk_one_shot(rtwdev, phy_idx, path, ID_NBTXK); in _iqk_2g_nbtxk()
1220 iqk_info->nb_txcfir[path] = in _iqk_2g_nbtxk()
1221 rtw89_phy_read32_mask(rtwdev, R_TXIQC + (path << 8), in _iqk_2g_nbtxk()
1229 rtw89_phy_write32_mask(rtwdev, R_TXIQC + (path << 8), in _iqk_2g_nbtxk()
1231 iqk_info->is_wb_rxiqk[path] = false; in _iqk_2g_nbtxk()
1233 iqk_info->is_wb_rxiqk[path] = false; in _iqk_2g_nbtxk()
1237 "[IQK]S%x, kfail = 0x%x, 0x8%x38 = 0x%x\n", path, kfail, in _iqk_2g_nbtxk()
1238 1 << path, iqk_info->nb_txcfir[path]); in _iqk_2g_nbtxk()
1243 u8 path) in _iqk_2g_lok() argument
1267 0x00000109 | (1 << (4 + path))); in _iqk_2g_lok()
1268 fail |= _iqk_check_cal(rtwdev, path); in _iqk_2g_lok()
1273 0x00000309 | (1 << (4 + path))); in _iqk_2g_lok()
1274 fail |= _iqk_check_cal(rtwdev, path); in _iqk_2g_lok()
1296 u8 path) in _iqk_5g_lok() argument
1320 0x00000109 | (1 << (4 + path))); in _iqk_5g_lok()
1321 fail |= _iqk_check_cal(rtwdev, path); in _iqk_5g_lok()
1327 0x00000309 | (1 << (4 + path))); in _iqk_5g_lok()
1328 fail |= _iqk_check_cal(rtwdev, path); in _iqk_5g_lok()
1349 static void _iqk_txk_setting(struct rtw89_dev *rtwdev, u8 path) in _iqk_txk_setting() argument
1353 switch (iqk_info->iqk_band[path]) { in _iqk_txk_setting()
1370 u8 path) in _iqk_by_path() argument
1379 _iqk_txk_setting(rtwdev, path); in _iqk_by_path()
1380 if (iqk_info->iqk_band[path] == RTW89_BAND_2G) in _iqk_by_path()
1381 lok_is_fail = _iqk_2g_lok(rtwdev, phy_idx, path); in _iqk_by_path()
1383 lok_is_fail = _iqk_5g_lok(rtwdev, phy_idx, path); in _iqk_by_path()
1390 if (iqk_info->iqk_band[path] == RTW89_BAND_2G) in _iqk_by_path()
1391 iqk_info->iqk_tx_fail[0][path] = in _iqk_by_path()
1392 _iqk_2g_nbtxk(rtwdev, phy_idx, path); in _iqk_by_path()
1394 iqk_info->iqk_tx_fail[0][path] = in _iqk_by_path()
1395 _iqk_5g_nbtxk(rtwdev, phy_idx, path); in _iqk_by_path()
1397 if (iqk_info->iqk_band[path] == RTW89_BAND_2G) in _iqk_by_path()
1398 iqk_info->iqk_tx_fail[0][path] = in _iqk_by_path()
1399 _txk_2g_group_sel(rtwdev, phy_idx, path); in _iqk_by_path()
1401 iqk_info->iqk_tx_fail[0][path] = in _iqk_by_path()
1402 _txk_5g_group_sel(rtwdev, phy_idx, path); in _iqk_by_path()
1405 _iqk_rxclk_setting(rtwdev, path); in _iqk_by_path()
1406 _iqk_rxk_setting(rtwdev, path); in _iqk_by_path()
1407 _adc_fifo_rst(rtwdev, phy_idx, path); in _iqk_by_path()
1410 if (iqk_info->iqk_band[path] == RTW89_BAND_2G) in _iqk_by_path()
1411 iqk_info->iqk_rx_fail[0][path] = in _iqk_by_path()
1412 _iqk_2g_nbrxk(rtwdev, phy_idx, path); in _iqk_by_path()
1414 iqk_info->iqk_rx_fail[0][path] = in _iqk_by_path()
1415 _iqk_5g_nbrxk(rtwdev, phy_idx, path); in _iqk_by_path()
1417 if (iqk_info->iqk_band[path] == RTW89_BAND_2G) in _iqk_by_path()
1418 iqk_info->iqk_rx_fail[0][path] = in _iqk_by_path()
1419 _rxk_2g_group_sel(rtwdev, phy_idx, path); in _iqk_by_path()
1421 iqk_info->iqk_rx_fail[0][path] = in _iqk_by_path()
1422 _rxk_5g_group_sel(rtwdev, phy_idx, path); in _iqk_by_path()
1486 u8 path, enum rtw89_chanctx_idx chanctx_idx) in _iqk_get_ch_info() argument
1492 iqk_info->iqk_band[path] = chan->band_type; in _iqk_get_ch_info()
1493 iqk_info->iqk_bw[path] = chan->band_width; in _iqk_get_ch_info()
1494 iqk_info->iqk_ch[path] = chan->channel; in _iqk_get_ch_info()
1495 iqk_info->iqk_table_idx[path] = idx; in _iqk_get_ch_info()
1498 path, phy, rtwdev->dbcc_en ? "on" : "off", in _iqk_get_ch_info()
1499 iqk_info->iqk_band[path] == 0 ? "2G" : in _iqk_get_ch_info()
1500 iqk_info->iqk_band[path] == 1 ? "5G" : "6G", in _iqk_get_ch_info()
1501 iqk_info->iqk_ch[path], in _iqk_get_ch_info()
1502 iqk_info->iqk_bw[path] == 0 ? "20M" : in _iqk_get_ch_info()
1503 iqk_info->iqk_bw[path] == 1 ? "40M" : "80M"); in _iqk_get_ch_info()
1507 path, iqk_info->syn1to2); in _iqk_get_ch_info()
1511 u8 path) in _iqk_start_iqk() argument
1513 _iqk_by_path(rtwdev, phy_idx, path); in _iqk_start_iqk()
1516 static void _iqk_restore(struct rtw89_dev *rtwdev, u8 path) in _iqk_restore() argument
1524 fail = _iqk_check_cal(rtwdev, path); in _iqk_restore()
1536 enum rtw89_phy_idx phy_idx, u8 path) in _iqk_afebb_restore() argument
1541 static void _iqk_preset(struct rtw89_dev *rtwdev, u8 path) in _iqk_preset() argument
1545 rtw89_write_rf(rtwdev, path, RR_RSV1, RR_RSV1_RST, 0x0); in _iqk_preset()
1551 enum rtw89_phy_idx phy_idx, u8 path) in _iqk_macbb_setting() argument
1561 u8 idx, path; in _iqk_init() local
1580 for (path = 0; path < RF_PATH_NUM_8851B; path++) { in _iqk_init()
1581 iqk_info->lok_cor_fail[idx][path] = false; in _iqk_init()
1582 iqk_info->lok_fin_fail[idx][path] = false; in _iqk_init()
1583 iqk_info->iqk_tx_fail[idx][path] = false; in _iqk_init()
1584 iqk_info->iqk_rx_fail[idx][path] = false; in _iqk_init()
1585 iqk_info->iqk_table_idx[path] = 0x0; in _iqk_init()
1591 enum rtw89_phy_idx phy_idx, u8 path, in _doiqk() argument
1608 _iqk_get_ch_info(rtwdev, phy_idx, path, chanctx_idx); in _doiqk()
1611 _rfk_backup_rf_reg(rtwdev, &backup_rf_val[path][0], path); in _doiqk()
1612 _iqk_macbb_setting(rtwdev, phy_idx, path); in _doiqk()
1613 _iqk_preset(rtwdev, path); in _doiqk()
1614 _iqk_start_iqk(rtwdev, phy_idx, path); in _doiqk()
1615 _iqk_restore(rtwdev, path); in _doiqk()
1616 _iqk_afebb_restore(rtwdev, phy_idx, path); in _doiqk()
1618 _rfk_restore_rf_reg(rtwdev, &backup_rf_val[path][0], path); in _doiqk()
1631 u32 reg_bkup[][DPK_KIP_REG_NUM_8851B], u8 path) in _dpk_bkup_kip() argument
1636 reg_bkup[path][i] = in _dpk_bkup_kip()
1637 rtw89_phy_read32_mask(rtwdev, reg[i] + (path << 8), MASKDWORD); in _dpk_bkup_kip()
1640 reg[i] + (path << 8), reg_bkup[path][i]); in _dpk_bkup_kip()
1645 u32 rf_bkup[][DPK_RF_REG_NUM_8851B], u8 path) in _dpk_bkup_rf() argument
1650 rf_bkup[path][i] = rtw89_read_rf(rtwdev, path, rf_reg[i], RFREG_MASK); in _dpk_bkup_rf()
1653 path, rf_reg[i], rf_bkup[path][i]); in _dpk_bkup_rf()
1658 u32 reg_bkup[][DPK_KIP_REG_NUM_8851B], u8 path) in _dpk_reload_kip() argument
1663 rtw89_phy_write32_mask(rtwdev, reg[i] + (path << 8), MASKDWORD, in _dpk_reload_kip()
1664 reg_bkup[path][i]); in _dpk_reload_kip()
1668 reg[i] + (path << 8), reg_bkup[path][i]); in _dpk_reload_kip()
1673 u32 rf_bkup[][DPK_RF_REG_NUM_8851B], u8 path) in _dpk_reload_rf() argument
1678 rtw89_write_rf(rtwdev, path, rf_reg[i], RFREG_MASK, rf_bkup[path][i]); in _dpk_reload_rf()
1681 "[DPK] Reload RF S%d 0x%x = %x\n", path, in _dpk_reload_rf()
1682 rf_reg[i], rf_bkup[path][i]); in _dpk_reload_rf()
1687 enum rtw89_rf_path path, enum dpk_id id) in _dpk_one_shot() argument
1693 dpk_cmd = ((id << 8) | (0x19 + path * 0x12)); in _dpk_one_shot()
1726 static void _dpk_onoff(struct rtw89_dev *rtwdev, enum rtw89_rf_path path, in _dpk_onoff() argument
1730 u8 kidx = dpk->cur_idx[path]; in _dpk_onoff()
1734 val = dpk->is_dpk_enable * off_reverse * dpk->bp[path][kidx].path_ok; in _dpk_onoff()
1736 rtw89_phy_write32_mask(rtwdev, R_DPD_CH0A + (path << 8) + (kidx << 2), in _dpk_onoff()
1739 rtw89_debug(rtwdev, RTW89_DBG_RFK, "[DPK] S%d[%d] DPK %s !!!\n", path, in _dpk_onoff()
1743 static void _dpk_init(struct rtw89_dev *rtwdev, enum rtw89_rf_path path) in _dpk_init() argument
1747 u8 kidx = dpk->cur_idx[path]; in _dpk_init()
1749 dpk->bp[path][kidx].path_ok = 0; in _dpk_init()
1753 enum rtw89_rf_path path, enum rtw89_chanctx_idx chanctx_idx) in _dpk_information() argument
1758 u8 kidx = dpk->cur_idx[path]; in _dpk_information()
1760 dpk->bp[path][kidx].band = chan->band_type; in _dpk_information()
1761 dpk->bp[path][kidx].ch = chan->band_width; in _dpk_information()
1762 dpk->bp[path][kidx].bw = chan->channel; in _dpk_information()
1766 path, dpk->cur_idx[path], phy, in _dpk_information()
1767 rtwdev->is_tssi_mode[path] ? "on" : "off", in _dpk_information()
1769 dpk->bp[path][kidx].band == 0 ? "2G" : in _dpk_information()
1770 dpk->bp[path][kidx].band == 1 ? "5G" : "6G", in _dpk_information()
1771 dpk->bp[path][kidx].ch, in _dpk_information()
1772 dpk->bp[path][kidx].bw == 0 ? "20M" : in _dpk_information()
1773 dpk->bp[path][kidx].bw == 1 ? "40M" : in _dpk_information()
1774 dpk->bp[path][kidx].bw == 2 ? "80M" : "160M"); in _dpk_information()
1777 static void _dpk_rxagc_onoff(struct rtw89_dev *rtwdev, enum rtw89_rf_path path, in _dpk_rxagc_onoff() argument
1780 if (path == RF_PATH_A) in _dpk_rxagc_onoff()
1785 rtw89_debug(rtwdev, RTW89_DBG_RFK, "[DPK] S%d RXAGC is %s\n", path, in _dpk_rxagc_onoff()
1789 static void _dpk_bb_afe_setting(struct rtw89_dev *rtwdev, enum rtw89_rf_path path) in _dpk_bb_afe_setting() argument
1791 rtw89_phy_write32_mask(rtwdev, R_ADC_FIFO, BIT(16 + path), 0x1); in _dpk_bb_afe_setting()
1792 rtw89_phy_write32_mask(rtwdev, R_ADC_FIFO, BIT(20 + path), 0x0); in _dpk_bb_afe_setting()
1793 rtw89_phy_write32_mask(rtwdev, R_ADC_FIFO, BIT(24 + path), 0x1); in _dpk_bb_afe_setting()
1794 rtw89_phy_write32_mask(rtwdev, R_ADC_FIFO, BIT(28 + path), 0x0); in _dpk_bb_afe_setting()
1795 rtw89_phy_write32_mask(rtwdev, R_UPD_CLK + (path << 13), MASKDWORD, 0xd801dffd); in _dpk_bb_afe_setting()
1799 rtw89_phy_write32_mask(rtwdev, R_ADC_FIFO, BIT(20 + path), 0x1); in _dpk_bb_afe_setting()
1800 rtw89_phy_write32_mask(rtwdev, R_ADC_FIFO, BIT(28 + path), 0x1); in _dpk_bb_afe_setting()
1802 rtw89_debug(rtwdev, RTW89_DBG_RFK, "[DPK] S%d BB/AFE setting\n", path); in _dpk_bb_afe_setting()
1805 static void _dpk_bb_afe_restore(struct rtw89_dev *rtwdev, enum rtw89_rf_path path) in _dpk_bb_afe_restore() argument
1807 rtw89_phy_write32_mask(rtwdev, R_P0_NRBW + (path << 13), B_P0_NRBW_DBG, 0x0); in _dpk_bb_afe_restore()
1808 rtw89_phy_write32_mask(rtwdev, R_ADC_FIFO, BIT(16 + path), 0x1); in _dpk_bb_afe_restore()
1809 rtw89_phy_write32_mask(rtwdev, R_ADC_FIFO, BIT(20 + path), 0x0); in _dpk_bb_afe_restore()
1810 rtw89_phy_write32_mask(rtwdev, R_ADC_FIFO, BIT(24 + path), 0x1); in _dpk_bb_afe_restore()
1811 rtw89_phy_write32_mask(rtwdev, R_ADC_FIFO, BIT(28 + path), 0x0); in _dpk_bb_afe_restore()
1812 rtw89_phy_write32_mask(rtwdev, R_UPD_CLK + (path << 13), MASKDWORD, 0x00000000); in _dpk_bb_afe_restore()
1813 rtw89_phy_write32_mask(rtwdev, R_P0_RXCK + (path << 13), B_P0_TXCK_ALL, 0x00); in _dpk_bb_afe_restore()
1814 rtw89_phy_write32_mask(rtwdev, R_ADC_FIFO, BIT(16 + path), 0x0); in _dpk_bb_afe_restore()
1815 rtw89_phy_write32_mask(rtwdev, R_ADC_FIFO, BIT(24 + path), 0x0); in _dpk_bb_afe_restore()
1817 rtw89_debug(rtwdev, RTW89_DBG_RFK, "[DPK] S%d BB/AFE restore\n", path); in _dpk_bb_afe_restore()
1820 static void _dpk_tssi_pause(struct rtw89_dev *rtwdev, enum rtw89_rf_path path, in _dpk_tssi_pause() argument
1823 rtw89_phy_write32_mask(rtwdev, R_P0_TSSI_TRK + (path << 13), in _dpk_tssi_pause()
1826 rtw89_debug(rtwdev, RTW89_DBG_RFK, "[DPK] S%d TSSI %s\n", path, in _dpk_tssi_pause()
1830 static void _dpk_tpg_sel(struct rtw89_dev *rtwdev, enum rtw89_rf_path path, u8 kidx) in _dpk_tpg_sel() argument
1834 if (dpk->bp[path][kidx].bw == RTW89_CHANNEL_WIDTH_80) { in _dpk_tpg_sel()
1837 } else if (dpk->bp[path][kidx].bw == RTW89_CHANNEL_WIDTH_40) { in _dpk_tpg_sel()
1846 dpk->bp[path][kidx].bw == RTW89_CHANNEL_WIDTH_80 ? "80M" : in _dpk_tpg_sel()
1847 dpk->bp[path][kidx].bw == RTW89_CHANNEL_WIDTH_40 ? "40M" : "20M"); in _dpk_tpg_sel()
1851 enum rtw89_rf_path path, bool force) in _dpk_txpwr_bb_force() argument
1853 rtw89_phy_write32_mask(rtwdev, R_TXPWRB + (path << 13), B_TXPWRB_ON, force); in _dpk_txpwr_bb_force()
1854 rtw89_phy_write32_mask(rtwdev, R_TXPWRB_H + (path << 13), B_TXPWRB_RDY, force); in _dpk_txpwr_bb_force()
1857 path, force ? "on" : "off"); in _dpk_txpwr_bb_force()
1873 enum rtw89_rf_path path, bool ctrl_by_kip) in _dpk_kip_control_rfc() argument
1875 rtw89_phy_write32_mask(rtwdev, R_UPD_CLK + (path << 13), in _dpk_kip_control_rfc()
1883 enum rtw89_rf_path path, u8 kidx) in _dpk_kip_preset() argument
1886 rtw89_read_rf(rtwdev, path, RR_MOD, RFREG_MASK)); in _dpk_kip_preset()
1887 rtw89_phy_write32_mask(rtwdev, R_DPD_CH0A + (path << 8) + (kidx << 2), in _dpk_kip_preset()
1890 _dpk_kip_control_rfc(rtwdev, path, true); in _dpk_kip_preset()
1891 _dpk_one_shot(rtwdev, phy, path, D_KIP_PRESET); in _dpk_kip_preset()
1895 enum rtw89_rf_path path) in _dpk_kip_restore() argument
1897 _dpk_one_shot(rtwdev, phy, path, D_KIP_RESTORE); in _dpk_kip_restore()
1898 _dpk_kip_control_rfc(rtwdev, path, false); in _dpk_kip_restore()
1899 _dpk_txpwr_bb_force(rtwdev, path, false); in _dpk_kip_restore()
1901 rtw89_debug(rtwdev, RTW89_DBG_RFK, "[DPK] S%d restore KIP\n", path); in _dpk_kip_restore()
1904 static void _dpk_kset_query(struct rtw89_dev *rtwdev, enum rtw89_rf_path path) in _dpk_kset_query() argument
1908 rtw89_phy_write32_mask(rtwdev, R_KIP_RPT + (path << 8), B_KIP_RPT_SEL, 0x10); in _dpk_kset_query()
1911 rtw89_phy_read32_mask(rtwdev, R_RPT_PER + (path << 8), B_RPT_PER_KSET) - 1; in _dpk_kset_query()
1914 static void _dpk_para_query(struct rtw89_dev *rtwdev, enum rtw89_rf_path path, u8 kidx) in _dpk_para_query() argument
1929 para = rtw89_phy_read32_mask(rtwdev, reg[kidx][cur_k_set] + (path << 8), in _dpk_para_query()
1932 dpk->bp[path][kidx].txagc_dpk = (para >> 10) & 0x3f; in _dpk_para_query()
1933 dpk->bp[path][kidx].ther_dpk = (para >> 26) & 0x3f; in _dpk_para_query()
1937 dpk->cur_k_set, dpk->bp[path][kidx].ther_dpk, in _dpk_para_query()
1938 dpk->bp[path][kidx].txagc_dpk); in _dpk_para_query()
1941 static bool _dpk_sync_check(struct rtw89_dev *rtwdev, enum rtw89_rf_path path, u8 kidx) in _dpk_sync_check() argument
1952 dpk->corr_idx[path][kidx] = corr_idx; in _dpk_sync_check()
1953 dpk->corr_val[path][kidx] = corr_val; in _dpk_sync_check()
1965 path, corr_idx, corr_val, dc_i, dc_q); in _dpk_sync_check()
1967 dpk->dc_i[path][kidx] = dc_i; in _dpk_sync_check()
1968 dpk->dc_q[path][kidx] = dc_q; in _dpk_sync_check()
1978 path, rxbb, in _dpk_sync_check()
1989 enum rtw89_rf_path path, u8 dbm, in _dpk_kip_set_txagc() argument
1996 "[DPK] set S%d txagc to %ddBm\n", path, dbm); in _dpk_kip_set_txagc()
1997 rtw89_phy_write32_mask(rtwdev, R_TXPWRB + (path << 13), in _dpk_kip_set_txagc()
2001 _dpk_one_shot(rtwdev, phy, path, D_TXAGC); in _dpk_kip_set_txagc()
2002 _dpk_kset_query(rtwdev, path); in _dpk_kip_set_txagc()
2006 enum rtw89_rf_path path, u8 kidx) in _dpk_kip_set_rxagc() argument
2008 _dpk_kip_control_rfc(rtwdev, path, false); in _dpk_kip_set_rxagc()
2010 rtw89_read_rf(rtwdev, path, RR_MOD, RFREG_MASK)); in _dpk_kip_set_rxagc()
2011 _dpk_kip_control_rfc(rtwdev, path, true); in _dpk_kip_set_rxagc()
2013 _dpk_one_shot(rtwdev, phy, path, D_RXAGC); in _dpk_kip_set_rxagc()
2014 return _dpk_sync_check(rtwdev, path, kidx); in _dpk_kip_set_rxagc()
2018 enum rtw89_rf_path path) in _dpk_lbk_rxiqk() argument
2023 rtw89_phy_write32_mask(rtwdev, R_DPD_V1 + (path << 8), B_DPD_LBK, 0x1); in _dpk_lbk_rxiqk()
2026 _dpk_kip_control_rfc(rtwdev, path, false); in _dpk_lbk_rxiqk()
2028 cur_rxbb = rtw89_read_rf(rtwdev, path, RR_MOD, RR_MOD_RXB); in _dpk_lbk_rxiqk()
2029 rf_11 = rtw89_read_rf(rtwdev, path, RR_TXIG, RFREG_MASK); in _dpk_lbk_rxiqk()
2030 reg_81cc = rtw89_phy_read32_mask(rtwdev, R_KIP_IQP + (path << 8), in _dpk_lbk_rxiqk()
2033 rtw89_write_rf(rtwdev, path, RR_TXIG, RR_TXIG_GR0, 0x0); in _dpk_lbk_rxiqk()
2034 rtw89_write_rf(rtwdev, path, RR_TXIG, RR_TXIG_GR1, 0x3); in _dpk_lbk_rxiqk()
2035 rtw89_write_rf(rtwdev, path, RR_TXIG, RR_TXIG_TG, 0xd); in _dpk_lbk_rxiqk()
2036 rtw89_write_rf(rtwdev, path, RR_MOD, RR_MOD_RXB, 0x1f); in _dpk_lbk_rxiqk()
2038 rtw89_phy_write32_mask(rtwdev, R_KIP_IQP + (path << 8), B_KIP_IQP_IQSW, 0x12); in _dpk_lbk_rxiqk()
2039 rtw89_phy_write32_mask(rtwdev, R_KIP_IQP + (path << 8), B_KIP_IQP_SW, 0x3); in _dpk_lbk_rxiqk()
2041 _dpk_kip_control_rfc(rtwdev, path, true); in _dpk_lbk_rxiqk()
2045 _dpk_one_shot(rtwdev, phy, path, LBK_RXIQK); in _dpk_lbk_rxiqk()
2047 rtw89_debug(rtwdev, RTW89_DBG_RFK, "[DPK] S%d LBK RXIQC = 0x%x\n", path, in _dpk_lbk_rxiqk()
2048 rtw89_phy_read32_mask(rtwdev, R_RXIQC + (path << 8), MASKDWORD)); in _dpk_lbk_rxiqk()
2050 _dpk_kip_control_rfc(rtwdev, path, false); in _dpk_lbk_rxiqk()
2052 rtw89_write_rf(rtwdev, path, RR_TXIG, RFREG_MASK, rf_11); in _dpk_lbk_rxiqk()
2053 rtw89_write_rf(rtwdev, path, RR_MOD, RR_MOD_RXB, cur_rxbb); in _dpk_lbk_rxiqk()
2054 rtw89_phy_write32_mask(rtwdev, R_KIP_IQP + (path << 8), B_KIP_IQP_SW, reg_81cc); in _dpk_lbk_rxiqk()
2058 rtw89_phy_write32_mask(rtwdev, R_LOAD_COEF + (path << 8), B_LOAD_COEF_DI, 0x1); in _dpk_lbk_rxiqk()
2060 _dpk_kip_control_rfc(rtwdev, path, true); in _dpk_lbk_rxiqk()
2063 static void _dpk_rf_setting(struct rtw89_dev *rtwdev, enum rtw89_rf_path path, u8 kidx) in _dpk_rf_setting() argument
2067 if (dpk->bp[path][kidx].band == RTW89_BAND_2G) { in _dpk_rf_setting()
2068 rtw89_write_rf(rtwdev, path, RR_MOD, RFREG_MASK, 0x50521); in _dpk_rf_setting()
2069 rtw89_write_rf(rtwdev, path, RR_MOD_V1, RR_MOD_MASK, RF_DPK); in _dpk_rf_setting()
2070 rtw89_write_rf(rtwdev, path, RR_RXBB, RR_RXBB_ATTC, 0x0); in _dpk_rf_setting()
2071 rtw89_write_rf(rtwdev, path, RR_RXBB, RR_RXBB_ATTR, 0x7); in _dpk_rf_setting()
2073 rtw89_write_rf(rtwdev, path, RR_MOD, RFREG_MASK, in _dpk_rf_setting()
2075 rtw89_write_rf(rtwdev, path, RR_MOD_V1, RR_MOD_MASK, RF_DPK); in _dpk_rf_setting()
2076 rtw89_write_rf(rtwdev, path, RR_RXA2, RR_RAA2_SATT, 0x3); in _dpk_rf_setting()
2079 rtw89_write_rf(rtwdev, path, RR_RCKD, RR_RCKD_BW, 0x1); in _dpk_rf_setting()
2080 rtw89_write_rf(rtwdev, path, RR_BTC, RR_BTC_TXBB, dpk->bp[path][kidx].bw + 1); in _dpk_rf_setting()
2081 rtw89_write_rf(rtwdev, path, RR_BTC, RR_BTC_RXBB, 0x0); in _dpk_rf_setting()
2082 rtw89_write_rf(rtwdev, path, RR_RXBB2, RR_RXBB2_EBW, 0x0); in _dpk_rf_setting()
2085 static void _dpk_bypass_rxiqc(struct rtw89_dev *rtwdev, enum rtw89_rf_path path) in _dpk_bypass_rxiqc() argument
2087 rtw89_phy_write32_mask(rtwdev, R_DPD_V1 + (path << 8), B_DPD_LBK, 0x1); in _dpk_bypass_rxiqc()
2088 rtw89_phy_write32_mask(rtwdev, R_RXIQC + (path << 8), MASKDWORD, 0x40000002); in _dpk_bypass_rxiqc()
2119 enum rtw89_rf_path path, u8 kidx) in _dpk_gainloss() argument
2121 _dpk_one_shot(rtwdev, phy, path, D_GAIN_LOSS); in _dpk_gainloss()
2122 _dpk_kip_set_txagc(rtwdev, phy, path, 0xff, false); in _dpk_gainloss()
2124 rtw89_phy_write32_mask(rtwdev, R_DPK_GL + (path << 8), B_DPK_GL_A1, 0xf078); in _dpk_gainloss()
2125 rtw89_phy_write32_mask(rtwdev, R_DPK_GL + (path << 8), B_DPK_GL_A0, 0x0); in _dpk_gainloss()
2177 enum rtw89_rf_path path, u8 kidx, u8 init_xdbm, u8 loss_only) in _dpk_agc() argument
2191 is_fail = _dpk_kip_set_rxagc(rtwdev, phy, path, kidx); in _dpk_agc()
2201 _dpk_one_shot(rtwdev, phy, path, D_SYNC); in _dpk_agc()
2206 if (dpk->bp[path][kidx].band == RTW89_BAND_2G) in _dpk_agc()
2207 _dpk_bypass_rxiqc(rtwdev, path); in _dpk_agc()
2209 _dpk_lbk_rxiqk(rtwdev, phy, path); in _dpk_agc()
2215 tmp_gl_idx = _dpk_gainloss(rtwdev, phy, path, kidx); in _dpk_agc()
2235 _dpk_kip_set_txagc(rtwdev, phy, path, tmp_dbm, true); in _dpk_agc()
2248 _dpk_kip_set_txagc(rtwdev, phy, path, tmp_dbm, true); in _dpk_agc()
2255 _dpk_kip_control_rfc(rtwdev, path, false); in _dpk_agc()
2256 tmp_rxbb = rtw89_read_rf(rtwdev, path, RR_MOD, RR_MOD_RXB); in _dpk_agc()
2259 rtw89_write_rf(rtwdev, path, RR_MOD, RR_MOD_RXB, tmp_rxbb); in _dpk_agc()
2264 _dpk_kip_control_rfc(rtwdev, path, true); in _dpk_agc()
2316 enum rtw89_rf_path path, u8 kidx) in _dpk_idl_mpa() argument
2330 _dpk_one_shot(rtwdev, phy, path, D_MDPK_IDL); in _dpk_idl_mpa()
2361 enum rtw89_rf_path path, u8 kidx, bool is_execute) in _dpk_gain_normalize() argument
2376 rtw89_phy_write32_mask(rtwdev, R_DPK_GN + (path << 8), in _dpk_gain_normalize()
2378 rtw89_phy_write32_mask(rtwdev, R_DPK_GN + (path << 8), in _dpk_gain_normalize()
2381 _dpk_one_shot(rtwdev, phy, path, D_GAIN_NORM); in _dpk_gain_normalize()
2383 rtw89_phy_write32_mask(rtwdev, reg[kidx][cur_k_set] + (path << 8), in _dpk_gain_normalize()
2387 dpk->bp[path][kidx].gs = in _dpk_gain_normalize()
2388 rtw89_phy_read32_mask(rtwdev, reg[kidx][cur_k_set] + (path << 8), in _dpk_gain_normalize()
2393 enum rtw89_rf_path path, u8 kidx) in _dpk_on() argument
2397 rtw89_phy_write32_mask(rtwdev, R_LOAD_COEF + (path << 8), B_LOAD_COEF_MDPD, 0x1); in _dpk_on()
2398 rtw89_phy_write32_mask(rtwdev, R_LOAD_COEF + (path << 8), B_LOAD_COEF_MDPD, 0x0); in _dpk_on()
2399 rtw89_phy_write32_mask(rtwdev, R_DPD_CH0A + (path << 8) + (kidx << 2), in _dpk_on()
2402 dpk->bp[path][kidx].path_ok = in _dpk_on()
2403 dpk->bp[path][kidx].path_ok | BIT(dpk->cur_k_set); in _dpk_on()
2406 path, kidx, dpk->bp[path][kidx].path_ok); in _dpk_on()
2408 rtw89_phy_write32_mask(rtwdev, R_DPD_CH0A + (path << 8) + (kidx << 2), in _dpk_on()
2409 B_DPD_MEN, dpk->bp[path][kidx].path_ok); in _dpk_on()
2411 _dpk_gain_normalize(rtwdev, phy, path, kidx, false); in _dpk_on()
2415 enum rtw89_rf_path path) in _dpk_main() argument
2418 u8 kidx = dpk->cur_idx[path]; in _dpk_main()
2422 if (dpk->bp[path][kidx].band != RTW89_BAND_2G) in _dpk_main()
2425 _dpk_kip_control_rfc(rtwdev, path, false); in _dpk_main()
2426 _rfk_rf_direct_cntrl(rtwdev, path, false); in _dpk_main()
2427 rtw89_write_rf(rtwdev, path, RR_BBDC, RFREG_MASK, 0x03ffd); in _dpk_main()
2429 _dpk_rf_setting(rtwdev, path, kidx); in _dpk_main()
2430 _set_rx_dck(rtwdev, path, RF_DPK); in _dpk_main()
2433 _dpk_kip_preset(rtwdev, phy, path, kidx); in _dpk_main()
2434 _dpk_txpwr_bb_force(rtwdev, path, true); in _dpk_main()
2435 _dpk_kip_set_txagc(rtwdev, phy, path, init_xdbm, true); in _dpk_main()
2436 _dpk_tpg_sel(rtwdev, path, kidx); in _dpk_main()
2437 is_fail = _dpk_agc(rtwdev, phy, path, kidx, init_xdbm, false); in _dpk_main()
2441 _dpk_idl_mpa(rtwdev, phy, path, kidx); in _dpk_main()
2442 _dpk_para_query(rtwdev, path, kidx); in _dpk_main()
2444 _dpk_on(rtwdev, phy, path, kidx); in _dpk_main()
2446 _dpk_kip_control_rfc(rtwdev, path, false); in _dpk_main()
2447 rtw89_write_rf(rtwdev, path, RR_MOD, RR_MOD_MASK, RF_RX); in _dpk_main()
2449 rtw89_debug(rtwdev, RTW89_DBG_RFK, "[DPK] S%d[%d]_K%d %s\n", path, kidx, in _dpk_main()
2463 u8 path; in _dpk_cal_select() local
2465 for (path = 0; path < RF_PATH_NUM_8851B; path++) in _dpk_cal_select()
2466 dpk->cur_idx[path] = 0; in _dpk_cal_select()
2468 for (path = 0; path < RF_PATH_NUM_8851B; path++) { in _dpk_cal_select()
2469 if (!(kpath & BIT(path))) in _dpk_cal_select()
2471 _dpk_bkup_kip(rtwdev, dpk_kip_reg, kip_bkup, path); in _dpk_cal_select()
2472 _dpk_bkup_rf(rtwdev, dpk_rf_reg, rf_bkup, path); in _dpk_cal_select()
2473 _dpk_information(rtwdev, phy, path, chanctx_idx); in _dpk_cal_select()
2474 _dpk_init(rtwdev, path); in _dpk_cal_select()
2476 if (rtwdev->is_tssi_mode[path]) in _dpk_cal_select()
2477 _dpk_tssi_pause(rtwdev, path, true); in _dpk_cal_select()
2480 for (path = 0; path < RF_PATH_NUM_8851B; path++) { in _dpk_cal_select()
2481 if (!(kpath & BIT(path))) in _dpk_cal_select()
2486 path, dpk->cur_idx[path]); in _dpk_cal_select()
2488 _dpk_rxagc_onoff(rtwdev, path, false); in _dpk_cal_select()
2489 _rfk_drf_direct_cntrl(rtwdev, path, false); in _dpk_cal_select()
2490 _dpk_bb_afe_setting(rtwdev, path); in _dpk_cal_select()
2492 is_fail = _dpk_main(rtwdev, phy, path); in _dpk_cal_select()
2493 _dpk_onoff(rtwdev, path, is_fail); in _dpk_cal_select()
2496 for (path = 0; path < RF_PATH_NUM_8851B; path++) { in _dpk_cal_select()
2497 if (!(kpath & BIT(path))) in _dpk_cal_select()
2500 _dpk_kip_restore(rtwdev, phy, path); in _dpk_cal_select()
2501 _dpk_reload_kip(rtwdev, dpk_kip_reg, kip_bkup, path); in _dpk_cal_select()
2502 _dpk_reload_rf(rtwdev, dpk_rf_reg, rf_bkup, path); in _dpk_cal_select()
2503 _dpk_bb_afe_restore(rtwdev, path); in _dpk_cal_select()
2504 _dpk_rxagc_onoff(rtwdev, path, true); in _dpk_cal_select()
2506 if (rtwdev->is_tssi_mode[path]) in _dpk_cal_select()
2507 _dpk_tssi_pause(rtwdev, path, false); in _dpk_cal_select()
2529 u8 path, kidx; in _dpk_track() local
2533 for (path = 0; path < RF_PATH_NUM_8851B; path++) { in _dpk_track()
2534 kidx = dpk->cur_idx[path]; in _dpk_track()
2538 path, kidx, dpk->bp[path][kidx].ch); in _dpk_track()
2540 txagc_rf = rtw89_phy_read32_mask(rtwdev, R_TXAGC_BB + (path << 13), in _dpk_track()
2542 txagc_bb = rtw89_phy_read32_mask(rtwdev, R_TXAGC_BB + (path << 13), in _dpk_track()
2544 txagc_bb_tp = rtw89_phy_read32_mask(rtwdev, R_TXAGC_BTP + (path << 13), in _dpk_track()
2547 rtw89_phy_write32_mask(rtwdev, R_KIP_RPT + (path << 8), in _dpk_track()
2549 cur_ther = rtw89_phy_read32_mask(rtwdev, R_RPT_PER + (path << 8), in _dpk_track()
2551 txagc_ofst = rtw89_phy_read32_mask(rtwdev, R_RPT_PER + (path << 8), in _dpk_track()
2553 pwsf_tssi_ofst = rtw89_phy_read32_mask(rtwdev, R_RPT_PER + (path << 8), in _dpk_track()
2557 delta_ther = cur_ther - dpk->bp[path][kidx].ther_dpk; in _dpk_track()
2563 delta_ther, cur_ther, dpk->bp[path][kidx].ther_dpk); in _dpk_track()
2567 txagc_rf - dpk->bp[path][kidx].txagc_dpk, in _dpk_track()
2568 txagc_rf, dpk->bp[path][kidx].txagc_dpk); in _dpk_track()
2584 R_DPD_BND + (path << 8) + (kidx << 2), in _dpk_track()
2590 static void _rck(struct rtw89_dev *rtwdev, enum rtw89_rf_path path) in _rck() argument
2597 rtw89_debug(rtwdev, RTW89_DBG_RFK, "[RCK] ====== S%d RCK ======\n", path); in _rck()
2599 rf_reg5 = rtw89_read_rf(rtwdev, path, RR_RSV1, RFREG_MASK); in _rck()
2601 rtw89_write_rf(rtwdev, path, RR_RSV1, RR_RSV1_RST, 0x0); in _rck()
2602 rtw89_write_rf(rtwdev, path, RR_MOD, RR_MOD_MASK, RR_MOD_V_RX); in _rck()
2605 rtw89_read_rf(rtwdev, path, RR_MOD, RFREG_MASK)); in _rck()
2608 rtw89_write_rf(rtwdev, path, RR_RCKC, RFREG_MASK, 0x00240); in _rck()
2611 false, rtwdev, path, RR_RCKS, BIT(3)); in _rck()
2613 rck_val = rtw89_read_rf(rtwdev, path, RR_RCKC, RR_RCKC_CA); in _rck()
2618 rtw89_write_rf(rtwdev, path, RR_RCKC, RFREG_MASK, rck_val); in _rck()
2619 rtw89_write_rf(rtwdev, path, RR_RSV1, RFREG_MASK, rf_reg5); in _rck()
2622 rtw89_read_rf(rtwdev, path, RR_RCKC, RFREG_MASK)); in _rck()
2626 enum rtw89_rf_path path, const struct rtw89_chan *chan) in _tssi_set_sys() argument
2639 enum rtw89_rf_path path) in _tssi_ini_txpwr_ctrl_bb() argument
2646 enum rtw89_rf_path path) in _tssi_ini_txpwr_ctrl_bb_he_tb() argument
2652 enum rtw89_rf_path path) in _tssi_set_dck() argument
2658 enum rtw89_rf_path path, const struct rtw89_chan *chan) in _tssi_set_tmeter_tbl() argument
2701 if (path == RF_PATH_A) { in _tssi_set_tmeter_tbl()
2756 enum rtw89_rf_path path) in _tssi_set_dac_gain_tbl() argument
2762 enum rtw89_rf_path path, const struct rtw89_chan *chan) in _tssi_slope_cal_org() argument
2772 enum rtw89_rf_path path, bool all, in _tssi_alignment_default() argument
2783 enum rtw89_rf_path path) in _tssi_set_tssi_slope() argument
2789 enum rtw89_rf_path path) in _tssi_set_tssi_track() argument
2796 enum rtw89_rf_path path) in _tssi_set_txagc_offset_mv_avg() argument
2950 enum rtw89_rf_path path, const struct rtw89_chan *chan) in _tssi_get_ofdm_de() argument
2962 "[TSSI][TRIM]: path=%d mcs group_idx=0x%x\n", path, gidx); in _tssi_get_ofdm_de()
2967 de_1st = tssi_info->tssi_mcs[path][gidx_1st]; in _tssi_get_ofdm_de()
2968 de_2nd = tssi_info->tssi_mcs[path][gidx_2nd]; in _tssi_get_ofdm_de()
2973 path, val, de_1st, de_2nd); in _tssi_get_ofdm_de()
2975 val = tssi_info->tssi_mcs[path][gidx]; in _tssi_get_ofdm_de()
2978 "[TSSI][TRIM]: path=%d mcs de=%d\n", path, val); in _tssi_get_ofdm_de()
2985 enum rtw89_rf_path path, const struct rtw89_chan *chan) in _tssi_get_ofdm_trim_de() argument
2998 path, tgidx); in _tssi_get_ofdm_trim_de()
3003 tde_1st = tssi_info->tssi_trim[path][tgidx_1st]; in _tssi_get_ofdm_trim_de()
3004 tde_2nd = tssi_info->tssi_trim[path][tgidx_2nd]; in _tssi_get_ofdm_trim_de()
3009 path, val, tde_1st, tde_2nd); in _tssi_get_ofdm_trim_de()
3011 val = tssi_info->tssi_trim[path][tgidx]; in _tssi_get_ofdm_trim_de()
3015 path, val); in _tssi_get_ofdm_trim_de()
3076 static void _tssi_alimentk_dump_result(struct rtw89_dev *rtwdev, enum rtw89_rf_path path) in _tssi_alimentk_dump_result() argument
3081 R_TSSI_PA_K1 + (path << 13), in _tssi_alimentk_dump_result()
3082 rtw89_phy_read32_mask(rtwdev, R_TSSI_PA_K1 + (path << 13), MASKDWORD), in _tssi_alimentk_dump_result()
3083 R_TSSI_PA_K2 + (path << 13), in _tssi_alimentk_dump_result()
3084 rtw89_phy_read32_mask(rtwdev, R_TSSI_PA_K2 + (path << 13), MASKDWORD), in _tssi_alimentk_dump_result()
3085 R_P0_TSSI_ALIM1 + (path << 13), in _tssi_alimentk_dump_result()
3086 rtw89_phy_read32_mask(rtwdev, R_P0_TSSI_ALIM1 + (path << 13), MASKDWORD), in _tssi_alimentk_dump_result()
3087 R_P0_TSSI_ALIM3 + (path << 13), in _tssi_alimentk_dump_result()
3088 rtw89_phy_read32_mask(rtwdev, R_P0_TSSI_ALIM3 + (path << 13), MASKDWORD), in _tssi_alimentk_dump_result()
3089 R_TSSI_PA_K5 + (path << 13), in _tssi_alimentk_dump_result()
3090 rtw89_phy_read32_mask(rtwdev, R_TSSI_PA_K5 + (path << 13), MASKDWORD), in _tssi_alimentk_dump_result()
3091 R_P0_TSSI_ALIM2 + (path << 13), in _tssi_alimentk_dump_result()
3092 rtw89_phy_read32_mask(rtwdev, R_P0_TSSI_ALIM2 + (path << 13), MASKDWORD), in _tssi_alimentk_dump_result()
3093 R_P0_TSSI_ALIM4 + (path << 13), in _tssi_alimentk_dump_result()
3094 rtw89_phy_read32_mask(rtwdev, R_P0_TSSI_ALIM4 + (path << 13), MASKDWORD), in _tssi_alimentk_dump_result()
3095 R_TSSI_PA_K8 + (path << 13), in _tssi_alimentk_dump_result()
3096 rtw89_phy_read32_mask(rtwdev, R_TSSI_PA_K8 + (path << 13), MASKDWORD)); in _tssi_alimentk_dump_result()
3100 enum rtw89_phy_idx phy, enum rtw89_rf_path path, in _tssi_alimentk_done() argument
3108 "======>%s phy=%d path=%d\n", __func__, phy, path); in _tssi_alimentk_done()
3121 if (tssi_info->alignment_done[path][band]) { in _tssi_alimentk_done()
3122 rtw89_phy_write32_mask(rtwdev, R_P0_TSSI_ALIM1 + (path << 13), MASKDWORD, in _tssi_alimentk_done()
3123 tssi_info->alignment_value[path][band][0]); in _tssi_alimentk_done()
3124 rtw89_phy_write32_mask(rtwdev, R_P0_TSSI_ALIM3 + (path << 13), MASKDWORD, in _tssi_alimentk_done()
3125 tssi_info->alignment_value[path][band][1]); in _tssi_alimentk_done()
3126 rtw89_phy_write32_mask(rtwdev, R_P0_TSSI_ALIM2 + (path << 13), MASKDWORD, in _tssi_alimentk_done()
3127 tssi_info->alignment_value[path][band][2]); in _tssi_alimentk_done()
3128 rtw89_phy_write32_mask(rtwdev, R_P0_TSSI_ALIM4 + (path << 13), MASKDWORD, in _tssi_alimentk_done()
3129 tssi_info->alignment_value[path][band][3]); in _tssi_alimentk_done()
3132 _tssi_alimentk_dump_result(rtwdev, path); in _tssi_alimentk_done()
3410 static void _bw_setting(struct rtw89_dev *rtwdev, enum rtw89_rf_path path, in _bw_setting() argument
3418 rf_reg18 = rtw89_read_rf(rtwdev, path, reg18_addr, RFREG_MASK); in _bw_setting()
3421 "[RFK]Invalid RF_0x18 for Path-%d\n", path); in _bw_setting()
3445 rtw89_write_rf(rtwdev, path, reg18_addr, RFREG_MASK, rf_reg18); in _bw_setting()
3448 bw, path, reg18_addr, in _bw_setting()
3449 rtw89_read_rf(rtwdev, path, reg18_addr, RFREG_MASK)); in _bw_setting()
3536 static void _ch_setting(struct rtw89_dev *rtwdev, enum rtw89_rf_path path, in _ch_setting() argument
3545 rf_reg18 = rtw89_read_rf(rtwdev, path, reg18_addr, RFREG_MASK); in _ch_setting()
3558 if (path == RF_PATH_A && dav) in _ch_setting()
3561 rtw89_write_rf(rtwdev, path, reg18_addr, RFREG_MASK, rf_reg18); in _ch_setting()
3563 rtw89_write_rf(rtwdev, path, RR_LCKST, RR_LCKST_BIN, 0); in _ch_setting()
3564 rtw89_write_rf(rtwdev, path, RR_LCKST, RR_LCKST_BIN, 1); in _ch_setting()
3568 central_ch, path, reg18_addr, in _ch_setting()
3569 rtw89_read_rf(rtwdev, path, reg18_addr, RFREG_MASK)); in _ch_setting()
3579 enum rtw89_rf_path path) in _set_rxbb_bw() argument
3581 rtw89_write_rf(rtwdev, path, RR_LUTWE2, RR_LUTWE2_RTXBW, 0x1); in _set_rxbb_bw()
3582 rtw89_write_rf(rtwdev, path, RR_LUTWA, RR_LUTWA_M2, 0x12); in _set_rxbb_bw()
3585 rtw89_write_rf(rtwdev, path, RR_LUTWD0, RR_LUTWD0_LB, 0x1b); in _set_rxbb_bw()
3587 rtw89_write_rf(rtwdev, path, RR_LUTWD0, RR_LUTWD0_LB, 0x13); in _set_rxbb_bw()
3589 rtw89_write_rf(rtwdev, path, RR_LUTWD0, RR_LUTWD0_LB, 0xb); in _set_rxbb_bw()
3591 rtw89_write_rf(rtwdev, path, RR_LUTWD0, RR_LUTWD0_LB, 0x3); in _set_rxbb_bw()
3593 rtw89_debug(rtwdev, RTW89_DBG_RFK, "[RFK] set S%d RXBB BW 0x3F = 0x%x\n", path, in _set_rxbb_bw()
3594 rtw89_read_rf(rtwdev, path, RR_LUTWD0, RR_LUTWD0_LB)); in _set_rxbb_bw()
3596 rtw89_write_rf(rtwdev, path, RR_LUTWE2, RR_LUTWE2_RTXBW, 0x0); in _set_rxbb_bw()
3602 u8 kpath, path; in _rxbb_bw() local
3606 for (path = 0; path < RF_PATH_NUM_8851B; path++) { in _rxbb_bw()
3607 if (!(kpath & BIT(path))) in _rxbb_bw()
3610 _set_rxbb_bw(rtwdev, bw, path); in _rxbb_bw()