Lines Matching +full:sar +full:- +full:compare +full:- +full:time
1 // SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause
2 /* Copyright(c) 2019-2020 Realtek Corporation
13 #include "sar.h"
19 const struct rtw89_phy_gen_def *phy = rtwdev->chip->phy_def; in rtw89_phy0_phy1_offset()
21 return phy->phy0_phy1_offset(rtwdev, addr); in rtw89_phy0_phy1_offset()
27 u32 bit_rate = report->bit_rate; in get_max_amsdu_len()
34 if (report->might_fallback_legacy) in get_max_amsdu_len()
49 return rtwdev->chip->max_amsdu_limit; in get_max_amsdu_len()
65 ra_mask |= GENMASK_ULL(highest_mcs - gap, 0) << nss; in get_mcs_ra_mask()
68 ra_mask |= GENMASK_ULL(highest_mcs - gap * 2, 0) << nss; in get_mcs_ra_mask()
80 struct ieee80211_sta_he_cap cap = sta->deflink.he_cap; in get_he_ra_mask()
83 switch (sta->deflink.bandwidth) { in get_he_ra_mask()
123 struct ieee80211_sta_eht_cap *eht_cap = &sta->deflink.eht_cap; in get_eht_ra_mask()
126 u8 *he_phy_cap = sta->deflink.he_cap.he_cap_elem.phy_cap_info; in get_eht_ra_mask()
128 switch (sta->deflink.bandwidth) { in get_eht_ra_mask()
130 mcs_nss = &eht_cap->eht_mcs_nss_supp.bw._320; in get_eht_ra_mask()
132 return get_eht_mcs_ra_mask(mcs_nss->rx_tx_max_nss, 9, 3); in get_eht_ra_mask()
134 mcs_nss = &eht_cap->eht_mcs_nss_supp.bw._160; in get_eht_ra_mask()
136 return get_eht_mcs_ra_mask(mcs_nss->rx_tx_max_nss, 9, 3); in get_eht_ra_mask()
140 mcs_nss_20mhz = &eht_cap->eht_mcs_nss_supp.only_20mhz; in get_eht_ra_mask()
142 return get_eht_mcs_ra_mask(mcs_nss_20mhz->rx_tx_max_nss, 7, 4); in get_eht_ra_mask()
147 mcs_nss = &eht_cap->eht_mcs_nss_supp.bw._80; in get_eht_ra_mask()
149 return get_eht_mcs_ra_mask(mcs_nss->rx_tx_max_nss, 9, 3); in get_eht_ra_mask()
202 struct cfg80211_bitrate_mask *mask = &rtwsta->mask; in rtw89_phy_ra_mask_cfg()
206 if (!rtwsta->use_cfg_mask) in rtw89_phy_ra_mask_cfg()
207 return -1; in rtw89_phy_ra_mask_cfg()
209 switch (chan->band_type) { in rtw89_phy_ra_mask_cfg()
212 cfg_mask = u64_encode_bits(mask->control[NL80211_BAND_2GHZ].legacy, in rtw89_phy_ra_mask_cfg()
217 cfg_mask = u64_encode_bits(mask->control[NL80211_BAND_5GHZ].legacy, in rtw89_phy_ra_mask_cfg()
222 cfg_mask = u64_encode_bits(mask->control[NL80211_BAND_6GHZ].legacy, in rtw89_phy_ra_mask_cfg()
226 rtw89_warn(rtwdev, "unhandled band type %d\n", chan->band_type); in rtw89_phy_ra_mask_cfg()
227 return -1; in rtw89_phy_ra_mask_cfg()
230 if (sta->deflink.he_cap.has_he) { in rtw89_phy_ra_mask_cfg()
231 cfg_mask |= u64_encode_bits(mask->control[band].he_mcs[0], in rtw89_phy_ra_mask_cfg()
233 cfg_mask |= u64_encode_bits(mask->control[band].he_mcs[1], in rtw89_phy_ra_mask_cfg()
235 } else if (sta->deflink.vht_cap.vht_supported) { in rtw89_phy_ra_mask_cfg()
236 cfg_mask |= u64_encode_bits(mask->control[band].vht_mcs[0], in rtw89_phy_ra_mask_cfg()
238 cfg_mask |= u64_encode_bits(mask->control[band].vht_mcs[1], in rtw89_phy_ra_mask_cfg()
240 } else if (sta->deflink.ht_cap.ht_supported) { in rtw89_phy_ra_mask_cfg()
241 cfg_mask |= u64_encode_bits(mask->control[band].ht_mcs[0], in rtw89_phy_ra_mask_cfg()
243 cfg_mask |= u64_encode_bits(mask->control[band].ht_mcs[1], in rtw89_phy_ra_mask_cfg()
268 struct cfg80211_bitrate_mask *mask = &rtwsta->mask; in rtw89_phy_ra_gi_ltf()
269 u8 band = chan->band_type; in rtw89_phy_ra_gi_ltf()
271 u8 he_gi = mask->control[nl_band].he_gi; in rtw89_phy_ra_gi_ltf()
272 u8 he_ltf = mask->control[nl_band].he_ltf; in rtw89_phy_ra_gi_ltf()
274 if (!rtwsta->use_cfg_mask) in rtw89_phy_ra_gi_ltf()
300 struct rtw89_sta *rtwsta = (struct rtw89_sta *)sta->drv_priv; in rtw89_phy_ra_sta_update()
301 struct rtw89_vif *rtwvif = rtwsta->rtwvif; in rtw89_phy_ra_sta_update()
302 struct rtw89_phy_rate_pattern *rate_pattern = &rtwvif->rate_pattern; in rtw89_phy_ra_sta_update()
303 struct rtw89_ra_info *ra = &rtwsta->ra; in rtw89_phy_ra_sta_update()
305 rtwvif->chanctx_idx); in rtw89_phy_ra_sta_update()
306 struct ieee80211_vif *vif = rtwvif_to_vif(rtwsta->rtwvif); in rtw89_phy_ra_sta_update()
308 u8 rssi = ewma_rssi_read(&rtwsta->avg_rssi); in rtw89_phy_ra_sta_update()
323 if (sta->deflink.eht_cap.has_eht) { in rtw89_phy_ra_sta_update()
327 } else if (sta->deflink.he_cap.has_he) { in rtw89_phy_ra_sta_update()
332 if (sta->deflink.he_cap.he_cap_elem.phy_cap_info[2] & in rtw89_phy_ra_sta_update()
335 if (sta->deflink.he_cap.he_cap_elem.phy_cap_info[1] & in rtw89_phy_ra_sta_update()
339 } else if (sta->deflink.vht_cap.vht_supported) { in rtw89_phy_ra_sta_update()
340 u16 mcs_map = le16_to_cpu(sta->deflink.vht_cap.vht_mcs.rx_mcs_map); in rtw89_phy_ra_sta_update()
344 /* MCS9 (non-20MHz), MCS8, MCS7 */ in rtw89_phy_ra_sta_update()
345 if (sta->deflink.bandwidth == IEEE80211_STA_RX_BW_20) in rtw89_phy_ra_sta_update()
350 if (sta->deflink.vht_cap.cap & IEEE80211_VHT_CAP_RXSTBC_MASK) in rtw89_phy_ra_sta_update()
352 if (sta->deflink.vht_cap.cap & IEEE80211_VHT_CAP_RXLDPC) in rtw89_phy_ra_sta_update()
354 } else if (sta->deflink.ht_cap.ht_supported) { in rtw89_phy_ra_sta_update()
357 ra_mask |= ((u64)sta->deflink.ht_cap.mcs.rx_mask[3] << 48) | in rtw89_phy_ra_sta_update()
358 ((u64)sta->deflink.ht_cap.mcs.rx_mask[2] << 36) | in rtw89_phy_ra_sta_update()
359 ((u64)sta->deflink.ht_cap.mcs.rx_mask[1] << 24) | in rtw89_phy_ra_sta_update()
360 ((u64)sta->deflink.ht_cap.mcs.rx_mask[0] << 12); in rtw89_phy_ra_sta_update()
362 if (sta->deflink.ht_cap.cap & IEEE80211_HT_CAP_RX_STBC) in rtw89_phy_ra_sta_update()
364 if (sta->deflink.ht_cap.cap & IEEE80211_HT_CAP_LDPC_CODING) in rtw89_phy_ra_sta_update()
368 switch (chan->band_type) { in rtw89_phy_ra_sta_update()
370 ra_mask |= sta->deflink.supp_rates[NL80211_BAND_2GHZ]; in rtw89_phy_ra_sta_update()
371 if (sta->deflink.supp_rates[NL80211_BAND_2GHZ] & 0xf) in rtw89_phy_ra_sta_update()
373 if (sta->deflink.supp_rates[NL80211_BAND_2GHZ] & 0xff0) in rtw89_phy_ra_sta_update()
377 ra_mask |= (u64)sta->deflink.supp_rates[NL80211_BAND_5GHZ] << 4; in rtw89_phy_ra_sta_update()
381 ra_mask |= (u64)sta->deflink.supp_rates[NL80211_BAND_6GHZ] << 4; in rtw89_phy_ra_sta_update()
393 for (i = 0; i < rtwdev->hal.tx_nss; i++) in rtw89_phy_ra_sta_update()
410 switch (sta->deflink.bandwidth) { in rtw89_phy_ra_sta_update()
413 sgi = sta->deflink.vht_cap.vht_supported && in rtw89_phy_ra_sta_update()
414 (sta->deflink.vht_cap.cap & IEEE80211_VHT_CAP_SHORT_GI_160); in rtw89_phy_ra_sta_update()
418 sgi = sta->deflink.vht_cap.vht_supported && in rtw89_phy_ra_sta_update()
419 (sta->deflink.vht_cap.cap & IEEE80211_VHT_CAP_SHORT_GI_80); in rtw89_phy_ra_sta_update()
423 sgi = sta->deflink.ht_cap.ht_supported && in rtw89_phy_ra_sta_update()
424 (sta->deflink.ht_cap.cap & IEEE80211_HT_CAP_SGI_40); in rtw89_phy_ra_sta_update()
428 sgi = sta->deflink.ht_cap.ht_supported && in rtw89_phy_ra_sta_update()
429 (sta->deflink.ht_cap.cap & IEEE80211_HT_CAP_SGI_20); in rtw89_phy_ra_sta_update()
433 if (sta->deflink.he_cap.he_cap_elem.phy_cap_info[3] & in rtw89_phy_ra_sta_update()
435 ra->dcm_cap = 1; in rtw89_phy_ra_sta_update()
437 if (rate_pattern->enable && !vif->p2p) { in rtw89_phy_ra_sta_update()
439 ra_mask &= rate_pattern->ra_mask; in rtw89_phy_ra_sta_update()
440 mode = rate_pattern->ra_mode; in rtw89_phy_ra_sta_update()
443 ra->bw_cap = bw_mode; in rtw89_phy_ra_sta_update()
444 ra->er_cap = rtwsta->er_cap; in rtw89_phy_ra_sta_update()
445 ra->mode_ctrl = mode; in rtw89_phy_ra_sta_update()
446 ra->macid = rtwsta->mac_id; in rtw89_phy_ra_sta_update()
447 ra->stbc_cap = stbc_en; in rtw89_phy_ra_sta_update()
448 ra->ldpc_cap = ldpc_en; in rtw89_phy_ra_sta_update()
449 ra->ss_num = min(sta->deflink.rx_nss, rtwdev->hal.tx_nss) - 1; in rtw89_phy_ra_sta_update()
450 ra->en_sgi = sgi; in rtw89_phy_ra_sta_update()
451 ra->ra_mask = ra_mask; in rtw89_phy_ra_sta_update()
452 ra->fix_giltf_en = fix_giltf_en; in rtw89_phy_ra_sta_update()
453 ra->fix_giltf = fix_giltf; in rtw89_phy_ra_sta_update()
458 ra->fixed_csi_rate_en = false; in rtw89_phy_ra_sta_update()
459 ra->ra_csi_rate_en = true; in rtw89_phy_ra_sta_update()
460 ra->cr_tbl_sel = false; in rtw89_phy_ra_sta_update()
461 ra->band_num = rtwvif->phy_idx; in rtw89_phy_ra_sta_update()
462 ra->csi_bw = bw_mode; in rtw89_phy_ra_sta_update()
463 ra->csi_gi_ltf = RTW89_GILTF_LGI_4XHE32; in rtw89_phy_ra_sta_update()
464 ra->csi_mcs_ss_idx = 5; in rtw89_phy_ra_sta_update()
465 ra->csi_mode = csi_mode; in rtw89_phy_ra_sta_update()
471 struct rtw89_sta *rtwsta = (struct rtw89_sta *)sta->drv_priv; in rtw89_phy_ra_update_sta()
472 struct rtw89_ra_info *ra = &rtwsta->ra; in rtw89_phy_ra_update_sta()
477 ra->upd_mask = 1; in rtw89_phy_ra_update_sta()
479 ra->upd_bw_nss_mask = 1; in rtw89_phy_ra_update_sta()
483 ra->macid, in rtw89_phy_ra_update_sta()
484 ra->bw_cap, in rtw89_phy_ra_update_sta()
485 ra->ss_num, in rtw89_phy_ra_update_sta()
486 ra->en_sgi, in rtw89_phy_ra_update_sta()
487 ra->giltf); in rtw89_phy_ra_update_sta()
508 if (next->enable) in __check_rate_pattern()
512 next->rate = rate_base + c; in __check_rate_pattern()
513 next->ra_mode = ra_mode; in __check_rate_pattern()
514 next->ra_mask = ra_mask; in __check_rate_pattern()
515 next->enable = true; in __check_rate_pattern()
531 struct rtw89_vif *rtwvif = (struct rtw89_vif *)vif->drv_priv; in rtw89_phy_rate_pattern_vif()
534 rtwvif->chanctx_idx); in rtw89_phy_rate_pattern_vif()
553 u8 band = chan->band_type; in rtw89_phy_rate_pattern_vif()
555 enum rtw89_chip_gen chip_gen = rtwdev->chip->chip_gen; in rtw89_phy_rate_pattern_vif()
556 u8 tx_nss = rtwdev->hal.tx_nss; in rtw89_phy_rate_pattern_vif()
562 mask->control[nl_band].he_mcs[i], in rtw89_phy_rate_pattern_vif()
569 mask->control[nl_band].vht_mcs[i], in rtw89_phy_rate_pattern_vif()
576 mask->control[nl_band].ht_mcs[i], in rtw89_phy_rate_pattern_vif()
584 sband = rtwdev->hw->wiphy->bands[nl_band]; in rtw89_phy_rate_pattern_vif()
589 mask->control[nl_band].legacy, in rtw89_phy_rate_pattern_vif()
590 BIT(sband->n_bitrates) - 1, false)) in rtw89_phy_rate_pattern_vif()
595 mask->control[nl_band].legacy, in rtw89_phy_rate_pattern_vif()
596 BIT(sband->n_bitrates) - 1, false)) in rtw89_phy_rate_pattern_vif()
603 rtwvif->rate_pattern = next_pattern; in rtw89_phy_rate_pattern_vif()
612 rtwvif->rate_pattern.enable = false; in rtw89_phy_rate_pattern_vif()
625 ieee80211_iterate_stations_atomic(rtwdev->hw, in rtw89_phy_ra_update()
632 struct rtw89_sta *rtwsta = (struct rtw89_sta *)sta->drv_priv; in rtw89_phy_ra_assoc()
633 struct rtw89_ra_info *ra = &rtwsta->ra; in rtw89_phy_ra_assoc()
634 u8 rssi = ewma_rssi_read(&rtwsta->avg_rssi) >> RSSI_FACTOR; in rtw89_phy_ra_assoc()
640 ra->init_rate_lv = 1; in rtw89_phy_ra_assoc()
642 ra->init_rate_lv = 2; in rtw89_phy_ra_assoc()
644 ra->init_rate_lv = 3; in rtw89_phy_ra_assoc()
646 ra->init_rate_lv = 0; in rtw89_phy_ra_assoc()
647 ra->upd_all = 1; in rtw89_phy_ra_assoc()
650 ra->macid, in rtw89_phy_ra_assoc()
651 ra->mode_ctrl, in rtw89_phy_ra_assoc()
652 ra->bw_cap, in rtw89_phy_ra_assoc()
653 ra->ss_num, in rtw89_phy_ra_assoc()
654 ra->init_rate_lv); in rtw89_phy_ra_assoc()
657 ra->dcm_cap, in rtw89_phy_ra_assoc()
658 ra->er_cap, in rtw89_phy_ra_assoc()
659 ra->ldpc_cap, in rtw89_phy_ra_assoc()
660 ra->stbc_cap, in rtw89_phy_ra_assoc()
661 ra->en_sgi, in rtw89_phy_ra_assoc()
662 ra->giltf); in rtw89_phy_ra_assoc()
671 enum rtw89_bandwidth cbw = chan->band_width; in rtw89_phy_get_txsc()
672 u8 pri_ch = chan->primary_channel; in rtw89_phy_get_txsc()
673 u8 central_ch = chan->channel; in rtw89_phy_get_txsc()
687 txsc_idx = (pri_ch - central_ch) >> 1; in rtw89_phy_get_txsc()
689 txsc_idx = ((central_ch - pri_ch) >> 1) + 1; in rtw89_phy_get_txsc()
696 tmp = (pri_ch - central_ch) >> 1; in rtw89_phy_get_txsc()
698 tmp = ((central_ch - pri_ch) >> 1) + 1; in rtw89_phy_get_txsc()
720 txsc_idx = (10 - (pri_ch - central_ch)) >> 1; in rtw89_phy_get_txsc()
722 txsc_idx = ((central_ch - pri_ch) >> 1) + 5; in rtw89_phy_get_txsc()
740 enum rtw89_bandwidth cbw = chan->band_width; in rtw89_phy_get_txsb()
741 u8 pri_ch = chan->primary_channel; in rtw89_phy_get_txsb()
742 u8 central_ch = chan->channel; in rtw89_phy_get_txsb()
754 txsb_idx = (pri_ch - central_ch + 6) / 4; in rtw89_phy_get_txsb()
760 txsb_idx = (pri_ch - central_ch + 14) / 4; in rtw89_phy_get_txsb()
762 txsb_idx = (pri_ch - central_ch + 12) / 8; in rtw89_phy_get_txsb()
768 txsb_idx = (pri_ch - central_ch + 30) / 4; in rtw89_phy_get_txsb()
770 txsb_idx = (pri_ch - central_ch + 28) / 8; in rtw89_phy_get_txsb()
772 txsb_idx = (pri_ch - central_ch + 24) / 16; in rtw89_phy_get_txsb()
793 const struct rtw89_chip_info *chip = rtwdev->chip; in rtw89_phy_read_rf()
794 const u32 *base_addr = chip->rf_base_addr; in rtw89_phy_read_rf()
797 if (rf_path >= rtwdev->chip->rf_path_num) { in rtw89_phy_read_rf()
850 if (rf_path >= rtwdev->chip->rf_path_num) { in rtw89_phy_read_rf_v1()
915 if (rf_path >= rtwdev->chip->rf_path_num) { in rtw89_phy_read_rf_v2()
930 const struct rtw89_chip_info *chip = rtwdev->chip; in rtw89_phy_write_rf()
931 const u32 *base_addr = chip->rf_base_addr; in rtw89_phy_write_rf()
934 if (rf_path >= rtwdev->chip->rf_path_num) { in rtw89_phy_write_rf()
994 if (rf_path >= rtwdev->chip->rf_path_num) { in rtw89_phy_write_rf_v1()
1054 if (rf_path >= rtwdev->chip->rf_path_num) { in rtw89_phy_write_rf_v2()
1068 return rtwdev->chip->ops->write_rf == rtw89_phy_write_rf_v1; in rtw89_chip_rf_v1()
1074 const struct rtw89_chip_info *chip = rtwdev->chip; in rtw89_phy_bb_reset()
1076 chip->ops->bb_reset(rtwdev, phy_idx); in rtw89_phy_bb_reset()
1086 if (reg->addr == 0xfe) { in rtw89_phy_config_bb_reg()
1088 } else if (reg->addr == 0xfd) { in rtw89_phy_config_bb_reg()
1090 } else if (reg->addr == 0xfc) { in rtw89_phy_config_bb_reg()
1092 } else if (reg->addr == 0xfb) { in rtw89_phy_config_bb_reg()
1094 } else if (reg->addr == 0xfa) { in rtw89_phy_config_bb_reg()
1096 } else if (reg->addr == 0xf9) { in rtw89_phy_config_bb_reg()
1098 } else if (reg->data == BYPASS_CR_DATA) { in rtw89_phy_config_bb_reg()
1099 rtw89_debug(rtwdev, RTW89_DBG_PHY_TRACK, "Bypass CR 0x%x\n", reg->addr); in rtw89_phy_config_bb_reg()
1101 addr = reg->addr; in rtw89_phy_config_bb_reg()
1104 addr += rtw89_phy0_phy1_offset(rtwdev, reg->addr); in rtw89_phy_config_bb_reg()
1106 rtw89_phy_write32(rtwdev, addr, reg->data); in rtw89_phy_config_bb_reg()
1130 struct rtw89_phy_bb_gain_info *gain = &rtwdev->bb_gain.ax; in rtw89_phy_cfg_bb_gain_error()
1139 gain->lna_gain[gband][path][i] = data & 0xff; in rtw89_phy_cfg_bb_gain_error()
1143 gain->lna_gain[gband][path][i] = data & 0xff; in rtw89_phy_cfg_bb_gain_error()
1147 gain->tia_gain[gband][path][i] = data & 0xff; in rtw89_phy_cfg_bb_gain_error()
1169 struct rtw89_phy_bb_gain_info *gain = &rtwdev->bb_gain.ax; in rtw89_phy_cfg_bb_rpl_ofst()
1180 gain->rpl_ofst_20[gband][path] = (s8)data; in rtw89_phy_cfg_bb_rpl_ofst()
1184 gain->rpl_ofst_40[gband][path][0] = (s8)data; in rtw89_phy_cfg_bb_rpl_ofst()
1189 gain->rpl_ofst_40[gband][path][rxsc] = ofst; in rtw89_phy_cfg_bb_rpl_ofst()
1195 gain->rpl_ofst_80[gband][path][0] = (s8)data; in rtw89_phy_cfg_bb_rpl_ofst()
1200 gain->rpl_ofst_80[gband][path][rxsc] = ofst; in rtw89_phy_cfg_bb_rpl_ofst()
1206 gain->rpl_ofst_80[gband][path][rxsc] = ofst; in rtw89_phy_cfg_bb_rpl_ofst()
1212 gain->rpl_ofst_160[gband][path][0] = (s8)data; in rtw89_phy_cfg_bb_rpl_ofst()
1217 gain->rpl_ofst_160[gband][path][rxsc] = ofst; in rtw89_phy_cfg_bb_rpl_ofst()
1223 gain->rpl_ofst_160[gband][path][rxsc] = ofst; in rtw89_phy_cfg_bb_rpl_ofst()
1229 gain->rpl_ofst_160[gband][path][rxsc] = ofst; in rtw89_phy_cfg_bb_rpl_ofst()
1235 gain->rpl_ofst_160[gband][path][rxsc] = ofst; in rtw89_phy_cfg_bb_rpl_ofst()
1251 struct rtw89_phy_bb_gain_info *gain = &rtwdev->bb_gain.ax; in rtw89_phy_cfg_bb_gain_bypass()
1260 gain->lna_gain_bypass[gband][path][i] = data & 0xff; in rtw89_phy_cfg_bb_gain_bypass()
1264 gain->lna_gain_bypass[gband][path][i] = data & 0xff; in rtw89_phy_cfg_bb_gain_bypass()
1278 struct rtw89_phy_bb_gain_info *gain = &rtwdev->bb_gain.ax; in rtw89_phy_cfg_bb_gain_op1db()
1287 gain->lna_op1db[gband][path][i] = data & 0xff; in rtw89_phy_cfg_bb_gain_op1db()
1291 gain->lna_op1db[gband][path][i] = data & 0xff; in rtw89_phy_cfg_bb_gain_op1db()
1295 gain->tia_lna_op1db[gband][path][i] = data & 0xff; in rtw89_phy_cfg_bb_gain_op1db()
1299 gain->tia_lna_op1db[gband][path][i] = data & 0xff; in rtw89_phy_cfg_bb_gain_op1db()
1314 const struct rtw89_chip_info *chip = rtwdev->chip; in rtw89_phy_config_bb_gain_ax()
1315 union rtw89_phy_bb_gain_arg arg = { .addr = reg->addr }; in rtw89_phy_config_bb_gain_ax()
1316 struct rtw89_efuse *efuse = &rtwdev->efuse; in rtw89_phy_config_bb_gain_ax()
1321 if (arg.path >= chip->rf_path_num) in rtw89_phy_config_bb_gain_ax()
1331 rtw89_phy_cfg_bb_gain_error(rtwdev, arg, reg->data); in rtw89_phy_config_bb_gain_ax()
1334 rtw89_phy_cfg_bb_rpl_ofst(rtwdev, arg, reg->data); in rtw89_phy_config_bb_gain_ax()
1337 rtw89_phy_cfg_bb_gain_bypass(rtwdev, arg, reg->data); in rtw89_phy_config_bb_gain_ax()
1340 rtw89_phy_cfg_bb_gain_op1db(rtwdev, arg, reg->data); in rtw89_phy_config_bb_gain_ax()
1344 if (efuse->rfe_type < 50) in rtw89_phy_config_bb_gain_ax()
1350 arg.addr, reg->data, arg.cfg_type); in rtw89_phy_config_bb_gain_ax()
1361 u16 idx = info->curr_idx % RTW89_H2C_RF_PAGE_SIZE; in rtw89_phy_cofig_rf_reg_store()
1362 u8 page = info->curr_idx / RTW89_H2C_RF_PAGE_SIZE; in rtw89_phy_cofig_rf_reg_store()
1366 rf_path, info->curr_idx); in rtw89_phy_cofig_rf_reg_store()
1370 info->rtw89_phy_config_rf_h2c[page][idx] = in rtw89_phy_cofig_rf_reg_store()
1371 cpu_to_le32((reg->addr << 20) | reg->data); in rtw89_phy_cofig_rf_reg_store()
1372 info->curr_idx++; in rtw89_phy_cofig_rf_reg_store()
1378 u16 remain = info->curr_idx; in rtw89_phy_config_rf_reg_fw()
1387 ret = -EINVAL; in rtw89_phy_config_rf_reg_fw()
1391 for (i = 0; i < RTW89_H2C_RF_PAGE_NUM && remain; i++, remain -= len) { in rtw89_phy_config_rf_reg_fw()
1398 info->curr_idx = 0; in rtw89_phy_config_rf_reg_fw()
1408 u32 addr = reg->addr; in rtw89_phy_config_rf_reg_noio()
1426 if (reg->addr == 0xfe) { in rtw89_phy_config_rf_reg()
1428 } else if (reg->addr == 0xfd) { in rtw89_phy_config_rf_reg()
1430 } else if (reg->addr == 0xfc) { in rtw89_phy_config_rf_reg()
1432 } else if (reg->addr == 0xfb) { in rtw89_phy_config_rf_reg()
1434 } else if (reg->addr == 0xfa) { in rtw89_phy_config_rf_reg()
1436 } else if (reg->addr == 0xf9) { in rtw89_phy_config_rf_reg()
1439 rtw89_write_rf(rtwdev, rf_path, reg->addr, 0xfffff, reg->data); in rtw89_phy_config_rf_reg()
1450 rtw89_write_rf(rtwdev, rf_path, reg->addr, RFREG_MASK, reg->data); in rtw89_phy_config_rf_reg_v1()
1452 if (reg->addr < 0x100) in rtw89_phy_config_rf_reg_v1()
1467 u32 compare, target; in rtw89_phy_sel_headline() local
1473 for (i = 0; i < table->n_regs; i++) { in rtw89_phy_sel_headline()
1474 reg = &table->regs[i]; in rtw89_phy_sel_headline()
1475 headline = get_phy_headline(reg->addr); in rtw89_phy_sel_headline()
1484 compare = get_phy_compare(rfe, cv); in rtw89_phy_sel_headline()
1486 reg = &table->regs[i]; in rtw89_phy_sel_headline()
1487 target = get_phy_target(reg->addr); in rtw89_phy_sel_headline()
1488 if (target == compare) { in rtw89_phy_sel_headline()
1495 compare = get_phy_compare(rfe, PHY_COND_DONT_CARE); in rtw89_phy_sel_headline()
1497 reg = &table->regs[i]; in rtw89_phy_sel_headline()
1498 target = get_phy_target(reg->addr); in rtw89_phy_sel_headline()
1499 if (target == compare) { in rtw89_phy_sel_headline()
1507 reg = &table->regs[i]; in rtw89_phy_sel_headline()
1508 rfe_para = get_phy_cond_rfe(reg->addr); in rtw89_phy_sel_headline()
1509 cv_para = get_phy_cond_cv(reg->addr); in rtw89_phy_sel_headline()
1524 reg = &table->regs[i]; in rtw89_phy_sel_headline()
1525 rfe_para = get_phy_cond_rfe(reg->addr); in rtw89_phy_sel_headline()
1526 cv_para = get_phy_cond_cv(reg->addr); in rtw89_phy_sel_headline()
1539 return -EINVAL; in rtw89_phy_sel_headline()
1551 enum rtw89_rf_path rf_path = table->rf_path; in rtw89_phy_init_reg()
1552 u8 rfe = rtwdev->efuse.rfe_type; in rtw89_phy_init_reg()
1553 u8 cv = rtwdev->hal.cv; in rtw89_phy_init_reg()
1569 cfg_target = get_phy_target(table->regs[headline_idx].addr); in rtw89_phy_init_reg()
1570 for (i = headline_size; i < table->n_regs; i++) { in rtw89_phy_init_reg()
1571 reg = &table->regs[i]; in rtw89_phy_init_reg()
1572 cond = get_phy_cond(reg->addr); in rtw89_phy_init_reg()
1576 target = get_phy_target(reg->addr); in rtw89_phy_init_reg()
1582 reg->addr, reg->data); in rtw89_phy_init_reg()
1614 struct rtw89_fw_elm_info *elm_info = &rtwdev->fw.elm_info; in rtw89_phy_init_bb_reg()
1615 const struct rtw89_chip_info *chip = rtwdev->chip; in rtw89_phy_init_bb_reg()
1619 bb_table = elm_info->bb_tbl ? elm_info->bb_tbl : chip->bb_table; in rtw89_phy_init_bb_reg()
1621 if (rtwdev->dbcc_en) in rtw89_phy_init_bb_reg()
1626 bb_gain_table = elm_info->bb_gain ? elm_info->bb_gain : chip->bb_gain_table; in rtw89_phy_init_bb_reg()
1629 chip->phy_def->config_bb_gain, NULL); in rtw89_phy_init_bb_reg()
1644 struct rtw89_fw_elm_info *elm_info = &rtwdev->fw.elm_info; in rtw89_phy_init_rf_reg()
1645 const struct rtw89_chip_info *chip = rtwdev->chip; in rtw89_phy_init_rf_reg()
1654 for (path = RF_PATH_A; path < chip->rf_path_num; path++) { in rtw89_phy_init_rf_reg()
1655 rf_table = elm_info->rf_radio[path] ? in rtw89_phy_init_rf_reg()
1656 elm_info->rf_radio[path] : chip->rf_table[path]; in rtw89_phy_init_rf_reg()
1657 rf_reg_info->rf_path = rf_table->rf_path; in rtw89_phy_init_rf_reg()
1661 config = rf_table->config ? rf_table->config : in rtw89_phy_init_rf_reg()
1666 rf_reg_info->rf_path); in rtw89_phy_init_rf_reg()
1673 const struct rtw89_chip_info *chip = rtwdev->chip; in rtw89_phy_preinit_rf_nctl_ax()
1681 if (chip->chip_id != RTL8851B) in rtw89_phy_preinit_rf_nctl_ax()
1683 if (chip->chip_id == RTL8852B || chip->chip_id == RTL8852BT) in rtw89_phy_preinit_rf_nctl_ax()
1697 struct rtw89_fw_elm_info *elm_info = &rtwdev->fw.elm_info; in rtw89_phy_init_rf_nctl()
1698 const struct rtw89_chip_info *chip = rtwdev->chip; in rtw89_phy_init_rf_nctl()
1703 nctl_table = elm_info->rf_nctl ? elm_info->rf_nctl : chip->nctl_table; in rtw89_phy_init_rf_nctl()
1706 if (chip->nctl_post_table) in rtw89_phy_init_rf_nctl()
1707 rtw89_rfk_parser(rtwdev, chip->nctl_post_table); in rtw89_phy_init_rf_nctl()
1744 if (rtwdev->dbcc_en && phy_idx == RTW89_PHY_1) in rtw89_phy_write32_idx()
1753 if (rtwdev->dbcc_en && phy_idx == RTW89_PHY_1) in rtw89_phy_read32_idx()
1764 if (!rtwdev->dbcc_en) in rtw89_phy_set_phy_regs()
1777 for (i = 0; i < tbl->size; i++) { in rtw89_phy_write_reg3_tbl()
1778 reg3 = &tbl->reg3[i]; in rtw89_phy_write_reg3_tbl()
1779 rtw89_phy_write32_mask(rtwdev, reg3->addr, reg3->mask, reg3->data); in rtw89_phy_write_reg3_tbl()
1804 switch (desc->rs) { in rtw89_phy_raw_byr_seek()
1806 return &head->cck[desc->idx]; in rtw89_phy_raw_byr_seek()
1808 return &head->ofdm[desc->idx]; in rtw89_phy_raw_byr_seek()
1810 return &head->mcs[desc->ofdma][desc->nss][desc->idx]; in rtw89_phy_raw_byr_seek()
1812 return &head->hedcm[desc->ofdma][desc->nss][desc->idx]; in rtw89_phy_raw_byr_seek()
1814 return &head->offset[desc->idx]; in rtw89_phy_raw_byr_seek()
1816 rtw89_warn(rtwdev, "unrecognized byr rs: %d\n", desc->rs); in rtw89_phy_raw_byr_seek()
1817 return &head->trap; in rtw89_phy_raw_byr_seek()
1824 const struct rtw89_txpwr_byrate_cfg *cfg = tbl->data; in rtw89_phy_load_txpwr_byrate()
1825 const struct rtw89_txpwr_byrate_cfg *end = cfg + tbl->size; in rtw89_phy_load_txpwr_byrate()
1833 byr_head = &rtwdev->byr[cfg->band][0]; in rtw89_phy_load_txpwr_byrate()
1834 desc.rs = cfg->rs; in rtw89_phy_load_txpwr_byrate()
1835 desc.nss = cfg->nss; in rtw89_phy_load_txpwr_byrate()
1836 data = cfg->data; in rtw89_phy_load_txpwr_byrate()
1838 for (i = 0; i < cfg->len; i++, data >>= 8) { in rtw89_phy_load_txpwr_byrate()
1839 desc.idx = cfg->shf + i; in rtw89_phy_load_txpwr_byrate()
1849 const struct rtw89_chip_info *chip = rtwdev->chip; in rtw89_phy_txpwr_rf_to_mac()
1851 return txpwr_rf >> (chip->txpwr_factor_rf - chip->txpwr_factor_mac); in rtw89_phy_txpwr_rf_to_mac()
1856 const struct rtw89_chip_info *chip = rtwdev->chip; in rtw89_phy_txpwr_dbm_to_mac()
1858 return clamp_t(s16, dbm << chip->txpwr_factor_mac, -64, 63); in rtw89_phy_txpwr_dbm_to_mac()
1867 dbm -= tssi_max_deviation; in rtw89_phy_txpwr_dbm_without_tolerance()
1874 struct rtw89_regulatory_info *regulatory = &rtwdev->regulatory; in rtw89_phy_get_tpe_constraint()
1875 const struct rtw89_reg_6ghz_tpe *tpe = ®ulatory->reg_6ghz_tpe; in rtw89_phy_get_tpe_constraint()
1878 if (band == RTW89_BAND_6G && tpe->valid) in rtw89_phy_get_tpe_constraint()
1879 cstr = rtw89_phy_txpwr_dbm_without_tolerance(tpe->constraint); in rtw89_phy_get_tpe_constraint()
1890 if (rate_desc->rs == RTW89_RS_CCK) in rtw89_phy_read_txpwr_byrate()
1893 byr_head = &rtwdev->byr[band][bw]; in rtw89_phy_read_txpwr_byrate()
1903 return (channel_6g - 1) / 2; in rtw89_channel_6g_to_idx()
1905 return (channel_6g - 3) / 2; in rtw89_channel_6g_to_idx()
1907 return (channel_6g - 5) / 2; in rtw89_channel_6g_to_idx()
1909 return (channel_6g - 7) / 2; in rtw89_channel_6g_to_idx()
1911 return (channel_6g - 9) / 2; in rtw89_channel_6g_to_idx()
1913 return (channel_6g - 11) / 2; in rtw89_channel_6g_to_idx()
1915 return (channel_6g - 13) / 2; in rtw89_channel_6g_to_idx()
1917 return (channel_6g - 15) / 2; in rtw89_channel_6g_to_idx()
1931 return channel - 1; in rtw89_channel_to_idx()
1933 return (channel - 36) / 2; in rtw89_channel_to_idx()
1935 return ((channel - 100) / 2) + 15; in rtw89_channel_to_idx()
1937 return ((channel - 149) / 2) + 38; in rtw89_channel_to_idx()
1947 const struct rtw89_rfe_parms *rfe_parms = rtwdev->rfe_parms; in rtw89_phy_read_txpwr_limit()
1948 const struct rtw89_txpwr_rule_2ghz *rule_2ghz = &rfe_parms->rule_2ghz; in rtw89_phy_read_txpwr_limit()
1949 const struct rtw89_txpwr_rule_5ghz *rule_5ghz = &rfe_parms->rule_5ghz; in rtw89_phy_read_txpwr_limit()
1950 const struct rtw89_txpwr_rule_6ghz *rule_6ghz = &rfe_parms->rule_6ghz; in rtw89_phy_read_txpwr_limit()
1951 struct rtw89_regulatory_info *regulatory = &rtwdev->regulatory; in rtw89_phy_read_txpwr_limit()
1956 u8 reg6 = regulatory->reg_6ghz_power; in rtw89_phy_read_txpwr_limit()
1957 s8 lmt = 0, sar; in rtw89_phy_read_txpwr_limit() local
1962 lmt = (*rule_2ghz->lmt)[bw][ntx][rs][bf][regd][ch_idx]; in rtw89_phy_read_txpwr_limit()
1966 lmt = (*rule_2ghz->lmt)[bw][ntx][rs][bf][RTW89_WW][ch_idx]; in rtw89_phy_read_txpwr_limit()
1969 lmt = (*rule_5ghz->lmt)[bw][ntx][rs][bf][regd][ch_idx]; in rtw89_phy_read_txpwr_limit()
1973 lmt = (*rule_5ghz->lmt)[bw][ntx][rs][bf][RTW89_WW][ch_idx]; in rtw89_phy_read_txpwr_limit()
1976 lmt = (*rule_6ghz->lmt)[bw][ntx][rs][bf][regd][reg6][ch_idx]; in rtw89_phy_read_txpwr_limit()
1980 lmt = (*rule_6ghz->lmt)[bw][ntx][rs][bf][RTW89_WW] in rtw89_phy_read_txpwr_limit()
1990 sar = rtw89_query_sar(rtwdev, freq); in rtw89_phy_read_txpwr_limit()
1993 return min3(lmt, sar, cstr); in rtw89_phy_read_txpwr_limit()
2012 __fill_txpwr_limit_nonbf_bf(lmt->cck_20m, band, RTW89_CHANNEL_WIDTH_20, in rtw89_phy_fill_txpwr_limit_20m_ax()
2014 __fill_txpwr_limit_nonbf_bf(lmt->cck_40m, band, RTW89_CHANNEL_WIDTH_40, in rtw89_phy_fill_txpwr_limit_20m_ax()
2016 __fill_txpwr_limit_nonbf_bf(lmt->ofdm, band, RTW89_CHANNEL_WIDTH_20, in rtw89_phy_fill_txpwr_limit_20m_ax()
2018 __fill_txpwr_limit_nonbf_bf(lmt->mcs_20m[0], band, in rtw89_phy_fill_txpwr_limit_20m_ax()
2027 __fill_txpwr_limit_nonbf_bf(lmt->cck_20m, band, RTW89_CHANNEL_WIDTH_20, in rtw89_phy_fill_txpwr_limit_40m_ax()
2028 ntx, RTW89_RS_CCK, ch - 2); in rtw89_phy_fill_txpwr_limit_40m_ax()
2029 __fill_txpwr_limit_nonbf_bf(lmt->cck_40m, band, RTW89_CHANNEL_WIDTH_40, in rtw89_phy_fill_txpwr_limit_40m_ax()
2031 __fill_txpwr_limit_nonbf_bf(lmt->ofdm, band, RTW89_CHANNEL_WIDTH_20, in rtw89_phy_fill_txpwr_limit_40m_ax()
2033 __fill_txpwr_limit_nonbf_bf(lmt->mcs_20m[0], band, in rtw89_phy_fill_txpwr_limit_40m_ax()
2035 ntx, RTW89_RS_MCS, ch - 2); in rtw89_phy_fill_txpwr_limit_40m_ax()
2036 __fill_txpwr_limit_nonbf_bf(lmt->mcs_20m[1], band, in rtw89_phy_fill_txpwr_limit_40m_ax()
2039 __fill_txpwr_limit_nonbf_bf(lmt->mcs_40m[0], band, in rtw89_phy_fill_txpwr_limit_40m_ax()
2052 __fill_txpwr_limit_nonbf_bf(lmt->ofdm, band, RTW89_CHANNEL_WIDTH_20, in rtw89_phy_fill_txpwr_limit_80m_ax()
2054 __fill_txpwr_limit_nonbf_bf(lmt->mcs_20m[0], band, in rtw89_phy_fill_txpwr_limit_80m_ax()
2056 ntx, RTW89_RS_MCS, ch - 6); in rtw89_phy_fill_txpwr_limit_80m_ax()
2057 __fill_txpwr_limit_nonbf_bf(lmt->mcs_20m[1], band, in rtw89_phy_fill_txpwr_limit_80m_ax()
2059 ntx, RTW89_RS_MCS, ch - 2); in rtw89_phy_fill_txpwr_limit_80m_ax()
2060 __fill_txpwr_limit_nonbf_bf(lmt->mcs_20m[2], band, in rtw89_phy_fill_txpwr_limit_80m_ax()
2063 __fill_txpwr_limit_nonbf_bf(lmt->mcs_20m[3], band, in rtw89_phy_fill_txpwr_limit_80m_ax()
2066 __fill_txpwr_limit_nonbf_bf(lmt->mcs_40m[0], band, in rtw89_phy_fill_txpwr_limit_80m_ax()
2068 ntx, RTW89_RS_MCS, ch - 4); in rtw89_phy_fill_txpwr_limit_80m_ax()
2069 __fill_txpwr_limit_nonbf_bf(lmt->mcs_40m[1], band, in rtw89_phy_fill_txpwr_limit_80m_ax()
2072 __fill_txpwr_limit_nonbf_bf(lmt->mcs_80m[0], band, in rtw89_phy_fill_txpwr_limit_80m_ax()
2077 ntx, RTW89_RS_MCS, ch - 4); in rtw89_phy_fill_txpwr_limit_80m_ax()
2082 lmt->mcs_40m_0p5[i] = min_t(s8, val_0p5_n[i], val_0p5_p[i]); in rtw89_phy_fill_txpwr_limit_80m_ax()
2096 __fill_txpwr_limit_nonbf_bf(lmt->ofdm, band, RTW89_CHANNEL_WIDTH_20, in rtw89_phy_fill_txpwr_limit_160m_ax()
2100 __fill_txpwr_limit_nonbf_bf(lmt->mcs_20m[0], band, in rtw89_phy_fill_txpwr_limit_160m_ax()
2102 ntx, RTW89_RS_MCS, ch - 14); in rtw89_phy_fill_txpwr_limit_160m_ax()
2103 __fill_txpwr_limit_nonbf_bf(lmt->mcs_20m[1], band, in rtw89_phy_fill_txpwr_limit_160m_ax()
2105 ntx, RTW89_RS_MCS, ch - 10); in rtw89_phy_fill_txpwr_limit_160m_ax()
2106 __fill_txpwr_limit_nonbf_bf(lmt->mcs_20m[2], band, in rtw89_phy_fill_txpwr_limit_160m_ax()
2108 ntx, RTW89_RS_MCS, ch - 6); in rtw89_phy_fill_txpwr_limit_160m_ax()
2109 __fill_txpwr_limit_nonbf_bf(lmt->mcs_20m[3], band, in rtw89_phy_fill_txpwr_limit_160m_ax()
2111 ntx, RTW89_RS_MCS, ch - 2); in rtw89_phy_fill_txpwr_limit_160m_ax()
2112 __fill_txpwr_limit_nonbf_bf(lmt->mcs_20m[4], band, in rtw89_phy_fill_txpwr_limit_160m_ax()
2115 __fill_txpwr_limit_nonbf_bf(lmt->mcs_20m[5], band, in rtw89_phy_fill_txpwr_limit_160m_ax()
2118 __fill_txpwr_limit_nonbf_bf(lmt->mcs_20m[6], band, in rtw89_phy_fill_txpwr_limit_160m_ax()
2121 __fill_txpwr_limit_nonbf_bf(lmt->mcs_20m[7], band, in rtw89_phy_fill_txpwr_limit_160m_ax()
2126 __fill_txpwr_limit_nonbf_bf(lmt->mcs_40m[0], band, in rtw89_phy_fill_txpwr_limit_160m_ax()
2128 ntx, RTW89_RS_MCS, ch - 12); in rtw89_phy_fill_txpwr_limit_160m_ax()
2129 __fill_txpwr_limit_nonbf_bf(lmt->mcs_40m[1], band, in rtw89_phy_fill_txpwr_limit_160m_ax()
2131 ntx, RTW89_RS_MCS, ch - 4); in rtw89_phy_fill_txpwr_limit_160m_ax()
2132 __fill_txpwr_limit_nonbf_bf(lmt->mcs_40m[2], band, in rtw89_phy_fill_txpwr_limit_160m_ax()
2135 __fill_txpwr_limit_nonbf_bf(lmt->mcs_40m[3], band, in rtw89_phy_fill_txpwr_limit_160m_ax()
2140 __fill_txpwr_limit_nonbf_bf(lmt->mcs_80m[0], band, in rtw89_phy_fill_txpwr_limit_160m_ax()
2142 ntx, RTW89_RS_MCS, ch - 8); in rtw89_phy_fill_txpwr_limit_160m_ax()
2143 __fill_txpwr_limit_nonbf_bf(lmt->mcs_80m[1], band, in rtw89_phy_fill_txpwr_limit_160m_ax()
2148 __fill_txpwr_limit_nonbf_bf(lmt->mcs_160m, band, in rtw89_phy_fill_txpwr_limit_160m_ax()
2154 ntx, RTW89_RS_MCS, ch - 4); in rtw89_phy_fill_txpwr_limit_160m_ax()
2159 lmt->mcs_40m_0p5[i] = min_t(s8, val_0p5_n[i], val_0p5_p[i]); in rtw89_phy_fill_txpwr_limit_160m_ax()
2163 ntx, RTW89_RS_MCS, ch - 8); in rtw89_phy_fill_txpwr_limit_160m_ax()
2168 lmt->mcs_40m_2p5[i] = min_t(s8, val_2p5_n[i], val_2p5_p[i]); in rtw89_phy_fill_txpwr_limit_160m_ax()
2177 u8 band = chan->band_type; in rtw89_phy_fill_txpwr_limit_ax()
2178 u8 pri_ch = chan->primary_channel; in rtw89_phy_fill_txpwr_limit_ax()
2179 u8 ch = chan->channel; in rtw89_phy_fill_txpwr_limit_ax()
2180 u8 bw = chan->band_width; in rtw89_phy_fill_txpwr_limit_ax()
2206 const struct rtw89_rfe_parms *rfe_parms = rtwdev->rfe_parms; in rtw89_phy_read_txpwr_limit_ru()
2207 const struct rtw89_txpwr_rule_2ghz *rule_2ghz = &rfe_parms->rule_2ghz; in rtw89_phy_read_txpwr_limit_ru()
2208 const struct rtw89_txpwr_rule_5ghz *rule_5ghz = &rfe_parms->rule_5ghz; in rtw89_phy_read_txpwr_limit_ru()
2209 const struct rtw89_txpwr_rule_6ghz *rule_6ghz = &rfe_parms->rule_6ghz; in rtw89_phy_read_txpwr_limit_ru()
2210 struct rtw89_regulatory_info *regulatory = &rtwdev->regulatory; in rtw89_phy_read_txpwr_limit_ru()
2215 u8 reg6 = regulatory->reg_6ghz_power; in rtw89_phy_read_txpwr_limit_ru()
2216 s8 lmt_ru = 0, sar; in rtw89_phy_read_txpwr_limit_ru() local
2221 lmt_ru = (*rule_2ghz->lmt_ru)[ru][ntx][regd][ch_idx]; in rtw89_phy_read_txpwr_limit_ru()
2225 lmt_ru = (*rule_2ghz->lmt_ru)[ru][ntx][RTW89_WW][ch_idx]; in rtw89_phy_read_txpwr_limit_ru()
2228 lmt_ru = (*rule_5ghz->lmt_ru)[ru][ntx][regd][ch_idx]; in rtw89_phy_read_txpwr_limit_ru()
2232 lmt_ru = (*rule_5ghz->lmt_ru)[ru][ntx][RTW89_WW][ch_idx]; in rtw89_phy_read_txpwr_limit_ru()
2235 lmt_ru = (*rule_6ghz->lmt_ru)[ru][ntx][regd][reg6][ch_idx]; in rtw89_phy_read_txpwr_limit_ru()
2239 lmt_ru = (*rule_6ghz->lmt_ru)[ru][ntx][RTW89_WW] in rtw89_phy_read_txpwr_limit_ru()
2249 sar = rtw89_query_sar(rtwdev, freq); in rtw89_phy_read_txpwr_limit_ru()
2252 return min3(lmt_ru, sar, cstr); in rtw89_phy_read_txpwr_limit_ru()
2260 lmt_ru->ru26[0] = rtw89_phy_read_txpwr_limit_ru(rtwdev, band, in rtw89_phy_fill_txpwr_limit_ru_20m_ax()
2263 lmt_ru->ru52[0] = rtw89_phy_read_txpwr_limit_ru(rtwdev, band, in rtw89_phy_fill_txpwr_limit_ru_20m_ax()
2266 lmt_ru->ru106[0] = rtw89_phy_read_txpwr_limit_ru(rtwdev, band, in rtw89_phy_fill_txpwr_limit_ru_20m_ax()
2276 lmt_ru->ru26[0] = rtw89_phy_read_txpwr_limit_ru(rtwdev, band, in rtw89_phy_fill_txpwr_limit_ru_40m_ax()
2278 ntx, ch - 2); in rtw89_phy_fill_txpwr_limit_ru_40m_ax()
2279 lmt_ru->ru26[1] = rtw89_phy_read_txpwr_limit_ru(rtwdev, band, in rtw89_phy_fill_txpwr_limit_ru_40m_ax()
2282 lmt_ru->ru52[0] = rtw89_phy_read_txpwr_limit_ru(rtwdev, band, in rtw89_phy_fill_txpwr_limit_ru_40m_ax()
2284 ntx, ch - 2); in rtw89_phy_fill_txpwr_limit_ru_40m_ax()
2285 lmt_ru->ru52[1] = rtw89_phy_read_txpwr_limit_ru(rtwdev, band, in rtw89_phy_fill_txpwr_limit_ru_40m_ax()
2288 lmt_ru->ru106[0] = rtw89_phy_read_txpwr_limit_ru(rtwdev, band, in rtw89_phy_fill_txpwr_limit_ru_40m_ax()
2290 ntx, ch - 2); in rtw89_phy_fill_txpwr_limit_ru_40m_ax()
2291 lmt_ru->ru106[1] = rtw89_phy_read_txpwr_limit_ru(rtwdev, band, in rtw89_phy_fill_txpwr_limit_ru_40m_ax()
2301 lmt_ru->ru26[0] = rtw89_phy_read_txpwr_limit_ru(rtwdev, band, in rtw89_phy_fill_txpwr_limit_ru_80m_ax()
2303 ntx, ch - 6); in rtw89_phy_fill_txpwr_limit_ru_80m_ax()
2304 lmt_ru->ru26[1] = rtw89_phy_read_txpwr_limit_ru(rtwdev, band, in rtw89_phy_fill_txpwr_limit_ru_80m_ax()
2306 ntx, ch - 2); in rtw89_phy_fill_txpwr_limit_ru_80m_ax()
2307 lmt_ru->ru26[2] = rtw89_phy_read_txpwr_limit_ru(rtwdev, band, in rtw89_phy_fill_txpwr_limit_ru_80m_ax()
2310 lmt_ru->ru26[3] = rtw89_phy_read_txpwr_limit_ru(rtwdev, band, in rtw89_phy_fill_txpwr_limit_ru_80m_ax()
2313 lmt_ru->ru52[0] = rtw89_phy_read_txpwr_limit_ru(rtwdev, band, in rtw89_phy_fill_txpwr_limit_ru_80m_ax()
2315 ntx, ch - 6); in rtw89_phy_fill_txpwr_limit_ru_80m_ax()
2316 lmt_ru->ru52[1] = rtw89_phy_read_txpwr_limit_ru(rtwdev, band, in rtw89_phy_fill_txpwr_limit_ru_80m_ax()
2318 ntx, ch - 2); in rtw89_phy_fill_txpwr_limit_ru_80m_ax()
2319 lmt_ru->ru52[2] = rtw89_phy_read_txpwr_limit_ru(rtwdev, band, in rtw89_phy_fill_txpwr_limit_ru_80m_ax()
2322 lmt_ru->ru52[3] = rtw89_phy_read_txpwr_limit_ru(rtwdev, band, in rtw89_phy_fill_txpwr_limit_ru_80m_ax()
2325 lmt_ru->ru106[0] = rtw89_phy_read_txpwr_limit_ru(rtwdev, band, in rtw89_phy_fill_txpwr_limit_ru_80m_ax()
2327 ntx, ch - 6); in rtw89_phy_fill_txpwr_limit_ru_80m_ax()
2328 lmt_ru->ru106[1] = rtw89_phy_read_txpwr_limit_ru(rtwdev, band, in rtw89_phy_fill_txpwr_limit_ru_80m_ax()
2330 ntx, ch - 2); in rtw89_phy_fill_txpwr_limit_ru_80m_ax()
2331 lmt_ru->ru106[2] = rtw89_phy_read_txpwr_limit_ru(rtwdev, band, in rtw89_phy_fill_txpwr_limit_ru_80m_ax()
2334 lmt_ru->ru106[3] = rtw89_phy_read_txpwr_limit_ru(rtwdev, band, in rtw89_phy_fill_txpwr_limit_ru_80m_ax()
2344 static const int ofst[] = { -14, -10, -6, -2, 2, 6, 10, 14 }; in rtw89_phy_fill_txpwr_limit_ru_160m_ax()
2349 lmt_ru->ru26[i] = rtw89_phy_read_txpwr_limit_ru(rtwdev, band, in rtw89_phy_fill_txpwr_limit_ru_160m_ax()
2353 lmt_ru->ru52[i] = rtw89_phy_read_txpwr_limit_ru(rtwdev, band, in rtw89_phy_fill_txpwr_limit_ru_160m_ax()
2357 lmt_ru->ru106[i] = rtw89_phy_read_txpwr_limit_ru(rtwdev, band, in rtw89_phy_fill_txpwr_limit_ru_160m_ax()
2370 u8 band = chan->band_type; in rtw89_phy_fill_txpwr_limit_ru_ax()
2371 u8 ch = chan->channel; in rtw89_phy_fill_txpwr_limit_ru_ax()
2372 u8 bw = chan->band_width; in rtw89_phy_fill_txpwr_limit_ru_ax()
2400 u8 max_nss_num = rtwdev->chip->rf_path_num; in rtw89_phy_set_txpwr_byrate_ax()
2408 u8 band = chan->band_type; in rtw89_phy_set_txpwr_byrate_ax()
2409 u8 ch = chan->channel; in rtw89_phy_set_txpwr_byrate_ax()
2461 u8 band = chan->band_type; in rtw89_phy_set_txpwr_offset_ax()
2485 u8 max_ntx_num = rtwdev->chip->rf_path_num; in rtw89_phy_set_txpwr_limit_ax()
2487 u8 ch = chan->channel; in rtw89_phy_set_txpwr_limit_ax()
2488 u8 bw = chan->band_width; in rtw89_phy_set_txpwr_limit_ax()
2520 u8 max_ntx_num = rtwdev->chip->rf_path_num; in rtw89_phy_set_txpwr_limit_ru_ax()
2522 u8 ch = chan->channel; in rtw89_phy_set_txpwr_limit_ru_ax()
2523 u8 bw = chan->band_width; in rtw89_phy_set_txpwr_limit_ru_ax()
2559 struct rtw89_dev *rtwdev = ra_data->rtwdev; in rtw89_phy_c2h_ra_rpt_iter()
2560 struct rtw89_sta *rtwsta = (struct rtw89_sta *)sta->drv_priv; in rtw89_phy_c2h_ra_rpt_iter()
2562 (const struct rtw89_c2h_ra_rpt *)ra_data->c2h->data; in rtw89_phy_c2h_ra_rpt_iter()
2563 struct rtw89_ra_report *ra_report = &rtwsta->ra_report; in rtw89_phy_c2h_ra_rpt_iter()
2564 const struct rtw89_chip_info *chip = rtwdev->chip; in rtw89_phy_c2h_ra_rpt_iter()
2565 bool format_v1 = chip->chip_gen == RTW89_CHIP_BE; in rtw89_phy_c2h_ra_rpt_iter()
2572 mac_id = le32_get_bits(c2h->w2, RTW89_C2H_RA_RPT_W2_MACID); in rtw89_phy_c2h_ra_rpt_iter()
2573 if (mac_id != rtwsta->mac_id) in rtw89_phy_c2h_ra_rpt_iter()
2576 rate = le32_get_bits(c2h->w3, RTW89_C2H_RA_RPT_W3_MCSNSS); in rtw89_phy_c2h_ra_rpt_iter()
2577 bw = le32_get_bits(c2h->w3, RTW89_C2H_RA_RPT_W3_BW); in rtw89_phy_c2h_ra_rpt_iter()
2578 giltf = le32_get_bits(c2h->w3, RTW89_C2H_RA_RPT_W3_GILTF); in rtw89_phy_c2h_ra_rpt_iter()
2579 mode = le32_get_bits(c2h->w3, RTW89_C2H_RA_RPT_W3_MD_SEL); in rtw89_phy_c2h_ra_rpt_iter()
2582 t = le32_get_bits(c2h->w2, RTW89_C2H_RA_RPT_W2_MCSNSS_B7); in rtw89_phy_c2h_ra_rpt_iter()
2584 t = le32_get_bits(c2h->w3, RTW89_C2H_RA_RPT_W3_BW_B2); in rtw89_phy_c2h_ra_rpt_iter()
2586 t = le32_get_bits(c2h->w3, RTW89_C2H_RA_RPT_W3_MD_SEL_B2); in rtw89_phy_c2h_ra_rpt_iter()
2596 memset(&ra_report->txrate, 0, sizeof(ra_report->txrate)); in rtw89_phy_c2h_ra_rpt_iter()
2600 ra_report->txrate.legacy = legacy_bitrate; in rtw89_phy_c2h_ra_rpt_iter()
2603 ra_report->txrate.flags |= RATE_INFO_FLAGS_MCS; in rtw89_phy_c2h_ra_rpt_iter()
2604 if (RTW89_CHK_FW_FEATURE(OLD_HT_RA_FORMAT, &rtwdev->fw)) in rtw89_phy_c2h_ra_rpt_iter()
2609 ra_report->txrate.mcs = rate; in rtw89_phy_c2h_ra_rpt_iter()
2611 ra_report->txrate.flags |= RATE_INFO_FLAGS_SHORT_GI; in rtw89_phy_c2h_ra_rpt_iter()
2612 mcs = ra_report->txrate.mcs & 0x07; in rtw89_phy_c2h_ra_rpt_iter()
2615 ra_report->txrate.flags |= RATE_INFO_FLAGS_VHT_MCS; in rtw89_phy_c2h_ra_rpt_iter()
2616 ra_report->txrate.mcs = format_v1 ? in rtw89_phy_c2h_ra_rpt_iter()
2619 ra_report->txrate.nss = format_v1 ? in rtw89_phy_c2h_ra_rpt_iter()
2623 ra_report->txrate.flags |= RATE_INFO_FLAGS_SHORT_GI; in rtw89_phy_c2h_ra_rpt_iter()
2624 mcs = ra_report->txrate.mcs; in rtw89_phy_c2h_ra_rpt_iter()
2627 ra_report->txrate.flags |= RATE_INFO_FLAGS_HE_MCS; in rtw89_phy_c2h_ra_rpt_iter()
2628 ra_report->txrate.mcs = format_v1 ? in rtw89_phy_c2h_ra_rpt_iter()
2631 ra_report->txrate.nss = format_v1 ? in rtw89_phy_c2h_ra_rpt_iter()
2635 ra_report->txrate.he_gi = NL80211_RATE_INFO_HE_GI_0_8; in rtw89_phy_c2h_ra_rpt_iter()
2637 ra_report->txrate.he_gi = NL80211_RATE_INFO_HE_GI_1_6; in rtw89_phy_c2h_ra_rpt_iter()
2639 ra_report->txrate.he_gi = NL80211_RATE_INFO_HE_GI_3_2; in rtw89_phy_c2h_ra_rpt_iter()
2640 mcs = ra_report->txrate.mcs; in rtw89_phy_c2h_ra_rpt_iter()
2643 ra_report->txrate.flags |= RATE_INFO_FLAGS_EHT_MCS; in rtw89_phy_c2h_ra_rpt_iter()
2644 ra_report->txrate.mcs = u8_get_bits(rate, RTW89_RA_RATE_MASK_MCS_V1); in rtw89_phy_c2h_ra_rpt_iter()
2645 ra_report->txrate.nss = u8_get_bits(rate, RTW89_RA_RATE_MASK_NSS_V1) + 1; in rtw89_phy_c2h_ra_rpt_iter()
2647 ra_report->txrate.eht_gi = NL80211_RATE_INFO_EHT_GI_0_8; in rtw89_phy_c2h_ra_rpt_iter()
2649 ra_report->txrate.eht_gi = NL80211_RATE_INFO_EHT_GI_1_6; in rtw89_phy_c2h_ra_rpt_iter()
2651 ra_report->txrate.eht_gi = NL80211_RATE_INFO_EHT_GI_3_2; in rtw89_phy_c2h_ra_rpt_iter()
2652 mcs = ra_report->txrate.mcs; in rtw89_phy_c2h_ra_rpt_iter()
2656 ra_report->txrate.bw = rtw89_hw_to_rate_info_bw(bw); in rtw89_phy_c2h_ra_rpt_iter()
2657 ra_report->bit_rate = cfg80211_calculate_bitrate(&ra_report->txrate); in rtw89_phy_c2h_ra_rpt_iter()
2658 ra_report->hw_rate = format_v1 ? in rtw89_phy_c2h_ra_rpt_iter()
2663 ra_report->might_fallback_legacy = mcs <= 2; in rtw89_phy_c2h_ra_rpt_iter()
2664 sta->deflink.agg.max_rc_amsdu_len = get_max_amsdu_len(rtwdev, ra_report); in rtw89_phy_c2h_ra_rpt_iter()
2665 rtwsta->max_agg_wait = sta->deflink.agg.max_rc_amsdu_len / 1500 - 1; in rtw89_phy_c2h_ra_rpt_iter()
2675 ieee80211_iterate_stations_atomic(rtwdev->hw, in rtw89_phy_c2h_ra_rpt()
2705 dpk->ver, dpk->idx, dpk->band, dpk->bw, dpk->ch, dpk->path_ok); in rtw89_phy_c2h_rfk_rpt_log()
2708 dpk->txagc, dpk->ther, dpk->gs, dpk->dc_i, dpk->dc_q); in rtw89_phy_c2h_rfk_rpt_log()
2711 dpk->corr_val, dpk->corr_idx, dpk->is_timeout, dpk->rxbb_ov); in rtw89_phy_c2h_rfk_rpt_log()
2720 dack->fwdack_ver, dack->fwdack_rpt_ver); in rtw89_phy_c2h_rfk_rpt_log()
2722 dack->cdack_d[0][0][0], dack->cdack_d[0][0][1]); in rtw89_phy_c2h_rfk_rpt_log()
2724 dack->cdack_d[0][1][0], dack->cdack_d[0][1][1]); in rtw89_phy_c2h_rfk_rpt_log()
2726 dack->cdack_d[1][0][0], dack->cdack_d[1][0][1]); in rtw89_phy_c2h_rfk_rpt_log()
2728 dack->cdack_d[1][1][0], dack->cdack_d[1][1][1]); in rtw89_phy_c2h_rfk_rpt_log()
2731 dack->addck2_d[0][0][0], dack->addck2_d[0][0][1]); in rtw89_phy_c2h_rfk_rpt_log()
2733 dack->addck2_d[0][1][0], dack->addck2_d[0][1][1]); in rtw89_phy_c2h_rfk_rpt_log()
2735 dack->addck2_d[1][0][0], dack->addck2_d[1][0][1]); in rtw89_phy_c2h_rfk_rpt_log()
2737 dack->addck2_d[1][1][0], dack->addck2_d[1][1][1]); in rtw89_phy_c2h_rfk_rpt_log()
2740 dack->adgaink_d[0][0], dack->adgaink_d[0][1]); in rtw89_phy_c2h_rfk_rpt_log()
2742 dack->adgaink_d[1][0], dack->adgaink_d[1][1]); in rtw89_phy_c2h_rfk_rpt_log()
2745 dack->dadck_d[0][0], dack->dadck_d[0][1]); in rtw89_phy_c2h_rfk_rpt_log()
2747 dack->dadck_d[1][0], dack->dadck_d[1][1]); in rtw89_phy_c2h_rfk_rpt_log()
2750 dack->biask_d[0][0]); in rtw89_phy_c2h_rfk_rpt_log()
2752 dack->biask_d[1][0]); in rtw89_phy_c2h_rfk_rpt_log()
2755 (int)sizeof(dack->msbk_d[0][0]), dack->msbk_d[0][0]); in rtw89_phy_c2h_rfk_rpt_log()
2757 (int)sizeof(dack->msbk_d[0][1]), dack->msbk_d[0][1]); in rtw89_phy_c2h_rfk_rpt_log()
2759 (int)sizeof(dack->msbk_d[1][0]), dack->msbk_d[1][0]); in rtw89_phy_c2h_rfk_rpt_log()
2761 (int)sizeof(dack->msbk_d[1][1]), dack->msbk_d[1][1]); in rtw89_phy_c2h_rfk_rpt_log()
2770 rxdck->ver, rxdck->band, rxdck->bw, rxdck->ch, in rtw89_phy_c2h_rfk_rpt_log()
2771 rxdck->timeout); in rtw89_phy_c2h_rfk_rpt_log()
2780 le32_to_cpu(txgapk->r0x8010[0]), in rtw89_phy_c2h_rfk_rpt_log()
2781 le32_to_cpu(txgapk->r0x8010[1])); in rtw89_phy_c2h_rfk_rpt_log()
2783 txgapk->chk_id); in rtw89_phy_c2h_rfk_rpt_log()
2785 le32_to_cpu(txgapk->chk_cnt)); in rtw89_phy_c2h_rfk_rpt_log()
2787 txgapk->ver); in rtw89_phy_c2h_rfk_rpt_log()
2789 txgapk->rsv1); in rtw89_phy_c2h_rfk_rpt_log()
2792 (int)sizeof(txgapk->track_d[0]), txgapk->track_d[0]); in rtw89_phy_c2h_rfk_rpt_log()
2794 (int)sizeof(txgapk->power_d[0]), txgapk->power_d[0]); in rtw89_phy_c2h_rfk_rpt_log()
2796 (int)sizeof(txgapk->track_d[1]), txgapk->track_d[1]); in rtw89_phy_c2h_rfk_rpt_log()
2798 (int)sizeof(txgapk->power_d[1]), txgapk->power_d[1]); in rtw89_phy_c2h_rfk_rpt_log()
2813 struct rtw89_fw_elm_info *elm_info = &rtwdev->fw.elm_info; in rtw89_phy_c2h_rfk_run_log()
2822 if (!elm_info->rfk_log_fmt) in rtw89_phy_c2h_rfk_run_log()
2825 elm = elm_info->rfk_log_fmt->elm[func]; in rtw89_phy_c2h_rfk_run_log()
2826 fmt_idx = le32_to_cpu(log->fmt_idx); in rtw89_phy_c2h_rfk_run_log()
2827 if (!elm || fmt_idx >= elm->u.rfk_log_fmt.nr) in rtw89_phy_c2h_rfk_run_log()
2830 offset = le16_to_cpu(elm->u.rfk_log_fmt.offset[fmt_idx]); in rtw89_phy_c2h_rfk_run_log()
2834 rtw89_debug(rtwdev, RTW89_DBG_RFK, &elm->u.common.contents[offset], in rtw89_phy_c2h_rfk_run_log()
2835 le32_to_cpu(log->arg[0]), le32_to_cpu(log->arg[1]), in rtw89_phy_c2h_rfk_run_log()
2836 le32_to_cpu(log->arg[2]), le32_to_cpu(log->arg[3])); in rtw89_phy_c2h_rfk_run_log()
2845 struct rtw89_c2h_hdr *c2h_hdr = (struct rtw89_c2h_hdr *)c2h->data; in rtw89_phy_c2h_rfk_log()
2856 len -= sizeof(*c2h_hdr); in rtw89_phy_c2h_rfk_log()
2860 content_len = le16_to_cpu(log_hdr->len); in rtw89_phy_c2h_rfk_log()
2866 switch (log_hdr->type) { in rtw89_phy_c2h_rfk_log()
2869 log_hdr->content, content_len); in rtw89_phy_c2h_rfk_log()
2874 rfk_name, content_len, log_hdr->content); in rtw89_phy_c2h_rfk_log()
2878 log_hdr->content, content_len); in rtw89_phy_c2h_rfk_log()
2885 len -= chunk_len; in rtw89_phy_c2h_rfk_log()
2945 struct rtw89_rfk_wait_info *wait = &rtwdev->rfk_wait; in rtw89_phy_rfk_report_prep()
2947 wait->state = RTW89_RFK_STATE_START; in rtw89_phy_rfk_report_prep()
2948 wait->start_time = ktime_get(); in rtw89_phy_rfk_report_prep()
2949 reinit_completion(&wait->completion); in rtw89_phy_rfk_report_prep()
2956 struct rtw89_rfk_wait_info *wait = &rtwdev->rfk_wait; in rtw89_phy_rfk_report_wait()
2960 if (test_bit(RTW89_FLAG_SER_HANDLING, rtwdev->flags)) { in rtw89_phy_rfk_report_wait()
2965 time_left = wait_for_completion_timeout(&wait->completion, in rtw89_phy_rfk_report_wait()
2969 return -ETIMEDOUT; in rtw89_phy_rfk_report_wait()
2970 } else if (wait->state != RTW89_RFK_STATE_OK) { in rtw89_phy_rfk_report_wait()
2972 rfk_name, wait->state); in rtw89_phy_rfk_report_wait()
2973 return -EFAULT; in rtw89_phy_rfk_report_wait()
2978 rfk_name, ktime_ms_delta(ktime_get(), wait->start_time)); in rtw89_phy_rfk_report_wait()
2987 (const struct rtw89_c2h_rfk_report *)c2h->data; in rtw89_phy_c2h_rfk_report_state()
2988 struct rtw89_rfk_wait_info *wait = &rtwdev->rfk_wait; in rtw89_phy_c2h_rfk_report_state()
2990 wait->state = report->state; in rtw89_phy_c2h_rfk_report_state()
2991 wait->version = report->version; in rtw89_phy_c2h_rfk_report_state()
2993 complete(&wait->completion); in rtw89_phy_c2h_rfk_report_state()
2997 wait->state, wait->version, in rtw89_phy_c2h_rfk_report_state()
2998 (int)(len - sizeof(report->hdr)), &report->state); in rtw89_phy_c2h_rfk_report_state()
3493 struct rtw89_tssi_info *tssi_info = &rtwdev->tssi; in phy_tssi_get_ofdm_de()
3494 enum rtw89_band band = chan->band_type; in phy_tssi_get_ofdm_de()
3495 u8 ch = chan->channel; in phy_tssi_get_ofdm_de()
3515 de_1st = tssi_info->tssi_mcs[path][gidx_1st]; in phy_tssi_get_ofdm_de()
3516 de_2nd = tssi_info->tssi_mcs[path][gidx_2nd]; in phy_tssi_get_ofdm_de()
3523 val = tssi_info->tssi_mcs[path][gidx]; in phy_tssi_get_ofdm_de()
3541 de_1st = tssi_info->tssi_6g_mcs[path][gidx_1st]; in phy_tssi_get_ofdm_de()
3542 de_2nd = tssi_info->tssi_6g_mcs[path][gidx_2nd]; in phy_tssi_get_ofdm_de()
3549 val = tssi_info->tssi_6g_mcs[path][gidx]; in phy_tssi_get_ofdm_de()
3563 struct rtw89_tssi_info *tssi_info = &rtwdev->tssi; in phy_tssi_get_ofdm_trim_de()
3564 enum rtw89_band band = chan->band_type; in phy_tssi_get_ofdm_trim_de()
3565 u8 ch = chan->channel; in phy_tssi_get_ofdm_trim_de()
3585 tde_1st = tssi_info->tssi_trim[path][tgidx_1st]; in phy_tssi_get_ofdm_trim_de()
3586 tde_2nd = tssi_info->tssi_trim[path][tgidx_2nd]; in phy_tssi_get_ofdm_trim_de()
3593 val = tssi_info->tssi_trim[path][tgidx]; in phy_tssi_get_ofdm_trim_de()
3612 tde_1st = tssi_info->tssi_trim_6g[path][tgidx_1st]; in phy_tssi_get_ofdm_trim_de()
3613 tde_2nd = tssi_info->tssi_trim_6g[path][tgidx_2nd]; in phy_tssi_get_ofdm_trim_de()
3620 val = tssi_info->tssi_trim_6g[path][tgidx]; in phy_tssi_get_ofdm_trim_de()
3635 struct rtw89_tssi_info *tssi_info = &rtwdev->tssi; in rtw89_phy_rfk_tssi_fill_fwcmd_efuse_to_de()
3636 u8 ch = chan->channel; in rtw89_phy_rfk_tssi_fill_fwcmd_efuse_to_de()
3649 h2c->curr_tssi_trim_de[i] = trim_de; in rtw89_phy_rfk_tssi_fill_fwcmd_efuse_to_de()
3655 cck_de = tssi_info->tssi_cck[i][gidx]; in rtw89_phy_rfk_tssi_fill_fwcmd_efuse_to_de()
3658 h2c->curr_tssi_cck_de[i] = 0x0; in rtw89_phy_rfk_tssi_fill_fwcmd_efuse_to_de()
3659 h2c->curr_tssi_cck_de_20m[i] = val; in rtw89_phy_rfk_tssi_fill_fwcmd_efuse_to_de()
3660 h2c->curr_tssi_cck_de_40m[i] = val; in rtw89_phy_rfk_tssi_fill_fwcmd_efuse_to_de()
3661 h2c->curr_tssi_efuse_cck_de[i] = cck_de; in rtw89_phy_rfk_tssi_fill_fwcmd_efuse_to_de()
3669 h2c->curr_tssi_ofdm_de[i] = 0x0; in rtw89_phy_rfk_tssi_fill_fwcmd_efuse_to_de()
3670 h2c->curr_tssi_ofdm_de_20m[i] = val; in rtw89_phy_rfk_tssi_fill_fwcmd_efuse_to_de()
3671 h2c->curr_tssi_ofdm_de_40m[i] = val; in rtw89_phy_rfk_tssi_fill_fwcmd_efuse_to_de()
3672 h2c->curr_tssi_ofdm_de_80m[i] = val; in rtw89_phy_rfk_tssi_fill_fwcmd_efuse_to_de()
3673 h2c->curr_tssi_ofdm_de_160m[i] = val; in rtw89_phy_rfk_tssi_fill_fwcmd_efuse_to_de()
3674 h2c->curr_tssi_ofdm_de_320m[i] = val; in rtw89_phy_rfk_tssi_fill_fwcmd_efuse_to_de()
3675 h2c->curr_tssi_efuse_ofdm_de[i] = ofdm_de; in rtw89_phy_rfk_tssi_fill_fwcmd_efuse_to_de()
3687 struct rtw89_fw_txpwr_track_cfg *trk = rtwdev->fw.elm_info.txpwr_trk; in rtw89_phy_rfk_tssi_fill_fwcmd_tmeter_tbl()
3688 struct rtw89_tssi_info *tssi_info = &rtwdev->tssi; in rtw89_phy_rfk_tssi_fill_fwcmd_tmeter_tbl()
3691 u8 subband = chan->subband_type; in rtw89_phy_rfk_tssi_fill_fwcmd_tmeter_tbl()
3700 thm_up[RF_PATH_A] = trk->delta[RTW89_FW_TXPWR_TRK_TYPE_2GA_P][0]; in rtw89_phy_rfk_tssi_fill_fwcmd_tmeter_tbl()
3701 thm_down[RF_PATH_A] = trk->delta[RTW89_FW_TXPWR_TRK_TYPE_2GA_N][0]; in rtw89_phy_rfk_tssi_fill_fwcmd_tmeter_tbl()
3702 thm_up[RF_PATH_B] = trk->delta[RTW89_FW_TXPWR_TRK_TYPE_2GB_P][0]; in rtw89_phy_rfk_tssi_fill_fwcmd_tmeter_tbl()
3703 thm_down[RF_PATH_B] = trk->delta[RTW89_FW_TXPWR_TRK_TYPE_2GB_N][0]; in rtw89_phy_rfk_tssi_fill_fwcmd_tmeter_tbl()
3706 thm_up[RF_PATH_A] = trk->delta[RTW89_FW_TXPWR_TRK_TYPE_5GA_P][0]; in rtw89_phy_rfk_tssi_fill_fwcmd_tmeter_tbl()
3707 thm_down[RF_PATH_A] = trk->delta[RTW89_FW_TXPWR_TRK_TYPE_5GA_N][0]; in rtw89_phy_rfk_tssi_fill_fwcmd_tmeter_tbl()
3708 thm_up[RF_PATH_B] = trk->delta[RTW89_FW_TXPWR_TRK_TYPE_5GB_P][0]; in rtw89_phy_rfk_tssi_fill_fwcmd_tmeter_tbl()
3709 thm_down[RF_PATH_B] = trk->delta[RTW89_FW_TXPWR_TRK_TYPE_5GB_N][0]; in rtw89_phy_rfk_tssi_fill_fwcmd_tmeter_tbl()
3712 thm_up[RF_PATH_A] = trk->delta[RTW89_FW_TXPWR_TRK_TYPE_5GA_P][1]; in rtw89_phy_rfk_tssi_fill_fwcmd_tmeter_tbl()
3713 thm_down[RF_PATH_A] = trk->delta[RTW89_FW_TXPWR_TRK_TYPE_5GA_N][1]; in rtw89_phy_rfk_tssi_fill_fwcmd_tmeter_tbl()
3714 thm_up[RF_PATH_B] = trk->delta[RTW89_FW_TXPWR_TRK_TYPE_5GB_P][1]; in rtw89_phy_rfk_tssi_fill_fwcmd_tmeter_tbl()
3715 thm_down[RF_PATH_B] = trk->delta[RTW89_FW_TXPWR_TRK_TYPE_5GB_N][1]; in rtw89_phy_rfk_tssi_fill_fwcmd_tmeter_tbl()
3718 thm_up[RF_PATH_A] = trk->delta[RTW89_FW_TXPWR_TRK_TYPE_5GA_P][2]; in rtw89_phy_rfk_tssi_fill_fwcmd_tmeter_tbl()
3719 thm_down[RF_PATH_A] = trk->delta[RTW89_FW_TXPWR_TRK_TYPE_5GA_N][2]; in rtw89_phy_rfk_tssi_fill_fwcmd_tmeter_tbl()
3720 thm_up[RF_PATH_B] = trk->delta[RTW89_FW_TXPWR_TRK_TYPE_5GB_P][2]; in rtw89_phy_rfk_tssi_fill_fwcmd_tmeter_tbl()
3721 thm_down[RF_PATH_B] = trk->delta[RTW89_FW_TXPWR_TRK_TYPE_5GB_N][2]; in rtw89_phy_rfk_tssi_fill_fwcmd_tmeter_tbl()
3725 thm_up[RF_PATH_A] = trk->delta[RTW89_FW_TXPWR_TRK_TYPE_6GA_P][0]; in rtw89_phy_rfk_tssi_fill_fwcmd_tmeter_tbl()
3726 thm_down[RF_PATH_A] = trk->delta[RTW89_FW_TXPWR_TRK_TYPE_6GA_N][0]; in rtw89_phy_rfk_tssi_fill_fwcmd_tmeter_tbl()
3727 thm_up[RF_PATH_B] = trk->delta[RTW89_FW_TXPWR_TRK_TYPE_6GB_P][0]; in rtw89_phy_rfk_tssi_fill_fwcmd_tmeter_tbl()
3728 thm_down[RF_PATH_B] = trk->delta[RTW89_FW_TXPWR_TRK_TYPE_6GB_N][0]; in rtw89_phy_rfk_tssi_fill_fwcmd_tmeter_tbl()
3732 thm_up[RF_PATH_A] = trk->delta[RTW89_FW_TXPWR_TRK_TYPE_6GA_P][1]; in rtw89_phy_rfk_tssi_fill_fwcmd_tmeter_tbl()
3733 thm_down[RF_PATH_A] = trk->delta[RTW89_FW_TXPWR_TRK_TYPE_6GA_N][1]; in rtw89_phy_rfk_tssi_fill_fwcmd_tmeter_tbl()
3734 thm_up[RF_PATH_B] = trk->delta[RTW89_FW_TXPWR_TRK_TYPE_6GB_P][1]; in rtw89_phy_rfk_tssi_fill_fwcmd_tmeter_tbl()
3735 thm_down[RF_PATH_B] = trk->delta[RTW89_FW_TXPWR_TRK_TYPE_6GB_N][1]; in rtw89_phy_rfk_tssi_fill_fwcmd_tmeter_tbl()
3739 thm_up[RF_PATH_A] = trk->delta[RTW89_FW_TXPWR_TRK_TYPE_6GA_P][2]; in rtw89_phy_rfk_tssi_fill_fwcmd_tmeter_tbl()
3740 thm_down[RF_PATH_A] = trk->delta[RTW89_FW_TXPWR_TRK_TYPE_6GA_N][2]; in rtw89_phy_rfk_tssi_fill_fwcmd_tmeter_tbl()
3741 thm_up[RF_PATH_B] = trk->delta[RTW89_FW_TXPWR_TRK_TYPE_6GB_P][2]; in rtw89_phy_rfk_tssi_fill_fwcmd_tmeter_tbl()
3742 thm_down[RF_PATH_B] = trk->delta[RTW89_FW_TXPWR_TRK_TYPE_6GB_N][2]; in rtw89_phy_rfk_tssi_fill_fwcmd_tmeter_tbl()
3746 thm_up[RF_PATH_A] = trk->delta[RTW89_FW_TXPWR_TRK_TYPE_6GA_P][3]; in rtw89_phy_rfk_tssi_fill_fwcmd_tmeter_tbl()
3747 thm_down[RF_PATH_A] = trk->delta[RTW89_FW_TXPWR_TRK_TYPE_6GA_N][3]; in rtw89_phy_rfk_tssi_fill_fwcmd_tmeter_tbl()
3748 thm_up[RF_PATH_B] = trk->delta[RTW89_FW_TXPWR_TRK_TYPE_6GB_P][3]; in rtw89_phy_rfk_tssi_fill_fwcmd_tmeter_tbl()
3749 thm_down[RF_PATH_B] = trk->delta[RTW89_FW_TXPWR_TRK_TYPE_6GB_N][3]; in rtw89_phy_rfk_tssi_fill_fwcmd_tmeter_tbl()
3757 thermal = tssi_info->thermal[path]; in rtw89_phy_rfk_tssi_fill_fwcmd_tmeter_tbl()
3762 h2c->pg_thermal[path] = 0x38; in rtw89_phy_rfk_tssi_fill_fwcmd_tmeter_tbl()
3763 memset(h2c->ftable[path], 0, sizeof(h2c->ftable[path])); in rtw89_phy_rfk_tssi_fill_fwcmd_tmeter_tbl()
3767 h2c->pg_thermal[path] = thermal; in rtw89_phy_rfk_tssi_fill_fwcmd_tmeter_tbl()
3773 thm_up[path][DELTA_SWINGIDX_SIZE - 1]; in rtw89_phy_rfk_tssi_fill_fwcmd_tmeter_tbl()
3776 for (j = 127; j >= 64; j--) in rtw89_phy_rfk_tssi_fill_fwcmd_tmeter_tbl()
3778 -thm_down[path][i++] : in rtw89_phy_rfk_tssi_fill_fwcmd_tmeter_tbl()
3779 -thm_down[path][DELTA_SWINGIDX_SIZE - 1]; in rtw89_phy_rfk_tssi_fill_fwcmd_tmeter_tbl()
3782 h2c->ftable[path][i + 0] = thm_ofst[i + 3]; in rtw89_phy_rfk_tssi_fill_fwcmd_tmeter_tbl()
3783 h2c->ftable[path][i + 1] = thm_ofst[i + 2]; in rtw89_phy_rfk_tssi_fill_fwcmd_tmeter_tbl()
3784 h2c->ftable[path][i + 2] = thm_ofst[i + 1]; in rtw89_phy_rfk_tssi_fill_fwcmd_tmeter_tbl()
3785 h2c->ftable[path][i + 3] = thm_ofst[i + 0]; in rtw89_phy_rfk_tssi_fill_fwcmd_tmeter_tbl()
3797 const struct rtw89_xtal_info *xtal = rtwdev->chip->xtal_info; in rtw89_phy_cfo_get_xcap_reg()
3801 reg_mask = xtal->sc_xo_mask; in rtw89_phy_cfo_get_xcap_reg()
3803 reg_mask = xtal->sc_xi_mask; in rtw89_phy_cfo_get_xcap_reg()
3805 return (u8)rtw89_read32_mask(rtwdev, xtal->xcap_reg, reg_mask); in rtw89_phy_cfo_get_xcap_reg()
3811 const struct rtw89_xtal_info *xtal = rtwdev->chip->xtal_info; in rtw89_phy_cfo_set_xcap_reg()
3815 reg_mask = xtal->sc_xo_mask; in rtw89_phy_cfo_set_xcap_reg()
3817 reg_mask = xtal->sc_xi_mask; in rtw89_phy_cfo_set_xcap_reg()
3819 rtw89_write32_mask(rtwdev, xtal->xcap_reg, reg_mask, val); in rtw89_phy_cfo_set_xcap_reg()
3825 struct rtw89_cfo_tracking_info *cfo = &rtwdev->cfo_tracking; in rtw89_phy_cfo_set_crystal_cap()
3826 const struct rtw89_chip_info *chip = rtwdev->chip; in rtw89_phy_cfo_set_crystal_cap()
3829 if (!force && cfo->crystal_cap == crystal_cap) in rtw89_phy_cfo_set_crystal_cap()
3832 if (chip->chip_id == RTL8852A || chip->chip_id == RTL8851B) { in rtw89_phy_cfo_set_crystal_cap()
3845 cfo->crystal_cap = sc_xi_val; in rtw89_phy_cfo_set_crystal_cap()
3846 cfo->x_cap_ofst = (s8)((int)cfo->crystal_cap - cfo->def_x_cap); in rtw89_phy_cfo_set_crystal_cap()
3851 cfo->x_cap_ofst); in rtw89_phy_cfo_set_crystal_cap()
3857 struct rtw89_cfo_tracking_info *cfo = &rtwdev->cfo_tracking; in rtw89_phy_cfo_reset()
3860 cfo->def_x_cap = cfo->crystal_cap_default & B_AX_XTAL_SC_MASK; in rtw89_phy_cfo_reset()
3861 cfo->is_adjust = false; in rtw89_phy_cfo_reset()
3862 if (cfo->crystal_cap == cfo->def_x_cap) in rtw89_phy_cfo_reset()
3864 cap = cfo->crystal_cap; in rtw89_phy_cfo_reset()
3865 cap += (cap > cfo->def_x_cap ? -1 : 1); in rtw89_phy_cfo_reset()
3868 "(0x%x) approach to dflt_val=(0x%x)\n", cfo->crystal_cap, in rtw89_phy_cfo_reset()
3869 cfo->def_x_cap); in rtw89_phy_cfo_reset()
3874 const struct rtw89_reg_def *dcfo_comp = rtwdev->chip->dcfo_comp; in rtw89_dcfo_comp()
3875 bool is_linked = rtwdev->total_sta_assoc > 0; in rtw89_dcfo_comp()
3880 if (rtwdev->chip->chip_id == RTL8922A) in rtw89_dcfo_comp()
3892 sign = curr_cfo > 0 ? 1 : -1; in rtw89_dcfo_comp()
3895 if (rtwdev->chip->chip_id == RTL8852A && rtwdev->hal.cv == CHIP_CBV) in rtw89_dcfo_comp()
3896 cfo_avg_312 = -cfo_avg_312; in rtw89_dcfo_comp()
3897 rtw89_phy_set_phy_regs(rtwdev, dcfo_comp->addr, dcfo_comp->mask, in rtw89_dcfo_comp()
3903 const struct rtw89_phy_gen_def *phy = rtwdev->chip->phy_def; in rtw89_dcfo_comp_init()
3904 const struct rtw89_chip_info *chip = rtwdev->chip; in rtw89_dcfo_comp_init()
3905 const struct rtw89_cfo_regs *cfo = phy->cfo; in rtw89_dcfo_comp_init()
3907 rtw89_phy_set_phy_regs(rtwdev, cfo->comp_seg0, cfo->valid_0_mask, 1); in rtw89_dcfo_comp_init()
3908 rtw89_phy_set_phy_regs(rtwdev, cfo->comp, cfo->weighting_mask, 8); in rtw89_dcfo_comp_init()
3910 if (chip->chip_gen == RTW89_CHIP_AX) { in rtw89_dcfo_comp_init()
3911 if (chip->cfo_hw_comp) { in rtw89_dcfo_comp_init()
3924 struct rtw89_cfo_tracking_info *cfo = &rtwdev->cfo_tracking; in rtw89_phy_cfo_init()
3925 struct rtw89_efuse *efuse = &rtwdev->efuse; in rtw89_phy_cfo_init()
3927 cfo->crystal_cap_default = efuse->xtal_cap & B_AX_XTAL_SC_MASK; in rtw89_phy_cfo_init()
3928 cfo->crystal_cap = cfo->crystal_cap_default; in rtw89_phy_cfo_init()
3929 cfo->def_x_cap = cfo->crystal_cap; in rtw89_phy_cfo_init()
3930 cfo->x_cap_ub = min_t(int, cfo->def_x_cap + CFO_BOUND, 0x7f); in rtw89_phy_cfo_init()
3931 cfo->x_cap_lb = max_t(int, cfo->def_x_cap - CFO_BOUND, 0x1); in rtw89_phy_cfo_init()
3932 cfo->is_adjust = false; in rtw89_phy_cfo_init()
3933 cfo->divergence_lock_en = false; in rtw89_phy_cfo_init()
3934 cfo->x_cap_ofst = 0; in rtw89_phy_cfo_init()
3935 cfo->lock_cnt = 0; in rtw89_phy_cfo_init()
3936 cfo->rtw89_multi_cfo_mode = RTW89_TP_BASED_AVG_MODE; in rtw89_phy_cfo_init()
3937 cfo->apply_compensation = false; in rtw89_phy_cfo_init()
3938 cfo->residual_cfo_acc = 0; in rtw89_phy_cfo_init()
3940 cfo->crystal_cap_default); in rtw89_phy_cfo_init()
3941 rtw89_phy_cfo_set_crystal_cap(rtwdev, cfo->crystal_cap_default, true); in rtw89_phy_cfo_init()
3943 cfo->cfo_timer_ms = 2000; in rtw89_phy_cfo_init()
3944 cfo->cfo_trig_by_timer_en = false; in rtw89_phy_cfo_init()
3945 cfo->phy_cfo_trk_cnt = 0; in rtw89_phy_cfo_init()
3946 cfo->phy_cfo_status = RTW89_PHY_DCFO_STATE_NORMAL; in rtw89_phy_cfo_init()
3947 cfo->cfo_ul_ofdma_acc_mode = RTW89_CFO_UL_OFDMA_ACC_ENABLE; in rtw89_phy_cfo_init()
3953 struct rtw89_cfo_tracking_info *cfo = &rtwdev->cfo_tracking; in rtw89_phy_cfo_crystal_cap_adjust()
3954 s8 crystal_cap = cfo->crystal_cap; in rtw89_phy_cfo_crystal_cap_adjust()
3962 if (!cfo->is_adjust) { in rtw89_phy_cfo_crystal_cap_adjust()
3964 cfo->is_adjust = true; in rtw89_phy_cfo_crystal_cap_adjust()
3967 cfo->is_adjust = false; in rtw89_phy_cfo_crystal_cap_adjust()
3969 if (!cfo->is_adjust) { in rtw89_phy_cfo_crystal_cap_adjust()
3973 sign = curr_cfo > 0 ? 1 : -1; in rtw89_phy_cfo_crystal_cap_adjust()
3987 cfo->crystal_cap, cfo->def_x_cap); in rtw89_phy_cfo_crystal_cap_adjust()
3992 const struct rtw89_chip_info *chip = rtwdev->chip; in rtw89_phy_average_cfo_calc()
3993 struct rtw89_cfo_tracking_info *cfo = &rtwdev->cfo_tracking; in rtw89_phy_average_cfo_calc()
3999 if (rtwdev->total_sta_assoc != 1) in rtw89_phy_average_cfo_calc()
4003 if (cfo->cfo_cnt[i] == 0) in rtw89_phy_average_cfo_calc()
4005 cfo_khz_all += cfo->cfo_tail[i]; in rtw89_phy_average_cfo_calc()
4006 cfo_cnt_all += cfo->cfo_cnt[i]; in rtw89_phy_average_cfo_calc()
4008 cfo->pre_cfo_avg[i] = cfo->cfo_avg[i]; in rtw89_phy_average_cfo_calc()
4009 cfo->dcfo_avg = phy_div(cfo_khz_all << chip->dcfo_comp_sft, in rtw89_phy_average_cfo_calc()
4022 struct rtw89_cfo_tracking_info *cfo = &rtwdev->cfo_tracking; in rtw89_phy_multi_sta_cfo_calc()
4023 struct rtw89_traffic_stats *stats = &rtwdev->stats; in rtw89_phy_multi_sta_cfo_calc()
4038 if (cfo->rtw89_multi_cfo_mode == RTW89_PKT_BASED_AVG_MODE) { in rtw89_phy_multi_sta_cfo_calc()
4041 if (cfo->cfo_cnt[i] == 0) in rtw89_phy_multi_sta_cfo_calc()
4043 cfo_khz_all += cfo->cfo_tail[i]; in rtw89_phy_multi_sta_cfo_calc()
4044 cfo_cnt_all += cfo->cfo_cnt[i]; in rtw89_phy_multi_sta_cfo_calc()
4051 } else if (cfo->rtw89_multi_cfo_mode == RTW89_ENTRY_BASED_AVG_MODE) { in rtw89_phy_multi_sta_cfo_calc()
4054 if (cfo->cfo_cnt[i] == 0) in rtw89_phy_multi_sta_cfo_calc()
4056 cfo->cfo_avg[i] = phy_div(cfo->cfo_tail[i], in rtw89_phy_multi_sta_cfo_calc()
4057 (s32)cfo->cfo_cnt[i]); in rtw89_phy_multi_sta_cfo_calc()
4058 cfo_khz_all += cfo->cfo_avg[i]; in rtw89_phy_multi_sta_cfo_calc()
4061 cfo->cfo_avg[i]); in rtw89_phy_multi_sta_cfo_calc()
4063 sta_cnt = rtwdev->total_sta_assoc; in rtw89_phy_multi_sta_cfo_calc()
4069 } else if (cfo->rtw89_multi_cfo_mode == RTW89_TP_BASED_AVG_MODE) { in rtw89_phy_multi_sta_cfo_calc()
4071 cfo_tol = cfo->sta_cfo_tolerance; in rtw89_phy_multi_sta_cfo_calc()
4074 if (cfo->cfo_cnt[i] != 0) { in rtw89_phy_multi_sta_cfo_calc()
4075 cfo->cfo_avg[i] = phy_div(cfo->cfo_tail[i], in rtw89_phy_multi_sta_cfo_calc()
4076 (s32)cfo->cfo_cnt[i]); in rtw89_phy_multi_sta_cfo_calc()
4079 cfo->cfo_avg[i] = cfo->pre_cfo_avg[i]; in rtw89_phy_multi_sta_cfo_calc()
4081 max_cfo_lb = max(cfo->cfo_avg[i] - cfo_tol, max_cfo_lb); in rtw89_phy_multi_sta_cfo_calc()
4082 min_cfo_ub = min(cfo->cfo_avg[i] + cfo_tol, min_cfo_ub); in rtw89_phy_multi_sta_cfo_calc()
4083 cfo_khz_all += cfo->cfo_avg[i]; in rtw89_phy_multi_sta_cfo_calc()
4087 i, cfo->cfo_avg[i]); in rtw89_phy_multi_sta_cfo_calc()
4088 if (sta_cnt >= rtwdev->total_sta_assoc) in rtw89_phy_multi_sta_cfo_calc()
4091 tp_all = stats->rx_throughput; /* need tp for each entry */ in rtw89_phy_multi_sta_cfo_calc()
4106 min_cfo_ub - max_cfo_lb); in rtw89_phy_multi_sta_cfo_calc()
4114 cfo->pre_cfo_avg[i] = cfo->cfo_avg[i]; in rtw89_phy_multi_sta_cfo_calc()
4122 struct rtw89_cfo_tracking_info *cfo = &rtwdev->cfo_tracking; in rtw89_phy_cfo_statistics_reset()
4124 memset(&cfo->cfo_tail, 0, sizeof(cfo->cfo_tail)); in rtw89_phy_cfo_statistics_reset()
4125 memset(&cfo->cfo_cnt, 0, sizeof(cfo->cfo_cnt)); in rtw89_phy_cfo_statistics_reset()
4126 cfo->packet_count = 0; in rtw89_phy_cfo_statistics_reset()
4127 cfo->packet_count_pre = 0; in rtw89_phy_cfo_statistics_reset()
4128 cfo->cfo_avg_pre = 0; in rtw89_phy_cfo_statistics_reset()
4133 struct rtw89_cfo_tracking_info *cfo = &rtwdev->cfo_tracking; in rtw89_phy_cfo_dm()
4136 u8 pre_x_cap = cfo->crystal_cap; in rtw89_phy_cfo_dm()
4137 u8 dcfo_comp_sft = rtwdev->chip->dcfo_comp_sft; in rtw89_phy_cfo_dm()
4139 cfo->dcfo_avg = 0; in rtw89_phy_cfo_dm()
4141 rtwdev->total_sta_assoc); in rtw89_phy_cfo_dm()
4142 if (rtwdev->total_sta_assoc == 0) { in rtw89_phy_cfo_dm()
4146 if (cfo->packet_count == 0) { in rtw89_phy_cfo_dm()
4150 if (cfo->packet_count == cfo->packet_count_pre) { in rtw89_phy_cfo_dm()
4154 if (rtwdev->total_sta_assoc == 1) in rtw89_phy_cfo_dm()
4158 if (cfo->divergence_lock_en) { in rtw89_phy_cfo_dm()
4159 cfo->lock_cnt++; in rtw89_phy_cfo_dm()
4160 if (cfo->lock_cnt > CFO_PERIOD_CNT) { in rtw89_phy_cfo_dm()
4161 cfo->divergence_lock_en = false; in rtw89_phy_cfo_dm()
4162 cfo->lock_cnt = 0; in rtw89_phy_cfo_dm()
4168 if (cfo->crystal_cap >= cfo->x_cap_ub || in rtw89_phy_cfo_dm()
4169 cfo->crystal_cap <= cfo->x_cap_lb) { in rtw89_phy_cfo_dm()
4170 cfo->divergence_lock_en = true; in rtw89_phy_cfo_dm()
4176 cfo->cfo_avg_pre = new_cfo; in rtw89_phy_cfo_dm()
4177 cfo->dcfo_avg_pre = cfo->dcfo_avg; in rtw89_phy_cfo_dm()
4178 x_cap_update = cfo->crystal_cap != pre_x_cap; in rtw89_phy_cfo_dm()
4180 rtw89_debug(rtwdev, RTW89_DBG_CFO, "Xcap: D:%x C:%x->%x, ofst=%d\n", in rtw89_phy_cfo_dm()
4181 cfo->def_x_cap, pre_x_cap, cfo->crystal_cap, in rtw89_phy_cfo_dm()
4182 cfo->x_cap_ofst); in rtw89_phy_cfo_dm()
4184 if (cfo->dcfo_avg > 0) in rtw89_phy_cfo_dm()
4185 cfo->dcfo_avg -= CFO_SW_COMP_FINE_TUNE << dcfo_comp_sft; in rtw89_phy_cfo_dm()
4187 cfo->dcfo_avg += CFO_SW_COMP_FINE_TUNE << dcfo_comp_sft; in rtw89_phy_cfo_dm()
4189 rtw89_dcfo_comp(rtwdev, cfo->dcfo_avg); in rtw89_phy_cfo_dm()
4197 struct rtw89_cfo_tracking_info *cfo = &rtwdev->cfo_tracking; in rtw89_phy_cfo_track_work()
4199 mutex_lock(&rtwdev->mutex); in rtw89_phy_cfo_track_work()
4200 if (!cfo->cfo_trig_by_timer_en) in rtw89_phy_cfo_track_work()
4204 ieee80211_queue_delayed_work(rtwdev->hw, &rtwdev->cfo_track_work, in rtw89_phy_cfo_track_work()
4205 msecs_to_jiffies(cfo->cfo_timer_ms)); in rtw89_phy_cfo_track_work()
4207 mutex_unlock(&rtwdev->mutex); in rtw89_phy_cfo_track_work()
4212 struct rtw89_cfo_tracking_info *cfo = &rtwdev->cfo_tracking; in rtw89_phy_cfo_start_work()
4214 ieee80211_queue_delayed_work(rtwdev->hw, &rtwdev->cfo_track_work, in rtw89_phy_cfo_start_work()
4215 msecs_to_jiffies(cfo->cfo_timer_ms)); in rtw89_phy_cfo_start_work()
4220 struct rtw89_cfo_tracking_info *cfo = &rtwdev->cfo_tracking; in rtw89_phy_cfo_track()
4221 struct rtw89_traffic_stats *stats = &rtwdev->stats; in rtw89_phy_cfo_track()
4224 if (stats->rx_tf_periodic > CFO_TF_CNT_TH) in rtw89_phy_cfo_track()
4226 if (cfo->cfo_ul_ofdma_acc_mode == RTW89_CFO_UL_OFDMA_ACC_ENABLE && in rtw89_phy_cfo_track()
4230 switch (cfo->phy_cfo_status) { in rtw89_phy_cfo_track()
4232 if (stats->tx_throughput >= CFO_TP_UPPER) { in rtw89_phy_cfo_track()
4233 cfo->phy_cfo_status = RTW89_PHY_DCFO_STATE_ENHANCE; in rtw89_phy_cfo_track()
4234 cfo->cfo_trig_by_timer_en = true; in rtw89_phy_cfo_track()
4235 cfo->cfo_timer_ms = CFO_COMP_PERIOD; in rtw89_phy_cfo_track()
4240 if (stats->tx_throughput <= CFO_TP_LOWER) in rtw89_phy_cfo_track()
4241 cfo->phy_cfo_status = RTW89_PHY_DCFO_STATE_NORMAL; in rtw89_phy_cfo_track()
4243 cfo->phy_cfo_trk_cnt >= CFO_PERIOD_CNT) in rtw89_phy_cfo_track()
4244 cfo->phy_cfo_status = RTW89_PHY_DCFO_STATE_HOLD; in rtw89_phy_cfo_track()
4246 cfo->phy_cfo_trk_cnt++; in rtw89_phy_cfo_track()
4248 if (cfo->phy_cfo_status == RTW89_PHY_DCFO_STATE_NORMAL) { in rtw89_phy_cfo_track()
4249 cfo->phy_cfo_trk_cnt = 0; in rtw89_phy_cfo_track()
4250 cfo->cfo_trig_by_timer_en = false; in rtw89_phy_cfo_track()
4254 if (stats->tx_throughput <= CFO_TP_LOWER) { in rtw89_phy_cfo_track()
4255 cfo->phy_cfo_status = RTW89_PHY_DCFO_STATE_NORMAL; in rtw89_phy_cfo_track()
4256 cfo->phy_cfo_trk_cnt = 0; in rtw89_phy_cfo_track()
4257 cfo->cfo_trig_by_timer_en = false; in rtw89_phy_cfo_track()
4259 cfo->phy_cfo_trk_cnt++; in rtw89_phy_cfo_track()
4263 cfo->phy_cfo_status = RTW89_PHY_DCFO_STATE_NORMAL; in rtw89_phy_cfo_track()
4264 cfo->phy_cfo_trk_cnt = 0; in rtw89_phy_cfo_track()
4269 stats->tx_throughput, cfo->phy_cfo_status, in rtw89_phy_cfo_track()
4270 cfo->cfo_trig_by_timer_en, cfo->phy_cfo_trk_cnt, in rtw89_phy_cfo_track()
4271 ewma_thermal_read(&rtwdev->phystat.avg_thermal[0])); in rtw89_phy_cfo_track()
4272 if (cfo->cfo_trig_by_timer_en) in rtw89_phy_cfo_track()
4280 struct rtw89_cfo_tracking_info *cfo = &rtwdev->cfo_tracking; in rtw89_phy_cfo_parse()
4281 u8 macid = phy_ppdu->mac_id; in rtw89_phy_cfo_parse()
4288 cfo->cfo_tail[macid] += cfo_val; in rtw89_phy_cfo_parse()
4289 cfo->cfo_cnt[macid]++; in rtw89_phy_cfo_parse()
4290 cfo->packet_count++; in rtw89_phy_cfo_parse()
4295 const struct rtw89_chip_info *chip = rtwdev->chip; in rtw89_phy_ul_tb_assoc()
4297 rtwvif->chanctx_idx); in rtw89_phy_ul_tb_assoc()
4298 struct rtw89_phy_ul_tb_info *ul_tb_info = &rtwdev->ul_tb_info; in rtw89_phy_ul_tb_assoc()
4300 if (!chip->ul_tb_waveform_ctrl) in rtw89_phy_ul_tb_assoc()
4303 rtwvif->def_tri_idx = in rtw89_phy_ul_tb_assoc()
4306 if (chip->chip_id == RTL8852B && rtwdev->hal.cv > CHIP_CBV) in rtw89_phy_ul_tb_assoc()
4307 rtwvif->dyn_tb_bedge_en = false; in rtw89_phy_ul_tb_assoc()
4308 else if (chan->band_type >= RTW89_BAND_5G && in rtw89_phy_ul_tb_assoc()
4309 chan->band_width >= RTW89_CHANNEL_WIDTH_40) in rtw89_phy_ul_tb_assoc()
4310 rtwvif->dyn_tb_bedge_en = true; in rtw89_phy_ul_tb_assoc()
4312 rtwvif->dyn_tb_bedge_en = false; in rtw89_phy_ul_tb_assoc()
4316 ul_tb_info->def_if_bandedge, rtwvif->def_tri_idx); in rtw89_phy_ul_tb_assoc()
4319 rtwvif->dyn_tb_bedge_en, ul_tb_info->dyn_tb_tri_en); in rtw89_phy_ul_tb_assoc()
4350 if (!rtwdev->chip->ul_tb_pwr_diff) in rtw89_phy_ofdma_power_diff()
4353 if (rtwvif->pwr_diff_en == rtwvif->pre_pwr_diff_en) { in rtw89_phy_ofdma_power_diff()
4354 rtwvif->pwr_diff_en = false; in rtw89_phy_ofdma_power_diff()
4358 rtwvif->pre_pwr_diff_en = rtwvif->pwr_diff_en; in rtw89_phy_ofdma_power_diff()
4359 param = &table[rtwvif->pwr_diff_en]; in rtw89_phy_ofdma_power_diff()
4362 param->q_00); in rtw89_phy_ofdma_power_diff()
4364 param->q_11); in rtw89_phy_ofdma_power_diff()
4366 B_CUSTOMIZE_Q_MATRIX_EN, param->q_matrix_en); in rtw89_phy_ofdma_power_diff()
4368 reg = rtw89_mac_reg_by_idx(rtwdev, R_AX_PWR_UL_TB_1T, rtwvif->mac_idx); in rtw89_phy_ofdma_power_diff()
4370 param->ultb_1t_norm_160); in rtw89_phy_ofdma_power_diff()
4372 reg = rtw89_mac_reg_by_idx(rtwdev, R_AX_PWR_UL_TB_2T, rtwvif->mac_idx); in rtw89_phy_ofdma_power_diff()
4374 param->ultb_2t_norm_160); in rtw89_phy_ofdma_power_diff()
4376 reg = rtw89_mac_reg_by_idx(rtwdev, R_AX_PATH_COM1, rtwvif->mac_idx); in rtw89_phy_ofdma_power_diff()
4378 param->com1_norm_1sts); in rtw89_phy_ofdma_power_diff()
4380 reg = rtw89_mac_reg_by_idx(rtwdev, R_AX_PATH_COM2, rtwvif->mac_idx); in rtw89_phy_ofdma_power_diff()
4382 param->com2_resp_1sts_path); in rtw89_phy_ofdma_power_diff()
4390 struct rtw89_traffic_stats *stats = &rtwdev->stats; in rtw89_phy_ul_tb_ctrl_check()
4393 if (rtwvif->wifi_role != RTW89_WIFI_ROLE_STATION) in rtw89_phy_ul_tb_ctrl_check()
4396 if (!vif->cfg.assoc) in rtw89_phy_ul_tb_ctrl_check()
4399 if (rtwdev->chip->ul_tb_waveform_ctrl) { in rtw89_phy_ul_tb_ctrl_check()
4400 if (stats->rx_tf_periodic > UL_TB_TF_CNT_L2H_TH) in rtw89_phy_ul_tb_ctrl_check()
4401 ul_tb_data->high_tf_client = true; in rtw89_phy_ul_tb_ctrl_check()
4402 else if (stats->rx_tf_periodic < UL_TB_TF_CNT_H2L_TH) in rtw89_phy_ul_tb_ctrl_check()
4403 ul_tb_data->low_tf_client = true; in rtw89_phy_ul_tb_ctrl_check()
4405 ul_tb_data->valid = true; in rtw89_phy_ul_tb_ctrl_check()
4406 ul_tb_data->def_tri_idx = rtwvif->def_tri_idx; in rtw89_phy_ul_tb_ctrl_check()
4407 ul_tb_data->dyn_tb_bedge_en = rtwvif->dyn_tb_bedge_en; in rtw89_phy_ul_tb_ctrl_check()
4416 struct rtw89_phy_ul_tb_info *ul_tb_info = &rtwdev->ul_tb_info; in rtw89_phy_ul_tb_waveform_ctrl()
4418 if (!rtwdev->chip->ul_tb_waveform_ctrl) in rtw89_phy_ul_tb_waveform_ctrl()
4421 if (ul_tb_data->dyn_tb_bedge_en) { in rtw89_phy_ul_tb_waveform_ctrl()
4422 if (ul_tb_data->high_tf_client) { in rtw89_phy_ul_tb_waveform_ctrl()
4426 } else if (ul_tb_data->low_tf_client) { in rtw89_phy_ul_tb_waveform_ctrl()
4428 ul_tb_info->def_if_bandedge); in rtw89_phy_ul_tb_waveform_ctrl()
4431 ul_tb_info->def_if_bandedge); in rtw89_phy_ul_tb_waveform_ctrl()
4435 if (ul_tb_info->dyn_tb_tri_en) { in rtw89_phy_ul_tb_waveform_ctrl()
4436 if (ul_tb_data->high_tf_client) { in rtw89_phy_ul_tb_waveform_ctrl()
4441 } else if (ul_tb_data->low_tf_client) { in rtw89_phy_ul_tb_waveform_ctrl()
4444 ul_tb_data->def_tri_idx); in rtw89_phy_ul_tb_waveform_ctrl()
4447 ul_tb_data->def_tri_idx); in rtw89_phy_ul_tb_waveform_ctrl()
4454 const struct rtw89_chip_info *chip = rtwdev->chip; in rtw89_phy_ul_tb_ctrl_track()
4458 if (!chip->ul_tb_waveform_ctrl && !chip->ul_tb_pwr_diff) in rtw89_phy_ul_tb_ctrl_track()
4461 if (rtwdev->total_sta_assoc != 1) in rtw89_phy_ul_tb_ctrl_track()
4475 const struct rtw89_chip_info *chip = rtwdev->chip; in rtw89_phy_ul_tb_info_init()
4476 struct rtw89_phy_ul_tb_info *ul_tb_info = &rtwdev->ul_tb_info; in rtw89_phy_ul_tb_info_init()
4478 if (!chip->ul_tb_waveform_ctrl) in rtw89_phy_ul_tb_info_init()
4481 ul_tb_info->dyn_tb_tri_en = true; in rtw89_phy_ul_tb_info_init()
4482 ul_tb_info->def_if_bandedge = in rtw89_phy_ul_tb_info_init()
4489 ewma_rssi_init(&antdiv_sts->cck_rssi_avg); in rtw89_phy_antdiv_sts_instance_reset()
4490 ewma_rssi_init(&antdiv_sts->ofdm_rssi_avg); in rtw89_phy_antdiv_sts_instance_reset()
4491 ewma_rssi_init(&antdiv_sts->non_legacy_rssi_avg); in rtw89_phy_antdiv_sts_instance_reset()
4492 antdiv_sts->pkt_cnt_cck = 0; in rtw89_phy_antdiv_sts_instance_reset()
4493 antdiv_sts->pkt_cnt_ofdm = 0; in rtw89_phy_antdiv_sts_instance_reset()
4494 antdiv_sts->pkt_cnt_non_legacy = 0; in rtw89_phy_antdiv_sts_instance_reset()
4495 antdiv_sts->evm = 0; in rtw89_phy_antdiv_sts_instance_reset()
4502 if (rtw89_get_data_rate_mode(rtwdev, phy_ppdu->rate) == DATA_RATE_MODE_NON_HT) { in rtw89_phy_antdiv_sts_instance_add()
4503 if (phy_ppdu->rate < RTW89_HW_RATE_OFDM6) { in rtw89_phy_antdiv_sts_instance_add()
4504 ewma_rssi_add(&stats->cck_rssi_avg, phy_ppdu->rssi_avg); in rtw89_phy_antdiv_sts_instance_add()
4505 stats->pkt_cnt_cck++; in rtw89_phy_antdiv_sts_instance_add()
4507 ewma_rssi_add(&stats->ofdm_rssi_avg, phy_ppdu->rssi_avg); in rtw89_phy_antdiv_sts_instance_add()
4508 stats->pkt_cnt_ofdm++; in rtw89_phy_antdiv_sts_instance_add()
4509 stats->evm += phy_ppdu->ofdm.evm_min; in rtw89_phy_antdiv_sts_instance_add()
4512 ewma_rssi_add(&stats->non_legacy_rssi_avg, phy_ppdu->rssi_avg); in rtw89_phy_antdiv_sts_instance_add()
4513 stats->pkt_cnt_non_legacy++; in rtw89_phy_antdiv_sts_instance_add()
4514 stats->evm += phy_ppdu->ofdm.evm_min; in rtw89_phy_antdiv_sts_instance_add()
4520 if (stats->pkt_cnt_non_legacy >= stats->pkt_cnt_cck && in rtw89_phy_antdiv_sts_instance_get_rssi()
4521 stats->pkt_cnt_non_legacy >= stats->pkt_cnt_ofdm) in rtw89_phy_antdiv_sts_instance_get_rssi()
4522 return ewma_rssi_read(&stats->non_legacy_rssi_avg); in rtw89_phy_antdiv_sts_instance_get_rssi()
4523 else if (stats->pkt_cnt_ofdm >= stats->pkt_cnt_cck && in rtw89_phy_antdiv_sts_instance_get_rssi()
4524 stats->pkt_cnt_ofdm >= stats->pkt_cnt_non_legacy) in rtw89_phy_antdiv_sts_instance_get_rssi()
4525 return ewma_rssi_read(&stats->ofdm_rssi_avg); in rtw89_phy_antdiv_sts_instance_get_rssi()
4527 return ewma_rssi_read(&stats->cck_rssi_avg); in rtw89_phy_antdiv_sts_instance_get_rssi()
4532 return phy_div(stats->evm, stats->pkt_cnt_non_legacy + stats->pkt_cnt_ofdm); in rtw89_phy_antdiv_sts_instance_get_evm()
4538 struct rtw89_antdiv_info *antdiv = &rtwdev->antdiv; in rtw89_phy_antdiv_parse()
4539 struct rtw89_hal *hal = &rtwdev->hal; in rtw89_phy_antdiv_parse()
4541 if (!hal->ant_diversity || hal->ant_diversity_fixed) in rtw89_phy_antdiv_parse()
4544 rtw89_phy_antdiv_sts_instance_add(rtwdev, phy_ppdu, &antdiv->target_stats); in rtw89_phy_antdiv_parse()
4546 if (!antdiv->get_stats) in rtw89_phy_antdiv_parse()
4549 if (hal->antenna_rx == RF_A) in rtw89_phy_antdiv_parse()
4550 rtw89_phy_antdiv_sts_instance_add(rtwdev, phy_ppdu, &antdiv->main_stats); in rtw89_phy_antdiv_parse()
4551 else if (hal->antenna_rx == RF_B) in rtw89_phy_antdiv_parse()
4552 rtw89_phy_antdiv_sts_instance_add(rtwdev, phy_ppdu, &antdiv->aux_stats); in rtw89_phy_antdiv_parse()
4585 struct rtw89_antdiv_info *antdiv = &rtwdev->antdiv; in rtw89_phy_antdiv_sts_reset()
4587 rtw89_phy_antdiv_sts_instance_reset(&antdiv->target_stats); in rtw89_phy_antdiv_sts_reset()
4588 rtw89_phy_antdiv_sts_instance_reset(&antdiv->main_stats); in rtw89_phy_antdiv_sts_reset()
4589 rtw89_phy_antdiv_sts_instance_reset(&antdiv->aux_stats); in rtw89_phy_antdiv_sts_reset()
4594 struct rtw89_antdiv_info *antdiv = &rtwdev->antdiv; in rtw89_phy_antdiv_init()
4595 struct rtw89_hal *hal = &rtwdev->hal; in rtw89_phy_antdiv_init()
4597 if (!hal->ant_diversity) in rtw89_phy_antdiv_init()
4600 antdiv->get_stats = false; in rtw89_phy_antdiv_init()
4601 antdiv->rssi_pre = 0; in rtw89_phy_antdiv_init()
4608 struct rtw89_phy_stat *phystat = &rtwdev->phystat; in rtw89_phy_stat_thermal_update()
4612 for (i = 0; i < rtwdev->chip->rf_path_num; i++) { in rtw89_phy_stat_thermal_update()
4615 ewma_thermal_add(&phystat->avg_thermal[i], th); in rtw89_phy_stat_thermal_update()
4619 ewma_thermal_read(&phystat->avg_thermal[i])); in rtw89_phy_stat_thermal_update()
4632 struct rtw89_sta *rtwsta = (struct rtw89_sta *)sta->drv_priv; in rtw89_phy_stat_rssi_update_iter()
4635 struct rtw89_phy_ch_info *ch_info = rssi_data->ch_info; in rtw89_phy_stat_rssi_update_iter()
4638 rssi_curr = ewma_rssi_read(&rtwsta->avg_rssi); in rtw89_phy_stat_rssi_update_iter()
4640 if (rssi_curr < ch_info->rssi_min) { in rtw89_phy_stat_rssi_update_iter()
4641 ch_info->rssi_min = rssi_curr; in rtw89_phy_stat_rssi_update_iter()
4642 ch_info->rssi_min_macid = rtwsta->mac_id; in rtw89_phy_stat_rssi_update_iter()
4645 if (rtwsta->prev_rssi == 0) { in rtw89_phy_stat_rssi_update_iter()
4646 rtwsta->prev_rssi = rssi_curr; in rtw89_phy_stat_rssi_update_iter()
4647 } else if (abs((int)rtwsta->prev_rssi - (int)rssi_curr) > (3 << RSSI_FACTOR)) { in rtw89_phy_stat_rssi_update_iter()
4648 rtwsta->prev_rssi = rssi_curr; in rtw89_phy_stat_rssi_update_iter()
4649 rssi_data->rssi_changed = true; in rtw89_phy_stat_rssi_update_iter()
4658 rssi_data.ch_info = &rtwdev->ch_info; in rtw89_phy_stat_rssi_update()
4659 rssi_data.ch_info->rssi_min = U8_MAX; in rtw89_phy_stat_rssi_update()
4660 ieee80211_iterate_stations_atomic(rtwdev->hw, in rtw89_phy_stat_rssi_update()
4669 struct rtw89_phy_stat *phystat = &rtwdev->phystat; in rtw89_phy_stat_init()
4672 for (i = 0; i < rtwdev->chip->rf_path_num; i++) in rtw89_phy_stat_init()
4673 ewma_thermal_init(&phystat->avg_thermal[i]); in rtw89_phy_stat_init()
4677 memset(&phystat->cur_pkt_stat, 0, sizeof(phystat->cur_pkt_stat)); in rtw89_phy_stat_init()
4678 memset(&phystat->last_pkt_stat, 0, sizeof(phystat->last_pkt_stat)); in rtw89_phy_stat_init()
4683 struct rtw89_phy_stat *phystat = &rtwdev->phystat; in rtw89_phy_stat_track()
4688 phystat->last_pkt_stat = phystat->cur_pkt_stat; in rtw89_phy_stat_track()
4689 memset(&phystat->cur_pkt_stat, 0, sizeof(phystat->cur_pkt_stat)); in rtw89_phy_stat_track()
4694 struct rtw89_env_monitor_info *env = &rtwdev->env_monitor; in rtw89_phy_ccx_us_to_idx()
4696 return time_us >> (ilog2(CCX_US_BASE_RATIO) + env->ccx_unit_idx); in rtw89_phy_ccx_us_to_idx()
4701 struct rtw89_env_monitor_info *env = &rtwdev->env_monitor; in rtw89_phy_ccx_idx_to_us()
4703 return idx << (ilog2(CCX_US_BASE_RATIO) + env->ccx_unit_idx); in rtw89_phy_ccx_idx_to_us()
4708 const struct rtw89_phy_gen_def *phy = rtwdev->chip->phy_def; in rtw89_phy_ccx_top_setting_init()
4709 struct rtw89_env_monitor_info *env = &rtwdev->env_monitor; in rtw89_phy_ccx_top_setting_init()
4710 const struct rtw89_ccx_regs *ccx = phy->ccx; in rtw89_phy_ccx_top_setting_init()
4712 env->ccx_manual_ctrl = false; in rtw89_phy_ccx_top_setting_init()
4713 env->ccx_ongoing = false; in rtw89_phy_ccx_top_setting_init()
4714 env->ccx_rac_lv = RTW89_RAC_RELEASE; in rtw89_phy_ccx_top_setting_init()
4715 env->ccx_period = 0; in rtw89_phy_ccx_top_setting_init()
4716 env->ccx_unit_idx = RTW89_CCX_32_US; in rtw89_phy_ccx_top_setting_init()
4718 rtw89_phy_set_phy_regs(rtwdev, ccx->setting_addr, ccx->en_mask, 1); in rtw89_phy_ccx_top_setting_init()
4719 rtw89_phy_set_phy_regs(rtwdev, ccx->setting_addr, ccx->trig_opt_mask, 1); in rtw89_phy_ccx_top_setting_init()
4720 rtw89_phy_set_phy_regs(rtwdev, ccx->setting_addr, ccx->measurement_trig_mask, 1); in rtw89_phy_ccx_top_setting_init()
4721 rtw89_phy_set_phy_regs(rtwdev, ccx->setting_addr, ccx->edcca_opt_mask, in rtw89_phy_ccx_top_setting_init()
4728 struct rtw89_env_monitor_info *env = &rtwdev->env_monitor; in rtw89_phy_ccx_get_report()
4732 numer = report * score + (env->ccx_period >> 1); in rtw89_phy_ccx_get_report()
4733 if (env->ccx_period) in rtw89_phy_ccx_get_report()
4734 ret = numer / env->ccx_period; in rtw89_phy_ccx_get_report()
4736 return ret >= score ? score - 1 : ret; in rtw89_phy_ccx_get_report()
4764 "[Trigger Time] period:%d, unit_idx:%d\n", in rtw89_phy_ccx_ms_to_period_unit()
4770 struct rtw89_env_monitor_info *env = &rtwdev->env_monitor; in rtw89_phy_ccx_racing_release()
4773 "lv:(%d)->(0)\n", env->ccx_rac_lv); in rtw89_phy_ccx_racing_release()
4775 env->ccx_ongoing = false; in rtw89_phy_ccx_racing_release()
4776 env->ccx_rac_lv = RTW89_RAC_RELEASE; in rtw89_phy_ccx_racing_release()
4777 env->ifs_clm_app = RTW89_IFS_CLM_BACKGROUND; in rtw89_phy_ccx_racing_release()
4783 struct rtw89_env_monitor_info *env = &rtwdev->env_monitor; in rtw89_phy_ifs_clm_th_update_check()
4784 bool is_update = env->ifs_clm_app != para->ifs_clm_app; in rtw89_phy_ifs_clm_th_update_check()
4786 u16 *ifs_th_l = env->ifs_clm_th_l; in rtw89_phy_ifs_clm_th_update_check()
4787 u16 *ifs_th_h = env->ifs_clm_th_h; in rtw89_phy_ifs_clm_th_update_check()
4794 switch (para->ifs_clm_app) { in rtw89_phy_ifs_clm_th_update_check()
4805 ifs_th0_us = para->ifs_clm_manual_th0; in rtw89_phy_ifs_clm_th_update_check()
4806 ifs_th_times = para->ifs_clm_manual_th_times; in rtw89_phy_ifs_clm_th_update_check()
4813 * low[i] = high[i-1] + 1 in rtw89_phy_ifs_clm_th_update_check()
4814 * high[i] = high[i-1] * ifs_th_times in rtw89_phy_ifs_clm_th_update_check()
4821 ifs_th_l[i] = ifs_th_h[i - 1] + 1; in rtw89_phy_ifs_clm_th_update_check()
4822 ifs_th_h_us[i] = ifs_th_h_us[i - 1] * ifs_th_times; in rtw89_phy_ifs_clm_th_update_check()
4836 const struct rtw89_phy_gen_def *phy = rtwdev->chip->phy_def; in rtw89_phy_ifs_clm_set_th_reg()
4837 struct rtw89_env_monitor_info *env = &rtwdev->env_monitor; in rtw89_phy_ifs_clm_set_th_reg()
4838 const struct rtw89_ccx_regs *ccx = phy->ccx; in rtw89_phy_ifs_clm_set_th_reg()
4841 rtw89_phy_set_phy_regs(rtwdev, ccx->ifs_t1_addr, ccx->ifs_t1_th_l_mask, in rtw89_phy_ifs_clm_set_th_reg()
4842 env->ifs_clm_th_l[0]); in rtw89_phy_ifs_clm_set_th_reg()
4843 rtw89_phy_set_phy_regs(rtwdev, ccx->ifs_t2_addr, ccx->ifs_t2_th_l_mask, in rtw89_phy_ifs_clm_set_th_reg()
4844 env->ifs_clm_th_l[1]); in rtw89_phy_ifs_clm_set_th_reg()
4845 rtw89_phy_set_phy_regs(rtwdev, ccx->ifs_t3_addr, ccx->ifs_t3_th_l_mask, in rtw89_phy_ifs_clm_set_th_reg()
4846 env->ifs_clm_th_l[2]); in rtw89_phy_ifs_clm_set_th_reg()
4847 rtw89_phy_set_phy_regs(rtwdev, ccx->ifs_t4_addr, ccx->ifs_t4_th_l_mask, in rtw89_phy_ifs_clm_set_th_reg()
4848 env->ifs_clm_th_l[3]); in rtw89_phy_ifs_clm_set_th_reg()
4850 rtw89_phy_set_phy_regs(rtwdev, ccx->ifs_t1_addr, ccx->ifs_t1_th_h_mask, in rtw89_phy_ifs_clm_set_th_reg()
4851 env->ifs_clm_th_h[0]); in rtw89_phy_ifs_clm_set_th_reg()
4852 rtw89_phy_set_phy_regs(rtwdev, ccx->ifs_t2_addr, ccx->ifs_t2_th_h_mask, in rtw89_phy_ifs_clm_set_th_reg()
4853 env->ifs_clm_th_h[1]); in rtw89_phy_ifs_clm_set_th_reg()
4854 rtw89_phy_set_phy_regs(rtwdev, ccx->ifs_t3_addr, ccx->ifs_t3_th_h_mask, in rtw89_phy_ifs_clm_set_th_reg()
4855 env->ifs_clm_th_h[2]); in rtw89_phy_ifs_clm_set_th_reg()
4856 rtw89_phy_set_phy_regs(rtwdev, ccx->ifs_t4_addr, ccx->ifs_t4_th_h_mask, in rtw89_phy_ifs_clm_set_th_reg()
4857 env->ifs_clm_th_h[3]); in rtw89_phy_ifs_clm_set_th_reg()
4862 i + 1, env->ifs_clm_th_l[i], env->ifs_clm_th_h[i]); in rtw89_phy_ifs_clm_set_th_reg()
4867 const struct rtw89_phy_gen_def *phy = rtwdev->chip->phy_def; in rtw89_phy_ifs_clm_setting_init()
4868 struct rtw89_env_monitor_info *env = &rtwdev->env_monitor; in rtw89_phy_ifs_clm_setting_init()
4869 const struct rtw89_ccx_regs *ccx = phy->ccx; in rtw89_phy_ifs_clm_setting_init()
4872 env->ifs_clm_app = RTW89_IFS_CLM_BACKGROUND; in rtw89_phy_ifs_clm_setting_init()
4873 env->ifs_clm_mntr_time = 0; in rtw89_phy_ifs_clm_setting_init()
4879 rtw89_phy_set_phy_regs(rtwdev, ccx->ifs_cnt_addr, ccx->ifs_collect_en_mask, true); in rtw89_phy_ifs_clm_setting_init()
4880 rtw89_phy_set_phy_regs(rtwdev, ccx->ifs_t1_addr, ccx->ifs_t1_en_mask, true); in rtw89_phy_ifs_clm_setting_init()
4881 rtw89_phy_set_phy_regs(rtwdev, ccx->ifs_t2_addr, ccx->ifs_t2_en_mask, true); in rtw89_phy_ifs_clm_setting_init()
4882 rtw89_phy_set_phy_regs(rtwdev, ccx->ifs_t3_addr, ccx->ifs_t3_en_mask, true); in rtw89_phy_ifs_clm_setting_init()
4883 rtw89_phy_set_phy_regs(rtwdev, ccx->ifs_t4_addr, ccx->ifs_t4_en_mask, true); in rtw89_phy_ifs_clm_setting_init()
4889 struct rtw89_env_monitor_info *env = &rtwdev->env_monitor; in rtw89_phy_ccx_racing_ctrl()
4895 return -EINVAL; in rtw89_phy_ccx_racing_ctrl()
4899 "ccx_ongoing=%d, level:(%d)->(%d)\n", env->ccx_ongoing, in rtw89_phy_ccx_racing_ctrl()
4900 env->ccx_rac_lv, level); in rtw89_phy_ccx_racing_ctrl()
4902 if (env->ccx_ongoing) { in rtw89_phy_ccx_racing_ctrl()
4903 if (level <= env->ccx_rac_lv) in rtw89_phy_ccx_racing_ctrl()
4904 ret = -EINVAL; in rtw89_phy_ccx_racing_ctrl()
4906 env->ccx_ongoing = false; in rtw89_phy_ccx_racing_ctrl()
4910 env->ccx_rac_lv = level; in rtw89_phy_ccx_racing_ctrl()
4920 const struct rtw89_phy_gen_def *phy = rtwdev->chip->phy_def; in rtw89_phy_ccx_trigger()
4921 struct rtw89_env_monitor_info *env = &rtwdev->env_monitor; in rtw89_phy_ccx_trigger()
4922 const struct rtw89_ccx_regs *ccx = phy->ccx; in rtw89_phy_ccx_trigger()
4924 rtw89_phy_set_phy_regs(rtwdev, ccx->ifs_cnt_addr, ccx->ifs_clm_cnt_clear_mask, 0); in rtw89_phy_ccx_trigger()
4925 rtw89_phy_set_phy_regs(rtwdev, ccx->setting_addr, ccx->measurement_trig_mask, 0); in rtw89_phy_ccx_trigger()
4926 rtw89_phy_set_phy_regs(rtwdev, ccx->ifs_cnt_addr, ccx->ifs_clm_cnt_clear_mask, 1); in rtw89_phy_ccx_trigger()
4927 rtw89_phy_set_phy_regs(rtwdev, ccx->setting_addr, ccx->measurement_trig_mask, 1); in rtw89_phy_ccx_trigger()
4929 env->ccx_ongoing = true; in rtw89_phy_ccx_trigger()
4934 struct rtw89_env_monitor_info *env = &rtwdev->env_monitor; in rtw89_phy_ifs_clm_get_utility()
4938 env->ifs_clm_tx_ratio = in rtw89_phy_ifs_clm_get_utility()
4939 rtw89_phy_ccx_get_report(rtwdev, env->ifs_clm_tx, PERCENT); in rtw89_phy_ifs_clm_get_utility()
4940 env->ifs_clm_edcca_excl_cca_ratio = in rtw89_phy_ifs_clm_get_utility()
4941 rtw89_phy_ccx_get_report(rtwdev, env->ifs_clm_edcca_excl_cca, in rtw89_phy_ifs_clm_get_utility()
4943 env->ifs_clm_cck_fa_ratio = in rtw89_phy_ifs_clm_get_utility()
4944 rtw89_phy_ccx_get_report(rtwdev, env->ifs_clm_cckfa, PERCENT); in rtw89_phy_ifs_clm_get_utility()
4945 env->ifs_clm_ofdm_fa_ratio = in rtw89_phy_ifs_clm_get_utility()
4946 rtw89_phy_ccx_get_report(rtwdev, env->ifs_clm_ofdmfa, PERCENT); in rtw89_phy_ifs_clm_get_utility()
4947 env->ifs_clm_cck_cca_excl_fa_ratio = in rtw89_phy_ifs_clm_get_utility()
4948 rtw89_phy_ccx_get_report(rtwdev, env->ifs_clm_cckcca_excl_fa, in rtw89_phy_ifs_clm_get_utility()
4950 env->ifs_clm_ofdm_cca_excl_fa_ratio = in rtw89_phy_ifs_clm_get_utility()
4951 rtw89_phy_ccx_get_report(rtwdev, env->ifs_clm_ofdmcca_excl_fa, in rtw89_phy_ifs_clm_get_utility()
4953 env->ifs_clm_cck_fa_permil = in rtw89_phy_ifs_clm_get_utility()
4954 rtw89_phy_ccx_get_report(rtwdev, env->ifs_clm_cckfa, PERMIL); in rtw89_phy_ifs_clm_get_utility()
4955 env->ifs_clm_ofdm_fa_permil = in rtw89_phy_ifs_clm_get_utility()
4956 rtw89_phy_ccx_get_report(rtwdev, env->ifs_clm_ofdmfa, PERMIL); in rtw89_phy_ifs_clm_get_utility()
4959 if (env->ifs_clm_his[i] > ENV_MNTR_IFSCLM_HIS_MAX) { in rtw89_phy_ifs_clm_get_utility()
4960 env->ifs_clm_ifs_avg[i] = ENV_MNTR_FAIL_DWORD; in rtw89_phy_ifs_clm_get_utility()
4962 env->ifs_clm_ifs_avg[i] = in rtw89_phy_ifs_clm_get_utility()
4964 env->ifs_clm_avg[i]); in rtw89_phy_ifs_clm_get_utility()
4967 res = rtw89_phy_ccx_idx_to_us(rtwdev, env->ifs_clm_cca[i]); in rtw89_phy_ifs_clm_get_utility()
4968 res += env->ifs_clm_his[i] >> 1; in rtw89_phy_ifs_clm_get_utility()
4969 if (env->ifs_clm_his[i]) in rtw89_phy_ifs_clm_get_utility()
4970 res /= env->ifs_clm_his[i]; in rtw89_phy_ifs_clm_get_utility()
4973 env->ifs_clm_cca_avg[i] = res; in rtw89_phy_ifs_clm_get_utility()
4977 "IFS-CLM ratio {Tx, EDCCA_exclu_cca} = {%d, %d}\n", in rtw89_phy_ifs_clm_get_utility()
4978 env->ifs_clm_tx_ratio, env->ifs_clm_edcca_excl_cca_ratio); in rtw89_phy_ifs_clm_get_utility()
4980 "IFS-CLM FA ratio {CCK, OFDM} = {%d, %d}\n", in rtw89_phy_ifs_clm_get_utility()
4981 env->ifs_clm_cck_fa_ratio, env->ifs_clm_ofdm_fa_ratio); in rtw89_phy_ifs_clm_get_utility()
4983 "IFS-CLM FA permil {CCK, OFDM} = {%d, %d}\n", in rtw89_phy_ifs_clm_get_utility()
4984 env->ifs_clm_cck_fa_permil, env->ifs_clm_ofdm_fa_permil); in rtw89_phy_ifs_clm_get_utility()
4986 "IFS-CLM CCA_exclu_FA ratio {CCK, OFDM} = {%d, %d}\n", in rtw89_phy_ifs_clm_get_utility()
4987 env->ifs_clm_cck_cca_excl_fa_ratio, in rtw89_phy_ifs_clm_get_utility()
4988 env->ifs_clm_ofdm_cca_excl_fa_ratio); in rtw89_phy_ifs_clm_get_utility()
4990 "Time:[his, ifs_avg(us), cca_avg(us)]\n"); in rtw89_phy_ifs_clm_get_utility()
4993 i + 1, env->ifs_clm_his[i], env->ifs_clm_ifs_avg[i], in rtw89_phy_ifs_clm_get_utility()
4994 env->ifs_clm_cca_avg[i]); in rtw89_phy_ifs_clm_get_utility()
4999 const struct rtw89_phy_gen_def *phy = rtwdev->chip->phy_def; in rtw89_phy_ifs_clm_get_result()
5000 struct rtw89_env_monitor_info *env = &rtwdev->env_monitor; in rtw89_phy_ifs_clm_get_result()
5001 const struct rtw89_ccx_regs *ccx = phy->ccx; in rtw89_phy_ifs_clm_get_result()
5004 if (rtw89_phy_read32_mask(rtwdev, ccx->ifs_total_addr, in rtw89_phy_ifs_clm_get_result()
5005 ccx->ifs_cnt_done_mask) == 0) { in rtw89_phy_ifs_clm_get_result()
5011 env->ifs_clm_tx = in rtw89_phy_ifs_clm_get_result()
5012 rtw89_phy_read32_mask(rtwdev, ccx->ifs_clm_tx_cnt_addr, in rtw89_phy_ifs_clm_get_result()
5013 ccx->ifs_clm_tx_cnt_msk); in rtw89_phy_ifs_clm_get_result()
5014 env->ifs_clm_edcca_excl_cca = in rtw89_phy_ifs_clm_get_result()
5015 rtw89_phy_read32_mask(rtwdev, ccx->ifs_clm_tx_cnt_addr, in rtw89_phy_ifs_clm_get_result()
5016 ccx->ifs_clm_edcca_excl_cca_fa_mask); in rtw89_phy_ifs_clm_get_result()
5017 env->ifs_clm_cckcca_excl_fa = in rtw89_phy_ifs_clm_get_result()
5018 rtw89_phy_read32_mask(rtwdev, ccx->ifs_clm_cca_addr, in rtw89_phy_ifs_clm_get_result()
5019 ccx->ifs_clm_cckcca_excl_fa_mask); in rtw89_phy_ifs_clm_get_result()
5020 env->ifs_clm_ofdmcca_excl_fa = in rtw89_phy_ifs_clm_get_result()
5021 rtw89_phy_read32_mask(rtwdev, ccx->ifs_clm_cca_addr, in rtw89_phy_ifs_clm_get_result()
5022 ccx->ifs_clm_ofdmcca_excl_fa_mask); in rtw89_phy_ifs_clm_get_result()
5023 env->ifs_clm_cckfa = in rtw89_phy_ifs_clm_get_result()
5024 rtw89_phy_read32_mask(rtwdev, ccx->ifs_clm_fa_addr, in rtw89_phy_ifs_clm_get_result()
5025 ccx->ifs_clm_cck_fa_mask); in rtw89_phy_ifs_clm_get_result()
5026 env->ifs_clm_ofdmfa = in rtw89_phy_ifs_clm_get_result()
5027 rtw89_phy_read32_mask(rtwdev, ccx->ifs_clm_fa_addr, in rtw89_phy_ifs_clm_get_result()
5028 ccx->ifs_clm_ofdm_fa_mask); in rtw89_phy_ifs_clm_get_result()
5030 env->ifs_clm_his[0] = in rtw89_phy_ifs_clm_get_result()
5031 rtw89_phy_read32_mask(rtwdev, ccx->ifs_his_addr, in rtw89_phy_ifs_clm_get_result()
5032 ccx->ifs_t1_his_mask); in rtw89_phy_ifs_clm_get_result()
5033 env->ifs_clm_his[1] = in rtw89_phy_ifs_clm_get_result()
5034 rtw89_phy_read32_mask(rtwdev, ccx->ifs_his_addr, in rtw89_phy_ifs_clm_get_result()
5035 ccx->ifs_t2_his_mask); in rtw89_phy_ifs_clm_get_result()
5036 env->ifs_clm_his[2] = in rtw89_phy_ifs_clm_get_result()
5037 rtw89_phy_read32_mask(rtwdev, ccx->ifs_his_addr, in rtw89_phy_ifs_clm_get_result()
5038 ccx->ifs_t3_his_mask); in rtw89_phy_ifs_clm_get_result()
5039 env->ifs_clm_his[3] = in rtw89_phy_ifs_clm_get_result()
5040 rtw89_phy_read32_mask(rtwdev, ccx->ifs_his_addr, in rtw89_phy_ifs_clm_get_result()
5041 ccx->ifs_t4_his_mask); in rtw89_phy_ifs_clm_get_result()
5043 env->ifs_clm_avg[0] = in rtw89_phy_ifs_clm_get_result()
5044 rtw89_phy_read32_mask(rtwdev, ccx->ifs_avg_l_addr, in rtw89_phy_ifs_clm_get_result()
5045 ccx->ifs_t1_avg_mask); in rtw89_phy_ifs_clm_get_result()
5046 env->ifs_clm_avg[1] = in rtw89_phy_ifs_clm_get_result()
5047 rtw89_phy_read32_mask(rtwdev, ccx->ifs_avg_l_addr, in rtw89_phy_ifs_clm_get_result()
5048 ccx->ifs_t2_avg_mask); in rtw89_phy_ifs_clm_get_result()
5049 env->ifs_clm_avg[2] = in rtw89_phy_ifs_clm_get_result()
5050 rtw89_phy_read32_mask(rtwdev, ccx->ifs_avg_h_addr, in rtw89_phy_ifs_clm_get_result()
5051 ccx->ifs_t3_avg_mask); in rtw89_phy_ifs_clm_get_result()
5052 env->ifs_clm_avg[3] = in rtw89_phy_ifs_clm_get_result()
5053 rtw89_phy_read32_mask(rtwdev, ccx->ifs_avg_h_addr, in rtw89_phy_ifs_clm_get_result()
5054 ccx->ifs_t4_avg_mask); in rtw89_phy_ifs_clm_get_result()
5056 env->ifs_clm_cca[0] = in rtw89_phy_ifs_clm_get_result()
5057 rtw89_phy_read32_mask(rtwdev, ccx->ifs_cca_l_addr, in rtw89_phy_ifs_clm_get_result()
5058 ccx->ifs_t1_cca_mask); in rtw89_phy_ifs_clm_get_result()
5059 env->ifs_clm_cca[1] = in rtw89_phy_ifs_clm_get_result()
5060 rtw89_phy_read32_mask(rtwdev, ccx->ifs_cca_l_addr, in rtw89_phy_ifs_clm_get_result()
5061 ccx->ifs_t2_cca_mask); in rtw89_phy_ifs_clm_get_result()
5062 env->ifs_clm_cca[2] = in rtw89_phy_ifs_clm_get_result()
5063 rtw89_phy_read32_mask(rtwdev, ccx->ifs_cca_h_addr, in rtw89_phy_ifs_clm_get_result()
5064 ccx->ifs_t3_cca_mask); in rtw89_phy_ifs_clm_get_result()
5065 env->ifs_clm_cca[3] = in rtw89_phy_ifs_clm_get_result()
5066 rtw89_phy_read32_mask(rtwdev, ccx->ifs_cca_h_addr, in rtw89_phy_ifs_clm_get_result()
5067 ccx->ifs_t4_cca_mask); in rtw89_phy_ifs_clm_get_result()
5069 env->ifs_clm_total_ifs = in rtw89_phy_ifs_clm_get_result()
5070 rtw89_phy_read32_mask(rtwdev, ccx->ifs_total_addr, in rtw89_phy_ifs_clm_get_result()
5071 ccx->ifs_total_mask); in rtw89_phy_ifs_clm_get_result()
5073 rtw89_debug(rtwdev, RTW89_DBG_PHY_TRACK, "IFS-CLM total_ifs = %d\n", in rtw89_phy_ifs_clm_get_result()
5074 env->ifs_clm_total_ifs); in rtw89_phy_ifs_clm_get_result()
5077 env->ifs_clm_tx, env->ifs_clm_edcca_excl_cca); in rtw89_phy_ifs_clm_get_result()
5079 "IFS-CLM FA{CCK, OFDM} = {%d, %d}\n", in rtw89_phy_ifs_clm_get_result()
5080 env->ifs_clm_cckfa, env->ifs_clm_ofdmfa); in rtw89_phy_ifs_clm_get_result()
5082 "IFS-CLM CCA_exclu_FA{CCK, OFDM} = {%d, %d}\n", in rtw89_phy_ifs_clm_get_result()
5083 env->ifs_clm_cckcca_excl_fa, env->ifs_clm_ofdmcca_excl_fa); in rtw89_phy_ifs_clm_get_result()
5085 rtw89_debug(rtwdev, RTW89_DBG_PHY_TRACK, "Time:[his, avg, cca]\n"); in rtw89_phy_ifs_clm_get_result()
5088 "T%d:[%d, %d, %d]\n", i + 1, env->ifs_clm_his[i], in rtw89_phy_ifs_clm_get_result()
5089 env->ifs_clm_avg[i], env->ifs_clm_cca[i]); in rtw89_phy_ifs_clm_get_result()
5099 const struct rtw89_phy_gen_def *phy = rtwdev->chip->phy_def; in rtw89_phy_ifs_clm_set()
5100 struct rtw89_env_monitor_info *env = &rtwdev->env_monitor; in rtw89_phy_ifs_clm_set()
5101 const struct rtw89_ccx_regs *ccx = phy->ccx; in rtw89_phy_ifs_clm_set()
5105 if (para->mntr_time == 0) { in rtw89_phy_ifs_clm_set()
5108 return -EINVAL; in rtw89_phy_ifs_clm_set()
5111 if (rtw89_phy_ccx_racing_ctrl(rtwdev, para->rac_lv)) in rtw89_phy_ifs_clm_set()
5112 return -EINVAL; in rtw89_phy_ifs_clm_set()
5114 if (para->mntr_time != env->ifs_clm_mntr_time) { in rtw89_phy_ifs_clm_set()
5115 rtw89_phy_ccx_ms_to_period_unit(rtwdev, para->mntr_time, in rtw89_phy_ifs_clm_set()
5117 rtw89_phy_set_phy_regs(rtwdev, ccx->ifs_cnt_addr, in rtw89_phy_ifs_clm_set()
5118 ccx->ifs_clm_period_mask, period); in rtw89_phy_ifs_clm_set()
5119 rtw89_phy_set_phy_regs(rtwdev, ccx->ifs_cnt_addr, in rtw89_phy_ifs_clm_set()
5120 ccx->ifs_clm_cnt_unit_mask, in rtw89_phy_ifs_clm_set()
5124 "Update IFS-CLM time ((%d)) -> ((%d))\n", in rtw89_phy_ifs_clm_set()
5125 env->ifs_clm_mntr_time, para->mntr_time); in rtw89_phy_ifs_clm_set()
5127 env->ifs_clm_mntr_time = para->mntr_time; in rtw89_phy_ifs_clm_set()
5128 env->ccx_period = (u16)period; in rtw89_phy_ifs_clm_set()
5129 env->ccx_unit_idx = (u8)unit_idx; in rtw89_phy_ifs_clm_set()
5133 env->ifs_clm_app = para->ifs_clm_app; in rtw89_phy_ifs_clm_set()
5142 struct rtw89_env_monitor_info *env = &rtwdev->env_monitor; in rtw89_phy_env_monitor_track()
5146 env->ccx_watchdog_result = RTW89_PHY_ENV_MON_CCX_FAIL; in rtw89_phy_env_monitor_track()
5147 if (env->ccx_manual_ctrl) { in rtw89_phy_env_monitor_track()
5155 env->ccx_watchdog_result |= RTW89_PHY_ENV_MON_IFS_CLM; in rtw89_phy_env_monitor_track()
5169 env->ccx_watchdog_result, chk_result); in rtw89_phy_env_monitor_track()
5178 *ie_page -= 1; in rtw89_physts_ie_page_valid()
5207 const struct rtw89_chip_info *chip = rtwdev->chip; in rtw89_physts_set_ie_bitmap()
5213 if (chip->chip_id == RTL8852A) in rtw89_physts_set_ie_bitmap()
5239 const struct rtw89_phy_gen_def *phy = rtwdev->chip->phy_def; in rtw89_physts_enable_fail_report()
5240 const struct rtw89_physts_regs *physts = phy->physts; in rtw89_physts_enable_fail_report()
5243 rtw89_phy_write32_clr(rtwdev, physts->setting_addr, in rtw89_physts_enable_fail_report()
5244 physts->dis_trigger_fail_mask); in rtw89_physts_enable_fail_report()
5245 rtw89_phy_write32_clr(rtwdev, physts->setting_addr, in rtw89_physts_enable_fail_report()
5246 physts->dis_trigger_brk_mask); in rtw89_physts_enable_fail_report()
5248 rtw89_phy_write32_set(rtwdev, physts->setting_addr, in rtw89_physts_enable_fail_report()
5249 physts->dis_trigger_fail_mask); in rtw89_physts_enable_fail_report()
5250 rtw89_phy_write32_set(rtwdev, physts->setting_addr, in rtw89_physts_enable_fail_report()
5251 physts->dis_trigger_brk_mask); in rtw89_physts_enable_fail_report()
5285 const struct rtw89_chip_info *chip = rtwdev->chip; in rtw89_phy_dig_read_gain_table()
5286 struct rtw89_dig_info *dig = &rtwdev->dig; in rtw89_phy_dig_read_gain_table()
5296 gain_arr = dig->lna_gain_g; in rtw89_phy_dig_read_gain_table()
5298 cfg = chip->dig_table->cfg_lna_g; in rtw89_phy_dig_read_gain_table()
5302 gain_arr = dig->tia_gain_g; in rtw89_phy_dig_read_gain_table()
5304 cfg = chip->dig_table->cfg_tia_g; in rtw89_phy_dig_read_gain_table()
5308 gain_arr = dig->lna_gain_a; in rtw89_phy_dig_read_gain_table()
5310 cfg = chip->dig_table->cfg_lna_a; in rtw89_phy_dig_read_gain_table()
5314 gain_arr = dig->tia_gain_a; in rtw89_phy_dig_read_gain_table()
5316 cfg = chip->dig_table->cfg_tia_a; in rtw89_phy_dig_read_gain_table()
5323 for (i = 0; i < cfg->size; i++) { in rtw89_phy_dig_read_gain_table()
5324 tmp = rtw89_phy_read32_mask(rtwdev, cfg->table[i].addr, in rtw89_phy_dig_read_gain_table()
5325 cfg->table[i].mask); in rtw89_phy_dig_read_gain_table()
5337 struct rtw89_dig_info *dig = &rtwdev->dig; in rtw89_phy_dig_update_gain_para()
5341 if (!rtwdev->hal.support_igi) in rtw89_phy_dig_update_gain_para()
5346 dig->ib_pkpwr = sign_extend32(tmp >> DIG_GAIN_SHIFT, U8_MAX_BIT); in rtw89_phy_dig_update_gain_para()
5347 dig->ib_pbk = rtw89_phy_read32_mask(rtwdev, R_PATH0_IB_PBK, in rtw89_phy_dig_update_gain_para()
5350 dig->ib_pkpwr, dig->ib_pbk); in rtw89_phy_dig_update_gain_para()
5364 struct rtw89_phy_ch_info *ch_info = &rtwdev->ch_info; in rtw89_phy_dig_update_rssi_info()
5365 struct rtw89_dig_info *dig = &rtwdev->dig; in rtw89_phy_dig_update_rssi_info()
5366 bool is_linked = rtwdev->total_sta_assoc > 0; in rtw89_phy_dig_update_rssi_info()
5369 dig->igi_rssi = ch_info->rssi_min >> 1; in rtw89_phy_dig_update_rssi_info()
5372 dig->igi_rssi = rssi_nolink; in rtw89_phy_dig_update_rssi_info()
5378 struct rtw89_dig_info *dig = &rtwdev->dig; in rtw89_phy_dig_update_para()
5380 bool is_linked = rtwdev->total_sta_assoc > 0; in rtw89_phy_dig_update_para()
5383 switch (chan->band_type) { in rtw89_phy_dig_update_para()
5385 dig->lna_gain = dig->lna_gain_g; in rtw89_phy_dig_update_para()
5386 dig->tia_gain = dig->tia_gain_g; in rtw89_phy_dig_update_para()
5388 dig->force_gaincode_idx_en = false; in rtw89_phy_dig_update_para()
5389 dig->dyn_pd_th_en = true; in rtw89_phy_dig_update_para()
5393 dig->lna_gain = dig->lna_gain_a; in rtw89_phy_dig_update_para()
5394 dig->tia_gain = dig->tia_gain_a; in rtw89_phy_dig_update_para()
5396 dig->force_gaincode_idx_en = true; in rtw89_phy_dig_update_para()
5397 dig->dyn_pd_th_en = true; in rtw89_phy_dig_update_para()
5400 memcpy(dig->fa_th, fa_th_src, sizeof(dig->fa_th)); in rtw89_phy_dig_update_para()
5401 memcpy(dig->igi_rssi_th, igi_rssi_th, sizeof(dig->igi_rssi_th)); in rtw89_phy_dig_update_para()
5410 struct rtw89_dig_info *dig = &rtwdev->dig; in rtw89_phy_dig_para_reset()
5412 dig->cur_gaincode.lna_idx = LNA_IDX_MAX; in rtw89_phy_dig_para_reset()
5413 dig->cur_gaincode.tia_idx = TIA_IDX_MAX; in rtw89_phy_dig_para_reset()
5414 dig->cur_gaincode.rxb_idx = RXB_IDX_MAX; in rtw89_phy_dig_para_reset()
5415 dig->force_gaincode.lna_idx = LNA_IDX_MAX; in rtw89_phy_dig_para_reset()
5416 dig->force_gaincode.tia_idx = TIA_IDX_MAX; in rtw89_phy_dig_para_reset()
5417 dig->force_gaincode.rxb_idx = RXB_IDX_MAX; in rtw89_phy_dig_para_reset()
5419 dig->dyn_igi_max = igi_max_performance_mode; in rtw89_phy_dig_para_reset()
5420 dig->dyn_igi_min = dynamic_igi_min; in rtw89_phy_dig_para_reset()
5421 dig->dyn_pd_th_max = dynamic_pd_threshold_max; in rtw89_phy_dig_para_reset()
5422 dig->pd_low_th_ofst = pd_low_th_offset; in rtw89_phy_dig_para_reset()
5423 dig->is_linked_pre = false; in rtw89_phy_dig_para_reset()
5434 struct rtw89_dig_info *dig = &rtwdev->dig; in rtw89_phy_dig_lna_idx_by_rssi()
5437 if (rssi < dig->igi_rssi_th[0]) in rtw89_phy_dig_lna_idx_by_rssi()
5439 else if (rssi < dig->igi_rssi_th[1]) in rtw89_phy_dig_lna_idx_by_rssi()
5441 else if (rssi < dig->igi_rssi_th[2]) in rtw89_phy_dig_lna_idx_by_rssi()
5443 else if (rssi < dig->igi_rssi_th[3]) in rtw89_phy_dig_lna_idx_by_rssi()
5445 else if (rssi < dig->igi_rssi_th[4]) in rtw89_phy_dig_lna_idx_by_rssi()
5455 struct rtw89_dig_info *dig = &rtwdev->dig; in rtw89_phy_dig_tia_idx_by_rssi()
5458 if (rssi < dig->igi_rssi_th[0]) in rtw89_phy_dig_tia_idx_by_rssi()
5471 struct rtw89_dig_info *dig = &rtwdev->dig; in rtw89_phy_dig_rxb_idx_by_rssi()
5472 s8 lna_gain = dig->lna_gain[set->lna_idx]; in rtw89_phy_dig_rxb_idx_by_rssi()
5473 s8 tia_gain = dig->tia_gain[set->tia_idx]; in rtw89_phy_dig_rxb_idx_by_rssi()
5478 rxb_idx_tmp += dig->ib_pkpwr - dig->ib_pbk - wb_rssi; in rtw89_phy_dig_rxb_idx_by_rssi()
5490 set->lna_idx = rtw89_phy_dig_lna_idx_by_rssi(rtwdev, rssi); in rtw89_phy_dig_gaincode_by_rssi()
5491 set->tia_idx = rtw89_phy_dig_tia_idx_by_rssi(rtwdev, rssi); in rtw89_phy_dig_gaincode_by_rssi()
5492 set->rxb_idx = rtw89_phy_dig_rxb_idx_by_rssi(rtwdev, rssi, set); in rtw89_phy_dig_gaincode_by_rssi()
5496 rssi, set->lna_idx, set->tia_idx, set->rxb_idx); in rtw89_phy_dig_gaincode_by_rssi()
5503 struct rtw89_dig_info *dig = &rtwdev->dig; in rtw89_phy_dig_igi_offset_by_env()
5504 struct rtw89_env_monitor_info *env = &rtwdev->env_monitor; in rtw89_phy_dig_igi_offset_by_env()
5506 u8 igi_offset = dig->fa_rssi_ofst; in rtw89_phy_dig_igi_offset_by_env()
5509 fa_ratio = env->ifs_clm_cck_fa_permil + env->ifs_clm_ofdm_fa_permil; in rtw89_phy_dig_igi_offset_by_env()
5511 if (fa_ratio < dig->fa_th[0]) in rtw89_phy_dig_igi_offset_by_env()
5513 else if (fa_ratio < dig->fa_th[1]) in rtw89_phy_dig_igi_offset_by_env()
5515 else if (fa_ratio < dig->fa_th[2]) in rtw89_phy_dig_igi_offset_by_env()
5517 else if (fa_ratio < dig->fa_th[3]) in rtw89_phy_dig_igi_offset_by_env()
5528 dig->fa_rssi_ofst = igi_offset; in rtw89_phy_dig_igi_offset_by_env()
5531 "fa_th: [+6 (%d) +4 (%d) +2 (%d) 0 (%d) -2 ]\n", in rtw89_phy_dig_igi_offset_by_env()
5532 dig->fa_th[3], dig->fa_th[2], dig->fa_th[1], dig->fa_th[0]); in rtw89_phy_dig_igi_offset_by_env()
5536 env->ifs_clm_cck_fa_permil, env->ifs_clm_ofdm_fa_permil, in rtw89_phy_dig_igi_offset_by_env()
5537 env->ifs_clm_cck_fa_permil + env->ifs_clm_ofdm_fa_permil, in rtw89_phy_dig_igi_offset_by_env()
5543 const struct rtw89_dig_regs *dig_regs = rtwdev->chip->dig_regs; in rtw89_phy_dig_set_lna_idx()
5545 rtw89_phy_write32_mask(rtwdev, dig_regs->p0_lna_init.addr, in rtw89_phy_dig_set_lna_idx()
5546 dig_regs->p0_lna_init.mask, lna_idx); in rtw89_phy_dig_set_lna_idx()
5547 rtw89_phy_write32_mask(rtwdev, dig_regs->p1_lna_init.addr, in rtw89_phy_dig_set_lna_idx()
5548 dig_regs->p1_lna_init.mask, lna_idx); in rtw89_phy_dig_set_lna_idx()
5553 const struct rtw89_dig_regs *dig_regs = rtwdev->chip->dig_regs; in rtw89_phy_dig_set_tia_idx()
5555 rtw89_phy_write32_mask(rtwdev, dig_regs->p0_tia_init.addr, in rtw89_phy_dig_set_tia_idx()
5556 dig_regs->p0_tia_init.mask, tia_idx); in rtw89_phy_dig_set_tia_idx()
5557 rtw89_phy_write32_mask(rtwdev, dig_regs->p1_tia_init.addr, in rtw89_phy_dig_set_tia_idx()
5558 dig_regs->p1_tia_init.mask, tia_idx); in rtw89_phy_dig_set_tia_idx()
5563 const struct rtw89_dig_regs *dig_regs = rtwdev->chip->dig_regs; in rtw89_phy_dig_set_rxb_idx()
5565 rtw89_phy_write32_mask(rtwdev, dig_regs->p0_rxb_init.addr, in rtw89_phy_dig_set_rxb_idx()
5566 dig_regs->p0_rxb_init.mask, rxb_idx); in rtw89_phy_dig_set_rxb_idx()
5567 rtw89_phy_write32_mask(rtwdev, dig_regs->p1_rxb_init.addr, in rtw89_phy_dig_set_rxb_idx()
5568 dig_regs->p1_rxb_init.mask, rxb_idx); in rtw89_phy_dig_set_rxb_idx()
5574 if (!rtwdev->hal.support_igi) in rtw89_phy_dig_set_igi_cr()
5588 const struct rtw89_dig_regs *dig_regs = rtwdev->chip->dig_regs; in rtw89_phy_dig_sdagc_follow_pagc_config()
5590 rtw89_phy_write32_mask(rtwdev, dig_regs->p0_p20_pagcugc_en.addr, in rtw89_phy_dig_sdagc_follow_pagc_config()
5591 dig_regs->p0_p20_pagcugc_en.mask, enable); in rtw89_phy_dig_sdagc_follow_pagc_config()
5592 rtw89_phy_write32_mask(rtwdev, dig_regs->p0_s20_pagcugc_en.addr, in rtw89_phy_dig_sdagc_follow_pagc_config()
5593 dig_regs->p0_s20_pagcugc_en.mask, enable); in rtw89_phy_dig_sdagc_follow_pagc_config()
5594 rtw89_phy_write32_mask(rtwdev, dig_regs->p1_p20_pagcugc_en.addr, in rtw89_phy_dig_sdagc_follow_pagc_config()
5595 dig_regs->p1_p20_pagcugc_en.mask, enable); in rtw89_phy_dig_sdagc_follow_pagc_config()
5596 rtw89_phy_write32_mask(rtwdev, dig_regs->p1_s20_pagcugc_en.addr, in rtw89_phy_dig_sdagc_follow_pagc_config()
5597 dig_regs->p1_s20_pagcugc_en.mask, enable); in rtw89_phy_dig_sdagc_follow_pagc_config()
5604 struct rtw89_dig_info *dig = &rtwdev->dig; in rtw89_phy_dig_config_igi()
5606 if (!rtwdev->hal.support_igi) in rtw89_phy_dig_config_igi()
5609 if (dig->force_gaincode_idx_en) { in rtw89_phy_dig_config_igi()
5610 rtw89_phy_dig_set_igi_cr(rtwdev, dig->force_gaincode); in rtw89_phy_dig_config_igi()
5614 rtw89_phy_dig_gaincode_by_rssi(rtwdev, dig->igi_fa_rssi, in rtw89_phy_dig_config_igi()
5615 &dig->cur_gaincode); in rtw89_phy_dig_config_igi()
5616 rtw89_phy_dig_set_igi_cr(rtwdev, dig->cur_gaincode); in rtw89_phy_dig_config_igi()
5624 const struct rtw89_dig_regs *dig_regs = rtwdev->chip->dig_regs; in rtw89_phy_dig_dyn_pd_th()
5625 enum rtw89_bandwidth cbw = chan->band_width; in rtw89_phy_dig_dyn_pd_th()
5626 struct rtw89_dig_info *dig = &rtwdev->dig; in rtw89_phy_dig_dyn_pd_th()
5627 u8 final_rssi = 0, under_region = dig->pd_low_th_ofst; in rtw89_phy_dig_dyn_pd_th()
5632 if (rtwdev->chip->chip_gen == RTW89_CHIP_AX) in rtw89_phy_dig_dyn_pd_th()
5652 dig->dyn_pd_th_max = dig->igi_rssi; in rtw89_phy_dig_dyn_pd_th()
5654 final_rssi = min_t(u8, rssi, dig->igi_rssi); in rtw89_phy_dig_dyn_pd_th()
5659 pd_val = (ofdm_cca_th - under_region - PD_TH_MIN_RSSI) >> 1; in rtw89_phy_dig_dyn_pd_th()
5668 rtw89_phy_write32_mask(rtwdev, dig_regs->seg0_pd_reg, in rtw89_phy_dig_dyn_pd_th()
5669 dig_regs->pd_lower_bound_mask, pd_val); in rtw89_phy_dig_dyn_pd_th()
5670 rtw89_phy_write32_mask(rtwdev, dig_regs->seg0_pd_reg, in rtw89_phy_dig_dyn_pd_th()
5671 dig_regs->pd_spatial_reuse_en, enable); in rtw89_phy_dig_dyn_pd_th()
5673 if (!rtwdev->hal.support_cckpd) in rtw89_phy_dig_dyn_pd_th()
5676 cck_cca_th = max_t(s8, final_rssi - under_region, CCKPD_TH_MIN_RSSI); in rtw89_phy_dig_dyn_pd_th()
5677 pd_val = (u32)(cck_cca_th - IGI_RSSI_MAX); in rtw89_phy_dig_dyn_pd_th()
5683 rtw89_phy_write32_mask(rtwdev, dig_regs->bmode_pd_reg, in rtw89_phy_dig_dyn_pd_th()
5684 dig_regs->bmode_cca_rssi_limit_en, enable); in rtw89_phy_dig_dyn_pd_th()
5685 rtw89_phy_write32_mask(rtwdev, dig_regs->bmode_pd_lower_bound_reg, in rtw89_phy_dig_dyn_pd_th()
5686 dig_regs->bmode_rssi_nocca_low_th_mask, pd_val); in rtw89_phy_dig_dyn_pd_th()
5691 struct rtw89_dig_info *dig = &rtwdev->dig; in rtw89_phy_dig_reset()
5693 dig->bypass_dig = false; in rtw89_phy_dig_reset()
5695 rtw89_phy_dig_set_igi_cr(rtwdev, dig->force_gaincode); in rtw89_phy_dig_reset()
5705 struct rtw89_dig_info *dig = &rtwdev->dig; in rtw89_phy_dig()
5706 bool is_linked = rtwdev->total_sta_assoc > 0; in rtw89_phy_dig()
5709 if (unlikely(dig->bypass_dig)) { in rtw89_phy_dig()
5710 dig->bypass_dig = false; in rtw89_phy_dig()
5716 if (!dig->is_linked_pre && is_linked) { in rtw89_phy_dig()
5719 dig->igi_fa_rssi = dig->igi_rssi; in rtw89_phy_dig()
5720 } else if (dig->is_linked_pre && !is_linked) { in rtw89_phy_dig()
5723 dig->igi_fa_rssi = dig->igi_rssi; in rtw89_phy_dig()
5725 dig->is_linked_pre = is_linked; in rtw89_phy_dig()
5729 igi_min = max_t(int, dig->igi_rssi - IGI_RSSI_MIN, 0); in rtw89_phy_dig()
5730 dig->dyn_igi_max = min(igi_min + IGI_OFFSET_MAX, igi_max_performance_mode); in rtw89_phy_dig()
5731 dig->dyn_igi_min = max(igi_min, ABS_IGI_MIN); in rtw89_phy_dig()
5733 if (dig->dyn_igi_max >= dig->dyn_igi_min) { in rtw89_phy_dig()
5734 dig->igi_fa_rssi += dig->fa_rssi_ofst; in rtw89_phy_dig()
5735 dig->igi_fa_rssi = clamp(dig->igi_fa_rssi, dig->dyn_igi_min, in rtw89_phy_dig()
5736 dig->dyn_igi_max); in rtw89_phy_dig()
5738 dig->igi_fa_rssi = dig->dyn_igi_max; in rtw89_phy_dig()
5743 dig->igi_rssi, dig->dyn_igi_max, dig->dyn_igi_min, in rtw89_phy_dig()
5744 dig->igi_fa_rssi); in rtw89_phy_dig()
5748 rtw89_phy_dig_dyn_pd_th(rtwdev, dig->igi_fa_rssi, dig->dyn_pd_th_en); in rtw89_phy_dig()
5750 if (dig->dyn_pd_th_en && dig->igi_fa_rssi > dig->dyn_pd_th_max) in rtw89_phy_dig()
5758 struct rtw89_sta *rtwsta = (struct rtw89_sta *)sta->drv_priv; in rtw89_phy_tx_path_div_sta_iter()
5759 struct rtw89_dev *rtwdev = rtwsta->rtwdev; in rtw89_phy_tx_path_div_sta_iter()
5760 struct rtw89_vif *rtwvif = rtwsta->rtwvif; in rtw89_phy_tx_path_div_sta_iter()
5761 struct rtw89_hal *hal = &rtwdev->hal; in rtw89_phy_tx_path_div_sta_iter()
5766 if (rtwvif->wifi_role != RTW89_WIFI_ROLE_STATION || sta->tdls) in rtw89_phy_tx_path_div_sta_iter()
5774 rssi_a = ewma_rssi_read(&rtwsta->rssi[RF_PATH_A]); in rtw89_phy_tx_path_div_sta_iter()
5775 rssi_b = ewma_rssi_read(&rtwsta->rssi[RF_PATH_B]); in rtw89_phy_tx_path_div_sta_iter()
5784 if (hal->antenna_tx == candidate) in rtw89_phy_tx_path_div_sta_iter()
5787 hal->antenna_tx = candidate; in rtw89_phy_tx_path_div_sta_iter()
5790 if (hal->antenna_tx == RF_A) { in rtw89_phy_tx_path_div_sta_iter()
5793 } else if (hal->antenna_tx == RF_B) { in rtw89_phy_tx_path_div_sta_iter()
5801 struct rtw89_hal *hal = &rtwdev->hal; in rtw89_phy_tx_path_div_track()
5804 if (!hal->tx_path_diversity) in rtw89_phy_tx_path_div_track()
5807 ieee80211_iterate_stations_atomic(rtwdev->hw, in rtw89_phy_tx_path_div_track()
5817 struct rtw89_hal *hal = &rtwdev->hal; in rtw89_phy_antdiv_set_ant()
5820 if (!hal->ant_diversity || hal->antenna_tx == 0) in rtw89_phy_antdiv_set_ant()
5823 if (hal->antenna_tx == RF_B) { in rtw89_phy_antdiv_set_ant()
5843 struct rtw89_hal *hal = &rtwdev->hal; in rtw89_phy_swap_hal_antenna()
5845 hal->antenna_rx = hal->antenna_rx == RF_A ? RF_B : RF_A; in rtw89_phy_swap_hal_antenna()
5846 hal->antenna_tx = hal->antenna_rx; in rtw89_phy_swap_hal_antenna()
5851 struct rtw89_antdiv_info *antdiv = &rtwdev->antdiv; in rtw89_phy_antdiv_decision_state()
5852 struct rtw89_hal *hal = &rtwdev->hal; in rtw89_phy_antdiv_decision_state()
5858 antdiv->get_stats = false; in rtw89_phy_antdiv_decision_state()
5859 antdiv->training_count = 0; in rtw89_phy_antdiv_decision_state()
5861 main_rssi = rtw89_phy_antdiv_sts_instance_get_rssi(&antdiv->main_stats); in rtw89_phy_antdiv_decision_state()
5862 main_evm = rtw89_phy_antdiv_sts_instance_get_evm(&antdiv->main_stats); in rtw89_phy_antdiv_decision_state()
5863 aux_rssi = rtw89_phy_antdiv_sts_instance_get_rssi(&antdiv->aux_stats); in rtw89_phy_antdiv_decision_state()
5864 aux_evm = rtw89_phy_antdiv_sts_instance_get_evm(&antdiv->aux_stats); in rtw89_phy_antdiv_decision_state()
5883 hal->antenna_tx = candidate; in rtw89_phy_antdiv_decision_state()
5884 hal->antenna_rx = candidate; in rtw89_phy_antdiv_decision_state()
5889 struct rtw89_antdiv_info *antdiv = &rtwdev->antdiv; in rtw89_phy_antdiv_training_state()
5892 if (antdiv->training_count % 2 == 0) { in rtw89_phy_antdiv_training_state()
5893 if (antdiv->training_count == 0) in rtw89_phy_antdiv_training_state()
5896 antdiv->get_stats = true; in rtw89_phy_antdiv_training_state()
5899 antdiv->get_stats = false; in rtw89_phy_antdiv_training_state()
5906 antdiv->training_count++; in rtw89_phy_antdiv_training_state()
5907 ieee80211_queue_delayed_work(rtwdev->hw, &rtwdev->antdiv_work, in rtw89_phy_antdiv_training_state()
5915 struct rtw89_antdiv_info *antdiv = &rtwdev->antdiv; in rtw89_phy_antdiv_work()
5917 mutex_lock(&rtwdev->mutex); in rtw89_phy_antdiv_work()
5919 if (antdiv->training_count <= ANTDIV_TRAINNING_CNT) { in rtw89_phy_antdiv_work()
5926 mutex_unlock(&rtwdev->mutex); in rtw89_phy_antdiv_work()
5931 struct rtw89_antdiv_info *antdiv = &rtwdev->antdiv; in rtw89_phy_antdiv_track()
5932 struct rtw89_hal *hal = &rtwdev->hal; in rtw89_phy_antdiv_track()
5935 if (!hal->ant_diversity || hal->ant_diversity_fixed) in rtw89_phy_antdiv_track()
5938 rssi = rtw89_phy_antdiv_sts_instance_get_rssi(&antdiv->target_stats); in rtw89_phy_antdiv_track()
5939 rssi_pre = antdiv->rssi_pre; in rtw89_phy_antdiv_track()
5940 antdiv->rssi_pre = rssi; in rtw89_phy_antdiv_track()
5941 rtw89_phy_antdiv_sts_instance_reset(&antdiv->target_stats); in rtw89_phy_antdiv_track()
5943 if (abs((int)rssi - (int)rssi_pre) < ANTDIV_RSSI_DIFF_TH) in rtw89_phy_antdiv_track()
5946 antdiv->training_count = 0; in rtw89_phy_antdiv_track()
5947 ieee80211_queue_delayed_work(rtwdev->hw, &rtwdev->antdiv_work, 0); in rtw89_phy_antdiv_track()
5958 const struct rtw89_edcca_regs *edcca_regs = rtwdev->chip->edcca_regs; in rtw89_phy_edcca_init()
5959 struct rtw89_edcca_bak *edcca_bak = &rtwdev->hal.edcca_bak; in rtw89_phy_edcca_init()
5963 if (rtwdev->chip->chip_id == RTL8922A && rtwdev->hal.cv == CHIP_CAV) { in rtw89_phy_edcca_init()
5975 rtw89_phy_write32_mask(rtwdev, edcca_regs->tx_collision_t2r_st, in rtw89_phy_edcca_init()
5976 edcca_regs->tx_collision_t2r_st_mask, 0x29); in rtw89_phy_edcca_init()
6007 const struct rtw89_chip_info *chip = rtwdev->chip; in rtw89_phy_set_bss_color()
6008 const struct rtw89_reg_def *bss_clr_vld = &chip->bss_clr_vld; in rtw89_phy_set_bss_color()
6012 if (!vif->bss_conf.he_support || !vif->cfg.assoc) in rtw89_phy_set_bss_color()
6015 bss_color = vif->bss_conf.he_bss_color.color; in rtw89_phy_set_bss_color()
6017 rtw89_phy_write32_idx(rtwdev, bss_clr_vld->addr, bss_clr_vld->mask, 0x1, in rtw89_phy_set_bss_color()
6019 rtw89_phy_write32_idx(rtwdev, chip->bss_clr_map_reg, B_BSS_CLR_MAP_TGT, in rtw89_phy_set_bss_color()
6021 rtw89_phy_write32_idx(rtwdev, chip->bss_clr_map_reg, B_BSS_CLR_MAP_STAID, in rtw89_phy_set_bss_color()
6022 vif->cfg.aid, phy_idx); in rtw89_phy_set_bss_color()
6027 return desc->ch != 0; in rfk_chan_validate_desc()
6036 if (desc->ch != chan->channel) in rfk_chan_is_equivalent()
6039 if (desc->has_band && desc->band != chan->band_type) in rfk_chan_is_equivalent()
6042 if (desc->has_bw && desc->bw != chan->band_width) in rfk_chan_is_equivalent()
6057 if (rfk_chan_is_equivalent(&iter_data->desc, chan)) in rfk_chan_iter_search()
6058 iter_data->found++; in rfk_chan_iter_search()
6067 int sel = -1; in rtw89_rfk_chan_lookup()
6079 if (!iter_data.found && sel == -1) in rtw89_rfk_chan_lookup()
6083 if (sel == -1) { in rtw89_rfk_chan_lookup()
6096 rtw89_write_rf(rtwdev, def->path, def->addr, def->mask, def->data); in _rfk_write_rf()
6102 rtw89_phy_write32_mask(rtwdev, def->addr, def->mask, def->data); in _rfk_write32_mask()
6108 rtw89_phy_write32_set(rtwdev, def->addr, def->mask); in _rfk_write32_set()
6114 rtw89_phy_write32_clr(rtwdev, def->addr, def->mask); in _rfk_write32_clr()
6120 udelay(def->data); in _rfk_delay()
6137 const struct rtw89_reg5_def *p = tbl->defs; in rtw89_rfk_parser()
6138 const struct rtw89_reg5_def *end = tbl->defs + tbl->size; in rtw89_rfk_parser()
6141 _rfk_handler[p->flag](rtwdev, p); in rtw89_rfk_parser()
6222 const struct rtw89_chip_info *chip = rtwdev->chip; in rtw89_phy_tssi_ctrl_set_bandedge_cfg()
6236 data = chip->tssi_dbw_table->data[bandedge_cfg]; in rtw89_phy_tssi_ctrl_set_bandedge_cfg()
6288 for (idx = last; idx >= first; idx--) in rtw89_encode_chan_idx()
6299 (central_ch - rtw89_ch_base_table[idx]) >> 1); in rtw89_encode_chan_idx()
6325 const struct rtw89_edcca_regs *edcca_regs = rtwdev->chip->edcca_regs; in rtw89_phy_config_edcca()
6326 struct rtw89_edcca_bak *edcca_bak = &rtwdev->hal.edcca_bak; in rtw89_phy_config_edcca()
6329 edcca_bak->a = in rtw89_phy_config_edcca()
6330 rtw89_phy_read32_mask(rtwdev, edcca_regs->edcca_level, in rtw89_phy_config_edcca()
6331 edcca_regs->edcca_mask); in rtw89_phy_config_edcca()
6332 edcca_bak->p = in rtw89_phy_config_edcca()
6333 rtw89_phy_read32_mask(rtwdev, edcca_regs->edcca_level, in rtw89_phy_config_edcca()
6334 edcca_regs->edcca_p_mask); in rtw89_phy_config_edcca()
6335 edcca_bak->ppdu = in rtw89_phy_config_edcca()
6336 rtw89_phy_read32_mask(rtwdev, edcca_regs->ppdu_level, in rtw89_phy_config_edcca()
6337 edcca_regs->ppdu_mask); in rtw89_phy_config_edcca()
6339 rtw89_phy_write32_mask(rtwdev, edcca_regs->edcca_level, in rtw89_phy_config_edcca()
6340 edcca_regs->edcca_mask, EDCCA_MAX); in rtw89_phy_config_edcca()
6341 rtw89_phy_write32_mask(rtwdev, edcca_regs->edcca_level, in rtw89_phy_config_edcca()
6342 edcca_regs->edcca_p_mask, EDCCA_MAX); in rtw89_phy_config_edcca()
6343 rtw89_phy_write32_mask(rtwdev, edcca_regs->ppdu_level, in rtw89_phy_config_edcca()
6344 edcca_regs->ppdu_mask, EDCCA_MAX); in rtw89_phy_config_edcca()
6346 rtw89_phy_write32_mask(rtwdev, edcca_regs->edcca_level, in rtw89_phy_config_edcca()
6347 edcca_regs->edcca_mask, in rtw89_phy_config_edcca()
6348 edcca_bak->a); in rtw89_phy_config_edcca()
6349 rtw89_phy_write32_mask(rtwdev, edcca_regs->edcca_level, in rtw89_phy_config_edcca()
6350 edcca_regs->edcca_p_mask, in rtw89_phy_config_edcca()
6351 edcca_bak->p); in rtw89_phy_config_edcca()
6352 rtw89_phy_write32_mask(rtwdev, edcca_regs->ppdu_level, in rtw89_phy_config_edcca()
6353 edcca_regs->ppdu_mask, in rtw89_phy_config_edcca()
6354 edcca_bak->ppdu); in rtw89_phy_config_edcca()
6360 const struct rtw89_edcca_regs *edcca_regs = rtwdev->chip->edcca_regs; in rtw89_phy_edcca_log()
6370 if (rtwdev->chip->chip_id == RTL8922A) in rtw89_phy_edcca_log()
6371 rtw89_phy_write32_mask(rtwdev, edcca_regs->rpt_sel_be, in rtw89_phy_edcca_log()
6372 edcca_regs->rpt_sel_be_mask, 0); in rtw89_phy_edcca_log()
6374 rtw89_phy_write32_mask(rtwdev, edcca_regs->rpt_sel, in rtw89_phy_edcca_log()
6375 edcca_regs->rpt_sel_mask, 0); in rtw89_phy_edcca_log()
6376 tmp = rtw89_phy_read32(rtwdev, edcca_regs->rpt_b); in rtw89_phy_edcca_log()
6387 rtw89_phy_write32_mask(rtwdev, edcca_regs->rpt_sel, in rtw89_phy_edcca_log()
6388 edcca_regs->rpt_sel_mask, 4); in rtw89_phy_edcca_log()
6389 tmp = rtw89_phy_read32(rtwdev, edcca_regs->rpt_b); in rtw89_phy_edcca_log()
6393 per20_bitmap = rtw89_phy_read32_mask(rtwdev, edcca_regs->rpt_a, in rtw89_phy_edcca_log()
6396 if (rtwdev->chip->chip_id == RTL8922A) { in rtw89_phy_edcca_log()
6397 rtw89_phy_write32_mask(rtwdev, edcca_regs->rpt_sel_be, in rtw89_phy_edcca_log()
6398 edcca_regs->rpt_sel_be_mask, 4); in rtw89_phy_edcca_log()
6399 tmp = rtw89_phy_read32(rtwdev, edcca_regs->rpt_b); in rtw89_phy_edcca_log()
6405 rtw89_phy_write32_mask(rtwdev, edcca_regs->rpt_sel_be, in rtw89_phy_edcca_log()
6406 edcca_regs->rpt_sel_be_mask, 5); in rtw89_phy_edcca_log()
6407 tmp = rtw89_phy_read32(rtwdev, edcca_regs->rpt_b); in rtw89_phy_edcca_log()
6413 rtw89_phy_write32_mask(rtwdev, edcca_regs->rpt_sel, in rtw89_phy_edcca_log()
6414 edcca_regs->rpt_sel_mask, 0); in rtw89_phy_edcca_log()
6415 tmp = rtw89_phy_read32(rtwdev, edcca_regs->rpt_a); in rtw89_phy_edcca_log()
6419 rtw89_phy_write32_mask(rtwdev, edcca_regs->rpt_sel, in rtw89_phy_edcca_log()
6420 edcca_regs->rpt_sel_mask, 1); in rtw89_phy_edcca_log()
6421 tmp = rtw89_phy_read32(rtwdev, edcca_regs->rpt_a); in rtw89_phy_edcca_log()
6425 rtw89_phy_write32_mask(rtwdev, edcca_regs->rpt_sel, in rtw89_phy_edcca_log()
6426 edcca_regs->rpt_sel_mask, 2); in rtw89_phy_edcca_log()
6427 tmp = rtw89_phy_read32(rtwdev, edcca_regs->rpt_a); in rtw89_phy_edcca_log()
6431 rtw89_phy_write32_mask(rtwdev, edcca_regs->rpt_sel, in rtw89_phy_edcca_log()
6432 edcca_regs->rpt_sel_mask, 3); in rtw89_phy_edcca_log()
6433 tmp = rtw89_phy_read32(rtwdev, edcca_regs->rpt_a); in rtw89_phy_edcca_log()
6457 struct rtw89_phy_ch_info *ch_info = &rtwdev->ch_info; in rtw89_phy_edcca_get_thre_by_rssi()
6458 bool is_linked = rtwdev->total_sta_assoc > 0; in rtw89_phy_edcca_get_thre_by_rssi()
6459 u8 rssi_min = ch_info->rssi_min >> 1; in rtw89_phy_edcca_get_thre_by_rssi()
6465 edcca_thre = rssi_min - RSSI_UNIT_CONVER + EDCCA_UNIT_CONVER - in rtw89_phy_edcca_get_thre_by_rssi()
6475 const struct rtw89_edcca_regs *edcca_regs = rtwdev->chip->edcca_regs; in rtw89_phy_edcca_thre_calc()
6476 struct rtw89_edcca_bak *edcca_bak = &rtwdev->hal.edcca_bak; in rtw89_phy_edcca_thre_calc()
6480 if (th == edcca_bak->th_old) in rtw89_phy_edcca_thre_calc()
6483 edcca_bak->th_old = th; in rtw89_phy_edcca_thre_calc()
6488 rtw89_phy_write32_mask(rtwdev, edcca_regs->edcca_level, in rtw89_phy_edcca_thre_calc()
6489 edcca_regs->edcca_mask, th); in rtw89_phy_edcca_thre_calc()
6490 rtw89_phy_write32_mask(rtwdev, edcca_regs->edcca_level, in rtw89_phy_edcca_thre_calc()
6491 edcca_regs->edcca_p_mask, th); in rtw89_phy_edcca_thre_calc()
6492 rtw89_phy_write32_mask(rtwdev, edcca_regs->ppdu_level, in rtw89_phy_edcca_thre_calc()
6493 edcca_regs->ppdu_mask, th); in rtw89_phy_edcca_thre_calc()
6498 struct rtw89_hal *hal = &rtwdev->hal; in rtw89_phy_edcca_track()
6500 if (hal->disabled_dm_bitmap & BIT(RTW89_DM_DYNAMIC_EDCCA)) in rtw89_phy_edcca_track()
6512 rtwdev->dbcc_en, rtwdev->mlo_dbcc_mode, phy_idx); in rtw89_phy_get_kpath()
6514 switch (rtwdev->mlo_dbcc_mode) { in rtw89_phy_get_kpath()
6546 rtwdev->dbcc_en, rtwdev->mlo_dbcc_mode, phy_idx); in rtw89_phy_get_syn_sel()
6548 switch (rtwdev->mlo_dbcc_mode) { in rtw89_phy_get_syn_sel()