43 		rtw89_write32_clr(rtwdev, R_AX_PCIE_MIX_CFG_V1,  in rtw89_pci_aspm_set_be()
53 		rtw89_write32_clr(rtwdev, R_BE_PCIE_MIX_CFG,  in rtw89_pci_l1ss_set_be()
66 		rtw89_write32_clr(rtwdev, R_AX_L1_CLK_CTRL,  in rtw89_pci_clkreq_set_be()
75 		rtw89_write32_clr(rtwdev, R_BE_HCI_OPT_CTRL, BIT_WAKE_CTRL_V1);  in _patch_pcie_power_wake_be()
109 		rtw89_write32_clr(rtwdev, R_BE_WLAN_WDT, B_BE_WLAN_WDT_ENABLE);  in rtw89_pci_set_io_rcy_be()
110 		rtw89_write32_clr(rtwdev, R_BE_AXIDMA_WDT, B_BE_AXIDMA_WDT_ENABLE);  in rtw89_pci_set_io_rcy_be()
111 		rtw89_write32_clr(rtwdev, R_BE_AON_WDT, B_BE_AON_WDT_ENABLE);  in rtw89_pci_set_io_rcy_be()
112 		rtw89_write32_clr(rtwdev, R_BE_LOCAL_WDT, B_BE_LOCAL_WDT_ENABLE);  in rtw89_pci_set_io_rcy_be()
113 		rtw89_write32_clr(rtwdev, R_BE_MDIO_WDT, B_BE_MDIO_WDT_ENABLE);  in rtw89_pci_set_io_rcy_be()
114 		rtw89_write32_clr(rtwdev, R_BE_LA_MODE_WDT, B_BE_LA_MODE_WDT_ENABLE);  in rtw89_pci_set_io_rcy_be()
115 		rtw89_write32_clr(rtwdev, R_BE_WDT_AR, B_BE_WDT_AR_ENABLE);  in rtw89_pci_set_io_rcy_be()
116 		rtw89_write32_clr(rtwdev, R_BE_WDT_AW, B_BE_WDT_AW_ENABLE);  in rtw89_pci_set_io_rcy_be()
117 		rtw89_write32_clr(rtwdev, R_BE_WDT_W, B_BE_WDT_W_ENABLE);  in rtw89_pci_set_io_rcy_be()
118 		rtw89_write32_clr(rtwdev, R_BE_WDT_B, B_BE_WDT_B_ENABLE);  in rtw89_pci_set_io_rcy_be()
119 		rtw89_write32_clr(rtwdev, R_BE_WDT_R, B_BE_WDT_R_ENABLE);  in rtw89_pci_set_io_rcy_be()
126 		rtw89_write32_clr(rtwdev, R_BE_HAXI_DMA_STOP1, B_BE_STOP_WPDMA);  in rtw89_pci_ctrl_wpdma_pcie_be()
284 	rtw89_write32_clr(rtwdev, R_BE_SYS_SDIO_CTRL, B_BE_PCIE_FORCE_IBX_EN |  in rtw89_pci_ldo_low_pwr_be()
287 	rtw89_write32_clr(rtwdev, R_BE_L1_2_CTRL_HCILDO, B_BE_PCIE_DIS_L1_2_CTRL_HCILDO);  in rtw89_pci_ldo_low_pwr_be()
296 	rtw89_write32_clr(rtwdev, R_BE_PCIE_PS_CTRL, B_BE_CMAC_EXIT_L1_EN);  in rtw89_pci_pcie_setting_be()
560 	rtw89_write32_clr(rtwdev, R_BE_RSV_CTRL, B_BE_WLOCK_1C_BIT6);  in rtw89_pci_suspend_be()
562 	rtw89_write32_clr(rtwdev, R_BE_REG_PL1_MASK, B_BE_SER_PM_MASTER_IMR);  in rtw89_pci_suspend_be()
574 	rtw89_write32_clr(rtwdev, R_BE_RSV_CTRL, B_BE_R_DIS_PRST);  in rtw89_pci_resume_be()
575 	rtw89_write32_clr(rtwdev, R_BE_RSV_CTRL, B_BE_WLOCK_1C_BIT6);  in rtw89_pci_resume_be()
576 	rtw89_write32_clr(rtwdev, R_BE_PCIE_FRZ_CLK, B_BE_PCIE_FRZ_REG_RST);  in rtw89_pci_resume_be()
577 	rtw89_write32_clr(rtwdev, R_BE_SER_PL1_CTRL, B_BE_PL1_SER_PL1_EN);  in rtw89_pci_resume_be()