Lines Matching +full:0 +full:x800f0000
68 } else if (sel == RTW89_CMAC_SEL && mac_idx == 0) { in rtw89_mac_check_mac_en_ax()
81 return 0; in rtw89_mac_check_mac_en_ax()
89 ret = read_poll_timeout(rtw89_read8, lte_ctrl, (lte_ctrl & BIT(5)) != 0, in rtw89_mac_write_lte()
95 rtw89_write32(rtwdev, R_AX_LTE_CTRL, 0xC00F0000 | offset); in rtw89_mac_write_lte()
105 ret = read_poll_timeout(rtw89_read8, lte_ctrl, (lte_ctrl & BIT(5)) != 0, in rtw89_mac_read_lte()
110 rtw89_write32(rtwdev, R_AX_LTE_CTRL, 0x800F0000 | offset); in rtw89_mac_read_lte()
147 rtw89_warn(rtwdev, "[ERR] dle dfi ctrl 0x%X set 0x%X timeout\n", in rtw89_mac_dle_dfi_cfg()
153 return 0; in rtw89_mac_dle_dfi_cfg()
173 return 0; in rtw89_mac_dle_dfi_quota_cfg()
192 return 0; in rtw89_mac_dle_dfi_qempty_cfg()
197 rtw89_info(rtwdev, "R_AX_HOST_DISPATCHER_ALWAYS_IMR=0x%08x ", in dump_err_status_dispatcher_ax()
199 rtw89_info(rtwdev, "R_AX_HOST_DISPATCHER_ALWAYS_ISR=0x%08x\n", in dump_err_status_dispatcher_ax()
201 rtw89_info(rtwdev, "R_AX_CPU_DISPATCHER_ALWAYS_IMR=0x%08x ", in dump_err_status_dispatcher_ax()
203 rtw89_info(rtwdev, "R_AX_CPU_DISPATCHER_ALWAYS_ISR=0x%08x\n", in dump_err_status_dispatcher_ax()
205 rtw89_info(rtwdev, "R_AX_OTHER_DISPATCHER_ALWAYS_IMR=0x%08x ", in dump_err_status_dispatcher_ax()
207 rtw89_info(rtwdev, "R_AX_OTHER_DISPATCHER_ALWAYS_ISR=0x%08x\n", in dump_err_status_dispatcher_ax()
220 qempty.grpsel = 0; in rtw89_mac_dump_qta_lost_ax()
221 qempty.qempty = ~(u32)0; in rtw89_mac_dump_qta_lost_ax()
226 rtw89_info(rtwdev, "DLE group0 empty: 0x%x\n", qempty.qempty); in rtw89_mac_dump_qta_lost_ax()
228 for (not_empty = ~qempty.qempty, i = 0; not_empty != 0; not_empty >>= 1, i++) { in rtw89_mac_dump_qta_lost_ax()
229 if (!(not_empty & BIT(0))) in rtw89_mac_dump_qta_lost_ax()
233 ctrl.addr = (QLNKTBL_ADDR_INFO_SEL_0 ? QLNKTBL_ADDR_INFO_SEL : 0) | in rtw89_mac_dump_qta_lost_ax()
250 rtw89_info(rtwdev, "quota6 rsv/use: 0x%x/0x%x\n", in rtw89_mac_dump_qta_lost_ax()
254 rtw89_info(rtwdev, "[PLE][CMAC0_RX]min_pgnum=0x%x\n", in rtw89_mac_dump_qta_lost_ax()
256 rtw89_info(rtwdev, "[PLE][CMAC0_RX]max_pgnum=0x%x\n", in rtw89_mac_dump_qta_lost_ax()
259 rtw89_info(rtwdev, "[PLE][CMAC0_RX]B_AX_RX_MPDU_MAX_LEN=0x%x\n", in rtw89_mac_dump_qta_lost_ax()
261 rtw89_info(rtwdev, "R_AX_RSP_CHK_SIG=0x%08x\n", in rtw89_mac_dump_qta_lost_ax()
263 rtw89_info(rtwdev, "R_AX_TRXPTCL_RESP_0=0x%08x\n", in rtw89_mac_dump_qta_lost_ax()
265 rtw89_info(rtwdev, "R_AX_CCA_CONTROL=0x%08x\n", in rtw89_mac_dump_qta_lost_ax()
275 rtw89_info(rtwdev, "quota7 rsv/use: 0x%x/0x%x\n", in rtw89_mac_dump_qta_lost_ax()
279 rtw89_info(rtwdev, "[PLE][CMAC1_RX]min_pgnum=0x%x\n", in rtw89_mac_dump_qta_lost_ax()
281 rtw89_info(rtwdev, "[PLE][CMAC1_RX]max_pgnum=0x%x\n", in rtw89_mac_dump_qta_lost_ax()
284 rtw89_info(rtwdev, "[PLE][CMAC1_RX]B_AX_RX_MPDU_MAX_LEN=0x%x\n", in rtw89_mac_dump_qta_lost_ax()
286 rtw89_info(rtwdev, "R_AX_RSP_CHK_SIG_C1=0x%08x\n", in rtw89_mac_dump_qta_lost_ax()
288 rtw89_info(rtwdev, "R_AX_TRXPTCL_RESP_0_C1=0x%08x\n", in rtw89_mac_dump_qta_lost_ax()
290 rtw89_info(rtwdev, "R_AX_CCA_CONTROL_C1=0x%08x\n", in rtw89_mac_dump_qta_lost_ax()
294 rtw89_info(rtwdev, "R_AX_DLE_EMPTY0=0x%08x\n", in rtw89_mac_dump_qta_lost_ax()
296 rtw89_info(rtwdev, "R_AX_DLE_EMPTY1=0x%08x\n", in rtw89_mac_dump_qta_lost_ax()
327 ret = rtw89_mac_check_mac_en(rtwdev, 0, RTW89_DMAC_SEL); in rtw89_mac_dump_dmac_err_status()
334 rtw89_info(rtwdev, "R_AX_DMAC_ERR_ISR=0x%08x\n", dmac_err); in rtw89_mac_dump_dmac_err_status()
335 rtw89_info(rtwdev, "R_AX_DMAC_ERR_IMR=0x%08x\n", in rtw89_mac_dump_dmac_err_status()
339 rtw89_info(rtwdev, "R_AX_WDE_ERR_FLAG_CFG=0x%08x\n", in rtw89_mac_dump_dmac_err_status()
341 rtw89_info(rtwdev, "R_AX_PLE_ERR_FLAG_CFG=0x%08x\n", in rtw89_mac_dump_dmac_err_status()
344 rtw89_info(rtwdev, "R_AX_PLE_ERRFLAG_MSG=0x%08x\n", in rtw89_mac_dump_dmac_err_status()
346 rtw89_info(rtwdev, "R_AX_WDE_ERRFLAG_MSG=0x%08x\n", in rtw89_mac_dump_dmac_err_status()
348 rtw89_info(rtwdev, "R_AX_PLE_DBGERR_LOCKEN=0x%08x\n", in rtw89_mac_dump_dmac_err_status()
350 rtw89_info(rtwdev, "R_AX_PLE_DBGERR_STS=0x%08x\n", in rtw89_mac_dump_dmac_err_status()
356 rtw89_info(rtwdev, "R_AX_WDRLS_ERR_IMR=0x%08x\n", in rtw89_mac_dump_dmac_err_status()
358 rtw89_info(rtwdev, "R_AX_WDRLS_ERR_ISR=0x%08x\n", in rtw89_mac_dump_dmac_err_status()
361 rtw89_info(rtwdev, "R_AX_RPQ_RXBD_IDX=0x%08x\n", in rtw89_mac_dump_dmac_err_status()
364 rtw89_info(rtwdev, "R_AX_RPQ_RXBD_IDX=0x%08x\n", in rtw89_mac_dump_dmac_err_status()
370 rtw89_info(rtwdev, "R_AX_SEC_ERR_IMR=0x%08x\n", in rtw89_mac_dump_dmac_err_status()
372 rtw89_info(rtwdev, "R_AX_SEC_ERR_ISR=0x%08x\n", in rtw89_mac_dump_dmac_err_status()
374 rtw89_info(rtwdev, "R_AX_SEC_ENG_CTRL=0x%08x\n", in rtw89_mac_dump_dmac_err_status()
376 rtw89_info(rtwdev, "R_AX_SEC_MPDU_PROC=0x%08x\n", in rtw89_mac_dump_dmac_err_status()
378 rtw89_info(rtwdev, "R_AX_SEC_CAM_ACCESS=0x%08x\n", in rtw89_mac_dump_dmac_err_status()
380 rtw89_info(rtwdev, "R_AX_SEC_CAM_RDATA=0x%08x\n", in rtw89_mac_dump_dmac_err_status()
382 rtw89_info(rtwdev, "R_AX_SEC_DEBUG1=0x%08x\n", in rtw89_mac_dump_dmac_err_status()
384 rtw89_info(rtwdev, "R_AX_SEC_TX_DEBUG=0x%08x\n", in rtw89_mac_dump_dmac_err_status()
386 rtw89_info(rtwdev, "R_AX_SEC_RX_DEBUG=0x%08x\n", in rtw89_mac_dump_dmac_err_status()
390 B_AX_DBG_SEL0, 0x8B); in rtw89_mac_dump_dmac_err_status()
392 B_AX_DBG_SEL1, 0x8B); in rtw89_mac_dump_dmac_err_status()
395 for (i = 0; i < 0x10; i++) { in rtw89_mac_dump_dmac_err_status()
398 rtw89_info(rtwdev, "sel=%x,R_AX_SEC_DEBUG2=0x%08x\n", in rtw89_mac_dump_dmac_err_status()
402 rtw89_info(rtwdev, "R_BE_SEC_ERROR_FLAG=0x%08x\n", in rtw89_mac_dump_dmac_err_status()
404 rtw89_info(rtwdev, "R_BE_SEC_ERROR_IMR=0x%08x\n", in rtw89_mac_dump_dmac_err_status()
406 rtw89_info(rtwdev, "R_BE_SEC_ENG_CTRL=0x%08x\n", in rtw89_mac_dump_dmac_err_status()
408 rtw89_info(rtwdev, "R_BE_SEC_MPDU_PROC=0x%08x\n", in rtw89_mac_dump_dmac_err_status()
410 rtw89_info(rtwdev, "R_BE_SEC_CAM_ACCESS=0x%08x\n", in rtw89_mac_dump_dmac_err_status()
412 rtw89_info(rtwdev, "R_BE_SEC_CAM_RDATA=0x%08x\n", in rtw89_mac_dump_dmac_err_status()
414 rtw89_info(rtwdev, "R_BE_SEC_DEBUG2=0x%08x\n", in rtw89_mac_dump_dmac_err_status()
417 rtw89_info(rtwdev, "R_AX_SEC_ERR_IMR_ISR=0x%08x\n", in rtw89_mac_dump_dmac_err_status()
419 rtw89_info(rtwdev, "R_AX_SEC_ENG_CTRL=0x%08x\n", in rtw89_mac_dump_dmac_err_status()
421 rtw89_info(rtwdev, "R_AX_SEC_MPDU_PROC=0x%08x\n", in rtw89_mac_dump_dmac_err_status()
423 rtw89_info(rtwdev, "R_AX_SEC_CAM_ACCESS=0x%08x\n", in rtw89_mac_dump_dmac_err_status()
425 rtw89_info(rtwdev, "R_AX_SEC_CAM_RDATA=0x%08x\n", in rtw89_mac_dump_dmac_err_status()
427 rtw89_info(rtwdev, "R_AX_SEC_CAM_WDATA=0x%08x\n", in rtw89_mac_dump_dmac_err_status()
429 rtw89_info(rtwdev, "R_AX_SEC_TX_DEBUG=0x%08x\n", in rtw89_mac_dump_dmac_err_status()
431 rtw89_info(rtwdev, "R_AX_SEC_RX_DEBUG=0x%08x\n", in rtw89_mac_dump_dmac_err_status()
433 rtw89_info(rtwdev, "R_AX_SEC_TRX_PKT_CNT=0x%08x\n", in rtw89_mac_dump_dmac_err_status()
435 rtw89_info(rtwdev, "R_AX_SEC_TRX_BLK_CNT=0x%08x\n", in rtw89_mac_dump_dmac_err_status()
441 rtw89_info(rtwdev, "R_AX_MPDU_TX_ERR_IMR=0x%08x\n", in rtw89_mac_dump_dmac_err_status()
443 rtw89_info(rtwdev, "R_AX_MPDU_TX_ERR_ISR=0x%08x\n", in rtw89_mac_dump_dmac_err_status()
445 rtw89_info(rtwdev, "R_AX_MPDU_RX_ERR_IMR=0x%08x\n", in rtw89_mac_dump_dmac_err_status()
447 rtw89_info(rtwdev, "R_AX_MPDU_RX_ERR_ISR=0x%08x\n", in rtw89_mac_dump_dmac_err_status()
453 rtw89_info(rtwdev, "R_BE_INTERRUPT_MASK_REG=0x%08x\n", in rtw89_mac_dump_dmac_err_status()
455 rtw89_info(rtwdev, "R_BE_INTERRUPT_STS_REG=0x%08x\n", in rtw89_mac_dump_dmac_err_status()
458 rtw89_info(rtwdev, "R_AX_STA_SCHEDULER_ERR_IMR=0x%08x\n", in rtw89_mac_dump_dmac_err_status()
460 rtw89_info(rtwdev, "R_AX_STA_SCHEDULER_ERR_ISR=0x%08x\n", in rtw89_mac_dump_dmac_err_status()
466 rtw89_info(rtwdev, "R_AX_WDE_ERR_IMR=0x%08x\n", in rtw89_mac_dump_dmac_err_status()
468 rtw89_info(rtwdev, "R_AX_WDE_ERR_ISR=0x%08x\n", in rtw89_mac_dump_dmac_err_status()
470 rtw89_info(rtwdev, "R_AX_PLE_ERR_IMR=0x%08x\n", in rtw89_mac_dump_dmac_err_status()
472 rtw89_info(rtwdev, "R_AX_PLE_ERR_FLAG_ISR=0x%08x\n", in rtw89_mac_dump_dmac_err_status()
478 rtw89_info(rtwdev, "R_AX_TXPKTCTL_B0_ERRFLAG_IMR=0x%08x\n", in rtw89_mac_dump_dmac_err_status()
480 rtw89_info(rtwdev, "R_AX_TXPKTCTL_B0_ERRFLAG_ISR=0x%08x\n", in rtw89_mac_dump_dmac_err_status()
482 rtw89_info(rtwdev, "R_AX_TXPKTCTL_B1_ERRFLAG_IMR=0x%08x\n", in rtw89_mac_dump_dmac_err_status()
484 rtw89_info(rtwdev, "R_AX_TXPKTCTL_B1_ERRFLAG_ISR=0x%08x\n", in rtw89_mac_dump_dmac_err_status()
487 rtw89_info(rtwdev, "R_AX_TXPKTCTL_ERR_IMR_ISR=0x%08x\n", in rtw89_mac_dump_dmac_err_status()
489 rtw89_info(rtwdev, "R_AX_TXPKTCTL_ERR_IMR_ISR_B1=0x%08x\n", in rtw89_mac_dump_dmac_err_status()
495 rtw89_info(rtwdev, "R_AX_WDE_ERR_IMR=0x%08x\n", in rtw89_mac_dump_dmac_err_status()
497 rtw89_info(rtwdev, "R_AX_WDE_ERR_ISR=0x%08x\n", in rtw89_mac_dump_dmac_err_status()
499 rtw89_info(rtwdev, "R_AX_PLE_ERR_IMR=0x%08x\n", in rtw89_mac_dump_dmac_err_status()
501 rtw89_info(rtwdev, "R_AX_PLE_ERR_FLAG_ISR=0x%08x\n", in rtw89_mac_dump_dmac_err_status()
503 rtw89_info(rtwdev, "R_AX_WD_CPUQ_OP_0=0x%08x\n", in rtw89_mac_dump_dmac_err_status()
505 rtw89_info(rtwdev, "R_AX_WD_CPUQ_OP_1=0x%08x\n", in rtw89_mac_dump_dmac_err_status()
507 rtw89_info(rtwdev, "R_AX_WD_CPUQ_OP_2=0x%08x\n", in rtw89_mac_dump_dmac_err_status()
509 rtw89_info(rtwdev, "R_AX_PL_CPUQ_OP_0=0x%08x\n", in rtw89_mac_dump_dmac_err_status()
511 rtw89_info(rtwdev, "R_AX_PL_CPUQ_OP_1=0x%08x\n", in rtw89_mac_dump_dmac_err_status()
513 rtw89_info(rtwdev, "R_AX_PL_CPUQ_OP_2=0x%08x\n", in rtw89_mac_dump_dmac_err_status()
516 rtw89_info(rtwdev, "R_BE_WD_CPUQ_OP_3=0x%08x\n", in rtw89_mac_dump_dmac_err_status()
518 rtw89_info(rtwdev, "R_BE_WD_CPUQ_OP_STATUS=0x%08x\n", in rtw89_mac_dump_dmac_err_status()
520 rtw89_info(rtwdev, "R_BE_PLE_CPUQ_OP_3=0x%08x\n", in rtw89_mac_dump_dmac_err_status()
522 rtw89_info(rtwdev, "R_BE_PL_CPUQ_OP_STATUS=0x%08x\n", in rtw89_mac_dump_dmac_err_status()
525 rtw89_info(rtwdev, "R_AX_WD_CPUQ_OP_STATUS=0x%08x\n", in rtw89_mac_dump_dmac_err_status()
527 rtw89_info(rtwdev, "R_AX_PL_CPUQ_OP_STATUS=0x%08x\n", in rtw89_mac_dump_dmac_err_status()
530 rtw89_info(rtwdev, "R_AX_RX_CTRL0=0x%08x\n", in rtw89_mac_dump_dmac_err_status()
532 rtw89_info(rtwdev, "R_AX_RX_CTRL1=0x%08x\n", in rtw89_mac_dump_dmac_err_status()
534 rtw89_info(rtwdev, "R_AX_RX_CTRL2=0x%08x\n", in rtw89_mac_dump_dmac_err_status()
537 rtw89_info(rtwdev, "R_AX_RXDMA_PKT_INFO_0=0x%08x\n", in rtw89_mac_dump_dmac_err_status()
539 rtw89_info(rtwdev, "R_AX_RXDMA_PKT_INFO_1=0x%08x\n", in rtw89_mac_dump_dmac_err_status()
541 rtw89_info(rtwdev, "R_AX_RXDMA_PKT_INFO_2=0x%08x\n", in rtw89_mac_dump_dmac_err_status()
548 rtw89_info(rtwdev, "R_AX_PKTIN_ERR_IMR=0x%08x\n", in rtw89_mac_dump_dmac_err_status()
550 rtw89_info(rtwdev, "R_AX_PKTIN_ERR_ISR=0x%08x\n", in rtw89_mac_dump_dmac_err_status()
556 rtw89_info(rtwdev, "R_BE_DISP_HOST_IMR=0x%08x\n", in rtw89_mac_dump_dmac_err_status()
558 rtw89_info(rtwdev, "R_BE_DISP_ERROR_ISR1=0x%08x\n", in rtw89_mac_dump_dmac_err_status()
560 rtw89_info(rtwdev, "R_BE_DISP_CPU_IMR=0x%08x\n", in rtw89_mac_dump_dmac_err_status()
562 rtw89_info(rtwdev, "R_BE_DISP_ERROR_ISR2=0x%08x\n", in rtw89_mac_dump_dmac_err_status()
564 rtw89_info(rtwdev, "R_BE_DISP_OTHER_IMR=0x%08x\n", in rtw89_mac_dump_dmac_err_status()
566 rtw89_info(rtwdev, "R_BE_DISP_ERROR_ISR0=0x%08x\n", in rtw89_mac_dump_dmac_err_status()
569 rtw89_info(rtwdev, "R_AX_HOST_DISPATCHER_ERR_IMR=0x%08x\n", in rtw89_mac_dump_dmac_err_status()
571 rtw89_info(rtwdev, "R_AX_HOST_DISPATCHER_ERR_ISR=0x%08x\n", in rtw89_mac_dump_dmac_err_status()
573 rtw89_info(rtwdev, "R_AX_CPU_DISPATCHER_ERR_IMR=0x%08x\n", in rtw89_mac_dump_dmac_err_status()
575 rtw89_info(rtwdev, "R_AX_CPU_DISPATCHER_ERR_ISR=0x%08x\n", in rtw89_mac_dump_dmac_err_status()
577 rtw89_info(rtwdev, "R_AX_OTHER_DISPATCHER_ERR_IMR=0x%08x\n", in rtw89_mac_dump_dmac_err_status()
579 rtw89_info(rtwdev, "R_AX_OTHER_DISPATCHER_ERR_ISR=0x%08x\n", in rtw89_mac_dump_dmac_err_status()
586 rtw89_info(rtwdev, "R_AX_BBRPT_COM_ERR_IMR=0x%08x\n", in rtw89_mac_dump_dmac_err_status()
588 rtw89_info(rtwdev, "R_AX_BBRPT_COM_ERR_ISR=0x%08x\n", in rtw89_mac_dump_dmac_err_status()
590 rtw89_info(rtwdev, "R_AX_BBRPT_CHINFO_ERR_ISR=0x%08x\n", in rtw89_mac_dump_dmac_err_status()
592 rtw89_info(rtwdev, "R_AX_BBRPT_CHINFO_ERR_IMR=0x%08x\n", in rtw89_mac_dump_dmac_err_status()
594 rtw89_info(rtwdev, "R_AX_BBRPT_DFS_ERR_IMR=0x%08x\n", in rtw89_mac_dump_dmac_err_status()
596 rtw89_info(rtwdev, "R_AX_BBRPT_DFS_ERR_ISR=0x%08x\n", in rtw89_mac_dump_dmac_err_status()
599 rtw89_info(rtwdev, "R_AX_BBRPT_COM_ERR_IMR_ISR=0x%08x\n", in rtw89_mac_dump_dmac_err_status()
601 rtw89_info(rtwdev, "R_AX_BBRPT_CHINFO_ERR_ISR=0x%08x\n", in rtw89_mac_dump_dmac_err_status()
603 rtw89_info(rtwdev, "R_AX_BBRPT_CHINFO_ERR_IMR=0x%08x\n", in rtw89_mac_dump_dmac_err_status()
605 rtw89_info(rtwdev, "R_AX_BBRPT_DFS_ERR_IMR=0x%08x\n", in rtw89_mac_dump_dmac_err_status()
607 rtw89_info(rtwdev, "R_AX_BBRPT_DFS_ERR_ISR=0x%08x\n", in rtw89_mac_dump_dmac_err_status()
611 rtw89_info(rtwdev, "R_BE_LA_ERRFLAG_IMR=0x%08x\n", in rtw89_mac_dump_dmac_err_status()
613 rtw89_info(rtwdev, "R_BE_LA_ERRFLAG_ISR=0x%08x\n", in rtw89_mac_dump_dmac_err_status()
620 rtw89_info(rtwdev, "R_BE_HAXI_IDCT_MSK=0x%08x\n", in rtw89_mac_dump_dmac_err_status()
622 rtw89_info(rtwdev, "R_BE_HAXI_IDCT=0x%08x\n", in rtw89_mac_dump_dmac_err_status()
625 rtw89_info(rtwdev, "R_AX_HAXIDMA_ERR_IMR=0x%08x\n", in rtw89_mac_dump_dmac_err_status()
627 rtw89_info(rtwdev, "R_AX_HAXIDMA_ERR_ISR=0x%08x\n", in rtw89_mac_dump_dmac_err_status()
633 rtw89_info(rtwdev, "R_BE_PL_AXIDMA_IDCT_MSK=0x%08x\n", in rtw89_mac_dump_dmac_err_status()
636 rtw89_info(rtwdev, "R_BE_PL_AXIDMA_IDCT=0x%08x\n", in rtw89_mac_dump_dmac_err_status()
642 rtw89_info(rtwdev, "R_BE_MLO_ERR_IDCT_IMR=0x%08x\n", in rtw89_mac_dump_dmac_err_status()
644 rtw89_info(rtwdev, "R_BE_PKTIN_ERR_ISR=0x%08x\n", in rtw89_mac_dump_dmac_err_status()
649 rtw89_info(rtwdev, "R_BE_PLRLS_ERR_IMR=0x%08x\n", in rtw89_mac_dump_dmac_err_status()
651 rtw89_info(rtwdev, "R_BE_PLRLS_ERR_ISR=0x%08x\n", in rtw89_mac_dump_dmac_err_status()
660 u32 offset = 0; in rtw89_mac_dump_cmac_err_status_ax()
677 rtw89_info(rtwdev, "R_AX_CMAC_ERR_ISR [%d]=0x%08x\n", band, in rtw89_mac_dump_cmac_err_status_ax()
679 rtw89_info(rtwdev, "R_AX_CMAC_FUNC_EN [%d]=0x%08x\n", band, in rtw89_mac_dump_cmac_err_status_ax()
681 rtw89_info(rtwdev, "R_AX_CK_EN [%d]=0x%08x\n", band, in rtw89_mac_dump_cmac_err_status_ax()
685 rtw89_info(rtwdev, "R_AX_SCHEDULE_ERR_IMR [%d]=0x%08x\n", band, in rtw89_mac_dump_cmac_err_status_ax()
687 rtw89_info(rtwdev, "R_AX_SCHEDULE_ERR_ISR [%d]=0x%08x\n", band, in rtw89_mac_dump_cmac_err_status_ax()
692 rtw89_info(rtwdev, "R_AX_PTCL_IMR0 [%d]=0x%08x\n", band, in rtw89_mac_dump_cmac_err_status_ax()
694 rtw89_info(rtwdev, "R_AX_PTCL_ISR0 [%d]=0x%08x\n", band, in rtw89_mac_dump_cmac_err_status_ax()
700 rtw89_info(rtwdev, "R_AX_RX_ERR_FLAG [%d]=0x%08x\n", band, in rtw89_mac_dump_cmac_err_status_ax()
702 rtw89_info(rtwdev, "R_AX_RX_ERR_FLAG_IMR [%d]=0x%08x\n", band, in rtw89_mac_dump_cmac_err_status_ax()
705 rtw89_info(rtwdev, "R_AX_DLE_CTRL [%d]=0x%08x\n", band, in rtw89_mac_dump_cmac_err_status_ax()
712 rtw89_info(rtwdev, "R_AX_PHYINFO_ERR_ISR [%d]=0x%08x\n", band, in rtw89_mac_dump_cmac_err_status_ax()
714 rtw89_info(rtwdev, "R_AX_PHYINFO_ERR_IMR [%d]=0x%08x\n", band, in rtw89_mac_dump_cmac_err_status_ax()
717 rtw89_info(rtwdev, "R_AX_PHYINFO_ERR_IMR [%d]=0x%08x\n", band, in rtw89_mac_dump_cmac_err_status_ax()
723 rtw89_info(rtwdev, "R_AX_TXPWR_IMR [%d]=0x%08x\n", band, in rtw89_mac_dump_cmac_err_status_ax()
725 rtw89_info(rtwdev, "R_AX_TXPWR_ISR [%d]=0x%08x\n", band, in rtw89_mac_dump_cmac_err_status_ax()
731 rtw89_info(rtwdev, "R_AX_TRXPTCL_ERROR_INDICA [%d]=0x%08x\n", band, in rtw89_mac_dump_cmac_err_status_ax()
733 rtw89_info(rtwdev, "R_AX_TRXPTCL_ERROR_INDICA_MASK [%d]=0x%08x\n", band, in rtw89_mac_dump_cmac_err_status_ax()
736 rtw89_info(rtwdev, "R_AX_TMAC_ERR_IMR_ISR [%d]=0x%08x\n", band, in rtw89_mac_dump_cmac_err_status_ax()
739 rtw89_info(rtwdev, "R_AX_DBGSEL_TRXPTCL [%d]=0x%08x\n", band, in rtw89_mac_dump_cmac_err_status_ax()
743 rtw89_info(rtwdev, "R_AX_CMAC_ERR_IMR [%d]=0x%08x\n", band, in rtw89_mac_dump_cmac_err_status_ax()
757 rtw89_info(rtwdev, "--->\nerr=0x%x\n", err); in rtw89_mac_dump_err_status_ax()
758 rtw89_info(rtwdev, "R_AX_SER_DBG_INFO =0x%08x\n", in rtw89_mac_dump_err_status_ax()
760 rtw89_info(rtwdev, "R_AX_SER_DBG_INFO =0x%08x\n", in rtw89_mac_dump_err_status_ax()
762 rtw89_info(rtwdev, "DBG Counter 1 (R_AX_DRV_FW_HSK_4)=0x%08x\n", in rtw89_mac_dump_err_status_ax()
764 rtw89_info(rtwdev, "DBG Counter 2 (R_AX_DRV_FW_HSK_5)=0x%08x\n", in rtw89_mac_dump_err_status_ax()
786 ret = rtw89_mac_check_mac_en(rtwdev, 0, RTW89_DMAC_SEL); in rtw89_mac_suppress_log()
818 ret = read_poll_timeout(rtw89_read32, err, (err != 0), 1000, 100000, in rtw89_mac_get_err_status()
826 rtw89_write32(rtwdev, R_AX_HALT_C2H_CTRL, 0); in rtw89_mac_get_err_status()
850 int ret = 0; in rtw89_mac_set_err_status()
853 rtw89_err(rtwdev, "Bad set-err-status value 0x%08x\n", err); in rtw89_mac_set_err_status()
857 ret = read_poll_timeout(rtw89_read32, halt, (halt == 0x0), 1000, in rtw89_mac_set_err_status()
868 return 0; in rtw89_mac_set_err_status()
872 return 0; in rtw89_mac_set_err_status()
885 param->en = 0; in hfc_reset_param()
900 memset(¶m->ch_info, 0, sizeof(param->ch_info)); in hfc_reset_param()
901 memset(¶m->pub_info, 0, sizeof(param->pub_info)); in hfc_reset_param()
904 return 0; in hfc_reset_param()
923 return 0; in hfc_ch_cfg_chk()
934 return 0; in hfc_pub_info_chk()
939 return 0; in hfc_pub_info_chk()
950 return 0; in hfc_pub_cfg_chk()
959 int ret = 0; in hfc_ch_ctrl()
960 u32 val = 0; in hfc_ch_ctrl()
975 (cfg[ch].grp ? B_AX_GRP : 0); in hfc_ch_ctrl()
978 return 0; in hfc_ch_ctrl()
1005 return 0; in hfc_upd_ch_info()
1031 return 0; in hfc_pub_ctrl()
1058 param->en = val & B_AX_HCI_FC_EN ? 1 : 0; in hfc_get_mix_info_ax()
1059 param->h2c_en = val & B_AX_HCI_FC_CH12_EN ? 1 : 0; in hfc_get_mix_info_ax()
1105 return 0; in hfc_upd_mix_info()
1181 u32 ret = 0; in rtw89_mac_hfc_init()
1233 u8 val = 0; in pwr_cmd_poll()
1242 return 0; in pwr_cmd_poll()
1291 return 0; in rtw89_mac_sub_pwr_seq()
1306 return 0; in rtw89_mac_pwr_seq()
1383 return 0; in rtw89_mac_check_cpwm_state()
1403 return 0; in rtw89_mac_check_cpwm_state()
1418 for (i = 0; i < RPWM_TRY_CNT; i++) { in rtw89_mac_power_mode_change()
1489 return 0; in rtw89_mac_power_switch()
1500 u32 func_en = 0; in cmac_func_en_ax()
1501 u32 ck_en = 0; in cmac_func_en_ax()
1502 u32 c1pc_en = 0; in cmac_func_en_ax()
1541 return 0; in cmac_func_en_ax()
1575 return 0; in dmac_func_en_ax()
1586 return 0; in chip_func_en_ax()
1597 ret = cmac_func_en_ax(rtwdev, 0, true); in sys_init_ax()
1609 .hfc_preccfg_pcie = {2, 40, 0, 0, 1, 0, 0, 0},
1610 .hfc_prec_cfg_c0 = {2, 32, 0, 0, 0, 0, 0, 0},
1611 .hfc_prec_cfg_c2 = {0, 256, 0, 0, 0, 0, 0, 0},
1614 .wde_size0_v1 = {RTW89_WDE_PG_64, 3328, 0, 0,},
1616 .wde_size4 = {RTW89_WDE_PG_64, 0, 4096,},
1617 .wde_size4_v1 = {RTW89_WDE_PG_64, 0, 3328, 0,},
1619 .wde_size6 = {RTW89_WDE_PG_64, 512, 0,},
1623 .wde_size9 = {RTW89_WDE_PG_64, 0, 1024,},
1625 .wde_size18 = {RTW89_WDE_PG_64, 0, 2048,},
1627 .wde_size19 = {RTW89_WDE_PG_64, 3328, 0,},
1632 .ple_size3_v1 = {RTW89_PLE_PG_128, 2928, 0, 212992,},
1645 .wde_qt0 = {3792, 196, 0, 107,},
1646 .wde_qt0_v1 = {3302, 6, 0, 20,},
1648 .wde_qt4 = {0, 0, 0, 0,},
1650 .wde_qt6 = {448, 48, 0, 16,},
1652 .wde_qt7 = {446, 48, 0, 16,},
1654 .wde_qt17 = {0, 0, 0, 0,},
1656 .wde_qt18 = {3228, 60, 0, 40,},
1657 .wde_qt23 = {958, 48, 0, 16,},
1658 .ple_qt0 = {320, 320, 32, 16, 13, 13, 292, 292, 64, 18, 1, 4, 0,},
1659 .ple_qt1 = {320, 320, 32, 16, 1316, 1316, 1595, 1595, 1367, 1321, 1, 1307, 0,},
1661 .ple_qt4 = {264, 0, 16, 20, 26, 13, 356, 0, 32, 40, 8,},
1663 .ple_qt5 = {264, 0, 32, 20, 64, 13, 1101, 0, 64, 128, 120,},
1664 .ple_qt9 = {0, 0, 32, 256, 0, 0, 0, 0, 0, 0, 1, 0, 0,},
1666 .ple_qt13 = {0, 0, 16, 48, 0, 0, 0, 0, 0, 0, 0,},
1668 .ple_qt18 = {147, 0, 16, 20, 17, 13, 89, 0, 32, 14, 8, 0,},
1670 .ple_qt44 = {0, 0, 16, 256, 0, 0, 0, 0, 0, 0, 0, 0,},
1672 .ple_qt45 = {0, 0, 32, 256, 0, 0, 0, 0, 0, 0, 0, 0,},
1674 .ple_qt46 = {525, 0, 16, 20, 13, 13, 178, 0, 32, 62, 8, 16,},
1676 .ple_qt47 = {525, 0, 32, 20, 1034, 13, 1199, 0, 1053, 62, 160, 1037,},
1677 .ple_qt57 = {147, 0, 16, 20, 13, 13, 178, 0, 32, 14, 8, 0,},
1679 .ple_qt58 = {147, 0, 16, 20, 157, 13, 229, 0, 172, 14, 24, 0,},
1680 .ple_qt59 = {147, 0, 32, 20, 1860, 13, 2025, 0, 1879, 14, 24, 0,},
1682 .ple_qt_52a_wow = {264, 0, 32, 20, 64, 13, 1005, 0, 64, 128, 120,},
1684 .ple_qt_52b_wow = {147, 0, 16, 20, 157, 13, 133, 0, 172, 14, 24, 0,},
1686 .ple_qt_52bt_wow = {147, 0, 32, 20, 1860, 13, 1929, 0, 1879, 14, 24, 0,},
1688 .ple_qt_51b_wow = {147, 0, 16, 20, 157, 13, 133, 0, 172, 14, 24, 0,},
1689 .ple_rsvd_qt0 = {2, 107, 107, 6, 6, 6, 6, 0, 0, 0,},
1690 .ple_rsvd_qt1 = {0, 0, 0, 0, 0, 0, 0, 0, 0, 0,},
1691 .rsvd0_size0 = {212992, 0,},
1771 return 0; in rtw89_mac_get_dle_rsvd_qt_cfg()
1783 for (i = 0; i < grpnum; i++) { in mac_is_txq_empty_ax()
1791 for (j = 0 ; j < QEMP_ACQ_GRP_MACID_NUM; j++) { in mac_is_txq_empty_ax()
1883 u8 bound = 0; in dle_mix_cfg_ax()
1933 return 0; in dle_mix_cfg_ax()
1961 } while (0)
1974 SET_QUOTA(hif, WDE, 0); in wde_quota_cfg_ax()
1986 SET_QUOTA(cma0_tx, PLE, 0); in ple_quota_cfg_ax()
2008 return 0; in rtw89_mac_resize_ple_rx_quota()
2029 return 0; in rtw89_mac_resize_ple_rx_quota()
2121 return 0; in rtw89_mac_dle_init()
2124 rtw89_err(rtwdev, "[ERR]trxcfg wde 0x8900 = %x\n", in rtw89_mac_dle_init()
2126 rtw89_err(rtwdev, "[ERR]trxcfg ple 0x8D00 = %x\n", in rtw89_mac_dle_init()
2150 return 0; in preload_init_set()
2165 return 0; in rtw89_mac_preload_init()
2233 return 0; in sta_sch_init_ax()
2250 return 0; in mpdu_proc_init_ax()
2256 u32 val = 0; in sec_eng_init_ax()
2287 return 0; in sec_eng_init_ax()
2346 val |= u32_encode_bits(0x7f, B_AX_ADDR_CAM_RANGE_MASK) | in addr_cam_init_ax()
2357 return 0; in addr_cam_init_ax()
2398 return 0; in scheduler_init_ax()
2440 return 0; in rtw89_mac_typ_fltr_opt_ax()
2468 return 0; in rx_fltr_init_ax()
2534 return 0; in cca_ctrl_init_ax()
2544 return 0; in nav_ctrl_init_ax()
2561 return 0; in spatial_reuse_init_ax()
2583 return 0; in tmac_init_ax()
2627 return 0; in trxptcl_init_ax()
2638 ret = read_poll_timeout_atomic(rtw89_read32_mask, val32, val32 == 0, in rst_bacam()
2678 rtw89_write8_mask(rtwdev, reg, B_AX_CH_EN_MASK, 0x1); in rmac_init_ax()
2694 B_AX_RX_DLK_CCA_TIME_MASK, 0); in rmac_init_ax()
2717 val = u32_replace_bits(val, 0, B_AX_TXSC_20M_MASK); in cmac_com_init_ax()
2718 val = u32_replace_bits(val, 0, B_AX_TXSC_40M_MASK); in cmac_com_init_ax()
2719 val = u32_replace_bits(val, 0, B_AX_TXSC_80M_MASK); in cmac_com_init_ax()
2727 return 0; in cmac_com_init_ax()
2787 B_AX_AMPDU_MAX_LEN_VHT_MASK, 0x3FF80); in ptcl_init_ax()
2790 return 0; in ptcl_init_ax()
2799 return 0; in cmac_dma_init_ax()
2808 return 0; in cmac_dma_init_ax()
2899 struct rtw89_mac_h2c_info h2c_info = {0}; in rtw89_mac_read_phycap()
2905 h2c_info.content_len = 0; in rtw89_mac_read_phycap()
2925 struct rtw89_mac_c2h_info c2h_info = {0}; in rtw89_mac_setup_phycap()
2965 "phycap hal/phy/chip: tx_nss=0x%x/0x%x/0x%x rx_nss=0x%x/0x%x/0x%x\n", in rtw89_mac_setup_phycap()
2969 "ant num/bitmap: tx=%d/0x%x rx=%d/0x%x\n", in rtw89_mac_setup_phycap()
2974 return 0; in rtw89_mac_setup_phycap()
2981 struct rtw89_mac_c2h_info c2h_info = {0}; in rtw89_hw_sch_tx_en_h2c()
2982 struct rtw89_mac_h2c_info h2c_info = {0}; in rtw89_hw_sch_tx_en_h2c()
2999 return 0; in rtw89_hw_sch_tx_en_h2c()
3021 return 0; in rtw89_set_hw_sch_tx_en()
3039 return 0; in rtw89_set_hw_sch_tx_en_v1()
3052 ret = rtw89_set_hw_sch_tx_en(rtwdev, mac_idx, 0, in rtw89_mac_stop_sch_tx()
3059 0, B_AX_CTN_TXEN_HGQ); in rtw89_mac_stop_sch_tx()
3065 0, B_AX_CTN_TXEN_MGQ); in rtw89_mac_stop_sch_tx()
3070 ret = rtw89_set_hw_sch_tx_en(rtwdev, mac_idx, 0, in rtw89_mac_stop_sch_tx()
3076 return 0; in rtw89_mac_stop_sch_tx()
3079 return 0; in rtw89_mac_stop_sch_tx()
3093 ret = rtw89_set_hw_sch_tx_en_v1(rtwdev, mac_idx, 0, in rtw89_mac_stop_sch_tx_v1()
3100 0, B_AX_CTN_TXEN_HGQ); in rtw89_mac_stop_sch_tx_v1()
3106 0, B_AX_CTN_TXEN_MGQ); in rtw89_mac_stop_sch_tx_v1()
3111 ret = rtw89_set_hw_sch_tx_en_v1(rtwdev, mac_idx, 0, in rtw89_mac_stop_sch_tx_v1()
3117 return 0; in rtw89_mac_stop_sch_tx_v1()
3120 return 0; in rtw89_mac_stop_sch_tx_v1()
3132 return 0; in rtw89_mac_resume_sch_tx()
3145 return 0; in rtw89_mac_resume_sch_tx_v1()
3170 return 0; in dle_buf_req_ax()
3182 val = 0; in set_cpuio_ax()
3190 val = 0; in set_cpuio_ax()
3202 val = 0; in set_cpuio_ax()
3223 return 0; in set_cpuio_ax()
3251 struct rtw89_cpuio_ctrl ctrl_para = {0}; in dle_quota_change_ax()
3255 ret = mac->dle_buf_req(rtwdev, 0x20, true, &pkt_id); in dle_quota_change_ax()
3264 ctrl_para.pkt_num = 0; in dle_quota_change_ax()
3273 ret = mac->dle_buf_req(rtwdev, 0x20, false, &pkt_id); in dle_quota_change_ax()
3282 ctrl_para.pkt_num = 0; in dle_quota_change_ax()
3291 return 0; in dle_quota_change_ax()
3307 (val & B_AX_PTCL_TX_ON_STAT) == 0, in band_idle_ck_b()
3314 return 0; in band_idle_ck_b()
3320 u32 sleep_bak[4] = {0}; in band1_enable_ax()
3321 u32 pause_bak[4] = {0}; in band1_enable_ax()
3324 ret = rtw89_chip_stop_sch_tx(rtwdev, 0, &tx_en, RTW89_SCH_TX_SEL_ALL); in band1_enable_ax()
3330 for (i = 0; i < 4; i++) { in band1_enable_ax()
3337 ret = band_idle_ck_b(rtwdev, 0); in band1_enable_ax()
3349 for (i = 0; i < 4; i++) { in band1_enable_ax()
3354 ret = rtw89_chip_resume_sch_tx(rtwdev, 0, tx_en); in band1_enable_ax()
3375 return 0; in band1_enable_ax()
3610 return 0; in enable_imr_ax()
3626 int ret = 0; in dbcc_enable_ax()
3645 return 0; in dbcc_enable_ax()
3665 return 0; in set_host_rpr_ax()
3674 ret = dmac_init_ax(rtwdev, 0); in trx_init_ax()
3680 ret = cmac_init_ax(rtwdev, 0); in trx_init_ax()
3682 rtw89_err(rtwdev, "[ERR]CMAC%d init %d\n", 0, ret); in trx_init_ax()
3718 return 0; in trx_init_ax()
3730 return 0; in rtw89_mac_feat_init()
3732 offset = 0; in rtw89_mac_feat_init()
3740 return 0; in rtw89_mac_feat_init()
3786 rtw89_write32(rtwdev, R_AX_UDM1, 0); in rtw89_mac_enable_cpu_ax()
3787 rtw89_write32(rtwdev, R_AX_UDM2, 0); in rtw89_mac_enable_cpu_ax()
3788 rtw89_write32(rtwdev, R_AX_HALT_H2C_CTRL, 0); in rtw89_mac_enable_cpu_ax()
3789 rtw89_write32(rtwdev, R_AX_HALT_C2H_CTRL, 0); in rtw89_mac_enable_cpu_ax()
3790 rtw89_write32(rtwdev, R_AX_HALT_H2C, 0); in rtw89_mac_enable_cpu_ax()
3791 rtw89_write32(rtwdev, R_AX_HALT_C2H, 0); in rtw89_mac_enable_cpu_ax()
3807 B_AX_SEC_IDMEM_SIZE_CONFIG_MASK, 0x2); in rtw89_mac_enable_cpu_ax()
3821 return 0; in rtw89_mac_enable_cpu_ax()
3899 return 0; in rtw89_mac_enable_bb_rf()
3912 return 0; in rtw89_mac_disable_bb_rf()
3950 return 0; in rtw89_mac_partial_init()
4003 for (i = 0; i < 4; i++) { in rtw89_mac_dmac_tbl_init()
4006 rtw89_write32(rtwdev, R_AX_INDIR_ACCESS_ENTRY, 0); in rtw89_mac_dmac_tbl_init()
4017 rtw89_write32(rtwdev, R_AX_INDIR_ACCESS_ENTRY, 0x4); in rtw89_mac_cmac_tbl_init()
4018 rtw89_write32(rtwdev, R_AX_INDIR_ACCESS_ENTRY + 4, 0x400A0004); in rtw89_mac_cmac_tbl_init()
4019 rtw89_write32(rtwdev, R_AX_INDIR_ACCESS_ENTRY + 8, 0); in rtw89_mac_cmac_tbl_init()
4020 rtw89_write32(rtwdev, R_AX_INDIR_ACCESS_ENTRY + 12, 0); in rtw89_mac_cmac_tbl_init()
4021 rtw89_write32(rtwdev, R_AX_INDIR_ACCESS_ENTRY + 16, 0); in rtw89_mac_cmac_tbl_init()
4022 rtw89_write32(rtwdev, R_AX_INDIR_ACCESS_ENTRY + 20, 0xE43000B); in rtw89_mac_cmac_tbl_init()
4023 rtw89_write32(rtwdev, R_AX_INDIR_ACCESS_ENTRY + 24, 0); in rtw89_mac_cmac_tbl_init()
4024 rtw89_write32(rtwdev, R_AX_INDIR_ACCESS_ENTRY + 28, 0xB8109); in rtw89_mac_cmac_tbl_init()
4029 u8 sh = FIELD_GET(GENMASK(4, 0), macid); in rtw89_mac_set_macid_pause()
4038 return 0; in rtw89_mac_set_macid_pause()
4046 return 0; in rtw89_mac_set_macid_pause()
4095 ret = read_poll_timeout(rtw89_read32_mask, val, val == 0, 1000, 100000, in rtw89_mac_check_packet_ctrl()
4108 rtw89_write32_port_mask(rtwdev, rtwvif, p->bcn_area, B_AX_BCN_MSK_AREA_MASK, 0); in rtw89_mac_bcn_drop()
4109 rtw89_write32_port_mask(rtwdev, rtwvif, p->tbtt_prohib, B_AX_TBTT_HOLD_MASK, 0); in rtw89_mac_bcn_drop()
4128 #define BCN_MASK_DEF 0
4165 rtw89_write32_port(rtwdev, rtwvif, p->bcn_cnt_tmr, 0); in rtw89_mac_port_cfg_func_sw()
4300 u8 win = rtwvif->net_type == RTW89_NET_TYPE_AP_MODE ? 16 : 0; in rtw89_mac_port_cfg_hiq_win()
4398 if (port == 0) { in rtw89_mac_port_cfg_mbssid()
4416 if (port == 0) in rtw89_mac_port_cfg_hiq_drop()
4417 val &= ~BIT(0); in rtw89_mac_port_cfg_hiq_drop()
4503 u8 offset = 100, vif_aps = 0; in rtw89_mac_port_tsf_resync_all()
4513 if (vif_aps == 0) in rtw89_mac_port_tsf_resync_all()
4561 return 0; in rtw89_mac_vif_init()
4578 return 0; in rtw89_mac_vif_deinit()
4612 return 0; in rtw89_mac_port_update()
4631 return 0; in rtw89_mac_port_get_tsf()
4697 return 0; in rtw89_mac_add_vif()
5162 for (i = 0; i < rpt->num; i++) { in rtw89_mac_c2h_mrc_tsf_rpt()
5271 "MRC C2H STS RPT: tx null-0 fail\n"); in rtw89_mac_c2h_mrc_status_rpt()
5445 rtw89_err(rtwdev, "[TXPWR] addr=0x%x exceed txpwr cr\n", in rtw89_mac_get_txpwr_cr_ax()
5453 "[TXPWR] addr=0x%x but hw not enable\n", in rtw89_mac_get_txpwr_cr_ax()
5462 rtw89_err(rtwdev, "[TXPWR] check txpwr cr 0x%x(phy%d) fail\n", in rtw89_mac_get_txpwr_cr_ax()
5480 return 0; in rtw89_mac_cfg_ppdu_status_ax()
5490 return 0; in rtw89_mac_cfg_ppdu_status_ax()
5615 val = val | BIT(1) | BIT(0); in rtw89_mac_coex_init()
5627 return 0; in rtw89_mac_coex_init()
5655 return 0; in rtw89_mac_coex_init_v1()
5662 u32 val = 0, ret; in rtw89_mac_cfg_gnt()
5664 if (gnt_cfg->band[0].gnt_bt) in rtw89_mac_cfg_gnt()
5667 if (gnt_cfg->band[0].gnt_bt_sw_en) in rtw89_mac_cfg_gnt()
5670 if (gnt_cfg->band[0].gnt_wl) in rtw89_mac_cfg_gnt()
5673 if (gnt_cfg->band[0].gnt_wl_sw_en) in rtw89_mac_cfg_gnt()
5694 return 0; in rtw89_mac_cfg_gnt()
5701 u32 val = 0; in rtw89_mac_cfg_gnt_v1()
5703 if (gnt_cfg->band[0].gnt_bt) in rtw89_mac_cfg_gnt_v1()
5709 if (gnt_cfg->band[0].gnt_bt_sw_en) in rtw89_mac_cfg_gnt_v1()
5713 if (gnt_cfg->band[0].gnt_wl) in rtw89_mac_cfg_gnt_v1()
5717 if (gnt_cfg->band[0].gnt_wl_sw_en) in rtw89_mac_cfg_gnt_v1()
5741 return 0; in rtw89_mac_cfg_gnt_v1()
5757 val = (plt->tx & RTW89_MAC_AX_PLT_LTE_RX ? B_AX_TX_PLT_GNT_LTE_RX : 0) | in rtw89_mac_cfg_plt_ax()
5758 (plt->tx & RTW89_MAC_AX_PLT_GNT_BT_TX ? B_AX_TX_PLT_GNT_BT_TX : 0) | in rtw89_mac_cfg_plt_ax()
5759 (plt->tx & RTW89_MAC_AX_PLT_GNT_BT_RX ? B_AX_TX_PLT_GNT_BT_RX : 0) | in rtw89_mac_cfg_plt_ax()
5760 (plt->tx & RTW89_MAC_AX_PLT_GNT_WL ? B_AX_TX_PLT_GNT_WL : 0) | in rtw89_mac_cfg_plt_ax()
5761 (plt->rx & RTW89_MAC_AX_PLT_LTE_RX ? B_AX_RX_PLT_GNT_LTE_RX : 0) | in rtw89_mac_cfg_plt_ax()
5762 (plt->rx & RTW89_MAC_AX_PLT_GNT_BT_TX ? B_AX_RX_PLT_GNT_BT_TX : 0) | in rtw89_mac_cfg_plt_ax()
5763 (plt->rx & RTW89_MAC_AX_PLT_GNT_BT_RX ? B_AX_RX_PLT_GNT_BT_RX : 0) | in rtw89_mac_cfg_plt_ax()
5764 (plt->rx & RTW89_MAC_AX_PLT_GNT_WL ? B_AX_RX_PLT_GNT_WL : 0) | in rtw89_mac_cfg_plt_ax()
5768 return 0; in rtw89_mac_cfg_plt_ax()
5802 return 0; in rtw89_mac_cfg_ctrl_path()
5814 return 0; in rtw89_mac_cfg_ctrl_path_v1()
5816 for (i = 0; i < RTW89_PHY_MAX; i++) { in rtw89_mac_cfg_ctrl_path_v1()
5820 g[i].gnt_wl = 0; in rtw89_mac_cfg_ctrl_path_v1()
5830 u8 val = 0; in rtw89_mac_get_ctrl_path()
5902 /* STA mode set tx gid to 0(default) */ in rtw89_mac_init_bfee_ax()
5930 return 0; in rtw89_mac_init_bfee_ax()
5939 u8 nc = 1, nr = 3, ng = 0, cb = 1, cs = 1, ldpc_en = 1, stbc_en = 1; in rtw89_mac_set_csi_para_reg_ax()
5981 if (port_sel == 0) in rtw89_mac_set_csi_para_reg_ax()
5988 return 0; in rtw89_mac_set_csi_para_reg_ax()
6027 return 0; in rtw89_mac_csi_rrsc_ax()
6065 le32_to_cpu(p[0])); in rtw89_mac_bf_set_gid_table()
6072 le32_to_cpu(p[0])); in rtw89_mac_bf_set_gid_table()
6109 data.count = 0; in rtw89_mac_bf_monitor_calc()
6154 u32 max_tx_time = tx_time == 0 ? MAC_AX_DFLT_TX_TIME : tx_time; in __rtw89_mac_set_tx_time()
6156 int ret = 0; in __rtw89_mac_set_tx_time()
6179 int ret = 0; in rtw89_mac_set_tx_time()
6197 int ret = 0; in rtw89_mac_get_tx_time()
6219 int ret = 0; in rtw89_mac_set_tx_retry_limit()
6239 int ret = 0; in rtw89_mac_get_tx_retry_limit()
6276 return 0; in rtw89_mac_set_hw_muedca_ctrl()
6300 return 0; in rtw89_mac_write_xtal_si_ax()
6310 FIELD_PREP(B_AX_WL_XTAL_SI_DATA_MASK, 0x00) | in rtw89_mac_read_xtal_si_ax()
6311 FIELD_PREP(B_AX_WL_XTAL_SI_BITMASK_MASK, 0x00) | in rtw89_mac_read_xtal_si_ax()
6325 return 0; in rtw89_mac_read_xtal_si_ax()
6338 struct rtw89_pkt_drop_params params = {0}; in rtw89_mac_pkt_drop_sta()
6344 params.mbssid = 0; in rtw89_mac_pkt_drop_sta()
6347 for (i = 0; i < ARRAY_SIZE(sels); i++) { in rtw89_mac_pkt_drop_sta()
6377 struct rtw89_pkt_drop_params params = {0}; in rtw89_mac_ptk_drop_by_band_and_wait()
6379 int i, ret = 0, try_cnt = 3; in rtw89_mac_ptk_drop_by_band_and_wait()
6384 for (i = 0; i < try_cnt; i++) { in rtw89_mac_ptk_drop_by_band_and_wait()
6390 return 0; in rtw89_mac_ptk_drop_by_band_and_wait()
6432 rtw89_write32(rtwdev, R_AX_ACTION_FWD0, 0); in rtw89_wow_config_mac_ax()
6433 rtw89_write32(rtwdev, R_AX_ACTION_FWD1, 0); in rtw89_wow_config_mac_ax()
6434 rtw89_write32(rtwdev, R_AX_TF_FWD, 0); in rtw89_wow_config_mac_ax()
6435 rtw89_write32(rtwdev, R_AX_HW_RPT_FWD, 0); in rtw89_wow_config_mac_ax()
6456 return 0; in rtw89_wow_config_mac_ax()