Lines Matching refs:rtw_write32_mask

189 	rtw_write32_mask(rtwdev, REG_AFE_XTAL_CTRL, 0x7e000000, crystal_cap);  in rtw8821c_phy_set_param()
190 rtw_write32_mask(rtwdev, REG_AFE_PLL_CTRL, 0x7e, crystal_cap); in rtw8821c_phy_set_param()
191 rtw_write32_mask(rtwdev, REG_CCK0_FAREPORT, BIT(18) | BIT(22), 0); in rtw8821c_phy_set_param()
289 rtw_write32_mask(rtwdev, REG_ENRXCCA, MASKBYTE2, BTG_CCA); in rtw8821c_switch_rf_set()
290 rtw_write32_mask(rtwdev, REG_ENTXCCK, MASKLWORD, BTG_LNA); in rtw8821c_switch_rf_set()
295 rtw_write32_mask(rtwdev, REG_ENRXCCA, MASKBYTE2, WLG_CCA); in rtw8821c_switch_rf_set()
296 rtw_write32_mask(rtwdev, REG_ENTXCCK, MASKLWORD, WLG_LNA); in rtw8821c_switch_rf_set()
365 rtw_write32_mask(rtwdev, REG_ACBB0, BIT(29) | BIT(28), 0x2); in rtw8821c_set_channel_rxdfir()
366 rtw_write32_mask(rtwdev, REG_ACBBRXFIR, BIT(29) | BIT(28), 0x2); in rtw8821c_set_channel_rxdfir()
367 rtw_write32_mask(rtwdev, REG_TXDFIR, BIT(31), 0x0); in rtw8821c_set_channel_rxdfir()
368 rtw_write32_mask(rtwdev, REG_CHFIR, BIT(31), 0x0); in rtw8821c_set_channel_rxdfir()
371 rtw_write32_mask(rtwdev, REG_ACBB0, BIT(29) | BIT(28), 0x2); in rtw8821c_set_channel_rxdfir()
372 rtw_write32_mask(rtwdev, REG_ACBBRXFIR, BIT(29) | BIT(28), 0x1); in rtw8821c_set_channel_rxdfir()
373 rtw_write32_mask(rtwdev, REG_TXDFIR, BIT(31), 0x0); in rtw8821c_set_channel_rxdfir()
374 rtw_write32_mask(rtwdev, REG_CHFIR, BIT(31), 0x1); in rtw8821c_set_channel_rxdfir()
377 rtw_write32_mask(rtwdev, REG_ACBB0, BIT(29) | BIT(28), 0x2); in rtw8821c_set_channel_rxdfir()
378 rtw_write32_mask(rtwdev, REG_ACBBRXFIR, BIT(29) | BIT(28), 0x2); in rtw8821c_set_channel_rxdfir()
379 rtw_write32_mask(rtwdev, REG_TXDFIR, BIT(31), 0x1); in rtw8821c_set_channel_rxdfir()
380 rtw_write32_mask(rtwdev, REG_CHFIR, BIT(31), 0x0); in rtw8821c_set_channel_rxdfir()
389 rtw_write32_mask(rtwdev, REG_CCA_FLTR, MASKHWORD, 0xe82c); in rtw8821c_cck_tx_filter_srrc()
390 rtw_write32_mask(rtwdev, REG_TXSF2, MASKDWORD, 0x0000b81c); in rtw8821c_cck_tx_filter_srrc()
391 rtw_write32_mask(rtwdev, REG_TXSF6, MASKLWORD, 0x0000); in rtw8821c_cck_tx_filter_srrc()
392 rtw_write32_mask(rtwdev, REG_TXFILTER, MASKDWORD, 0x00003667); in rtw8821c_cck_tx_filter_srrc()
406 rtw_write32_mask(rtwdev, REG_CCA_FLTR, MASKHWORD, 0xf8fe); in rtw8821c_cck_tx_filter_srrc()
407 rtw_write32_mask(rtwdev, REG_TXSF2, MASKDWORD, 0x64b80c1c); in rtw8821c_cck_tx_filter_srrc()
408 rtw_write32_mask(rtwdev, REG_TXSF6, MASKLWORD, 0x8810); in rtw8821c_cck_tx_filter_srrc()
409 rtw_write32_mask(rtwdev, REG_TXFILTER, MASKDWORD, 0x01235667); in rtw8821c_cck_tx_filter_srrc()
422 rtw_write32_mask(rtwdev, REG_CCA_FLTR, MASKHWORD, 0xe82c); in rtw8821c_cck_tx_filter_srrc()
423 rtw_write32_mask(rtwdev, REG_TXSF2, MASKDWORD, in rtw8821c_cck_tx_filter_srrc()
425 rtw_write32_mask(rtwdev, REG_TXSF6, MASKLWORD, in rtw8821c_cck_tx_filter_srrc()
427 rtw_write32_mask(rtwdev, REG_TXFILTER, MASKDWORD, in rtw8821c_cck_tx_filter_srrc()
450 rtw_write32_mask(rtwdev, REG_RXPSEL, BIT(28), 0x1); in rtw8821c_set_channel_bb()
451 rtw_write32_mask(rtwdev, REG_CCK_CHECK, BIT(7), 0x0); in rtw8821c_set_channel_bb()
452 rtw_write32_mask(rtwdev, REG_ENTXCCK, BIT(18), 0x0); in rtw8821c_set_channel_bb()
453 rtw_write32_mask(rtwdev, REG_RXCCAMSK, 0x0000FC00, 15); in rtw8821c_set_channel_bb()
455 rtw_write32_mask(rtwdev, REG_TXSCALE_A, 0xf00, 0x0); in rtw8821c_set_channel_bb()
456 rtw_write32_mask(rtwdev, REG_CLKTRK, 0x1ffe0000, 0x96a); in rtw8821c_set_channel_bb()
465 rtw_write32_mask(rtwdev, REG_TXSF2, MASKDWORD, 0x0000b81c); in rtw8821c_set_channel_bb()
466 rtw_write32_mask(rtwdev, REG_TXSF6, MASKLWORD, 0x0000); in rtw8821c_set_channel_bb()
467 rtw_write32_mask(rtwdev, REG_TXFILTER, MASKDWORD, 0x00003667); in rtw8821c_set_channel_bb()
469 rtw_write32_mask(rtwdev, REG_TXSF2, MASKDWORD, in rtw8821c_set_channel_bb()
471 rtw_write32_mask(rtwdev, REG_TXSF6, MASKLWORD, in rtw8821c_set_channel_bb()
473 rtw_write32_mask(rtwdev, REG_TXFILTER, MASKDWORD, in rtw8821c_set_channel_bb()
477 rtw_write32_mask(rtwdev, REG_ENTXCCK, BIT(18), 0x1); in rtw8821c_set_channel_bb()
478 rtw_write32_mask(rtwdev, REG_CCK_CHECK, BIT(7), 0x1); in rtw8821c_set_channel_bb()
479 rtw_write32_mask(rtwdev, REG_RXPSEL, BIT(28), 0x0); in rtw8821c_set_channel_bb()
480 rtw_write32_mask(rtwdev, REG_RXCCAMSK, 0x0000FC00, 15); in rtw8821c_set_channel_bb()
483 rtw_write32_mask(rtwdev, REG_TXSCALE_A, 0xf00, 0x1); in rtw8821c_set_channel_bb()
485 rtw_write32_mask(rtwdev, REG_TXSCALE_A, 0xf00, 0x2); in rtw8821c_set_channel_bb()
487 rtw_write32_mask(rtwdev, REG_TXSCALE_A, 0xf00, 0x3); in rtw8821c_set_channel_bb()
490 rtw_write32_mask(rtwdev, REG_CLKTRK, 0x1ffe0000, 0x494); in rtw8821c_set_channel_bb()
492 rtw_write32_mask(rtwdev, REG_CLKTRK, 0x1ffe0000, 0x453); in rtw8821c_set_channel_bb()
494 rtw_write32_mask(rtwdev, REG_CLKTRK, 0x1ffe0000, 0x452); in rtw8821c_set_channel_bb()
496 rtw_write32_mask(rtwdev, REG_CLKTRK, 0x1ffe0000, 0x412); in rtw8821c_set_channel_bb()
506 rtw_write32_mask(rtwdev, REG_ADCCLK, MASKDWORD, val32); in rtw8821c_set_channel_bb()
508 rtw_write32_mask(rtwdev, REG_ADC160, BIT(30), 0x1); in rtw8821c_set_channel_bb()
520 rtw_write32_mask(rtwdev, REG_ADCCLK, MASKDWORD, val32); in rtw8821c_set_channel_bb()
522 rtw_write32_mask(rtwdev, REG_ADC160, BIT(30), 0x1); in rtw8821c_set_channel_bb()
529 rtw_write32_mask(rtwdev, REG_ADCCLK, MASKDWORD, val32); in rtw8821c_set_channel_bb()
531 rtw_write32_mask(rtwdev, REG_ADC160, BIT(30), 0x1); in rtw8821c_set_channel_bb()
537 rtw_write32_mask(rtwdev, REG_ADCCLK, MASKDWORD, val32); in rtw8821c_set_channel_bb()
539 rtw_write32_mask(rtwdev, REG_ADC160, BIT(30), 0x0); in rtw8821c_set_channel_bb()
540 rtw_write32_mask(rtwdev, REG_ADC40, BIT(31), 0x1); in rtw8821c_set_channel_bb()
546 rtw_write32_mask(rtwdev, REG_ADCCLK, MASKDWORD, val32); in rtw8821c_set_channel_bb()
548 rtw_write32_mask(rtwdev, REG_ADC160, BIT(30), 0x0); in rtw8821c_set_channel_bb()
549 rtw_write32_mask(rtwdev, REG_ADC40, BIT(31), 0x1); in rtw8821c_set_channel_bb()
571 rtw_write32_mask(rtwdev, REG_TXSCALE_A, GENMASK(31, 21), in rtw8821c_set_channel_bb_swing()
925 rtw_write32_mask(rtwdev, REG_RFE_CTRL8, BIT_MASK_R_RFE_SEL_15, in rtw8821c_coex_cfg_ant_switch()
936 rtw_write32_mask(rtwdev, REG_RFE_CTRL8, BIT_MASK_R_RFE_SEL_15, in rtw8821c_coex_cfg_ant_switch()
1104 rtw_write32_mask(rtwdev, REG_TXAGCIDX, GENMASK(6, 1), txagc_idx); in rtw8821c_pwrtrack_set_pwr()
1105 rtw_write32_mask(rtwdev, REG_TXSCALE_A, GENMASK(31, 21), in rtw8821c_pwrtrack_set_pwr()
1245 rtw_write32_mask(rtwdev, REG_PWRTH, 0x3f0000, pd[new_lvl]); in rtw8821c_phy_cck_pd_set()
1246 rtw_write32_mask(rtwdev, REG_PWRTH2, 0x1f0000, in rtw8821c_phy_cck_pd_set()