Lines Matching +full:0 +full:xf0ffffff
75 rtw_write8_set(rtwdev, REG_LIFETIME_EN, 0xf); in rtw_coex_limited_tx()
76 rtw_write16(rtwdev, REG_RETRY_LIMIT, 0x0808); in rtw_coex_limited_tx()
79 rtw_write32(rtwdev, REG_DARFRC, 0x1000000); in rtw_coex_limited_tx()
80 rtw_write32(rtwdev, REG_DARFRCH, 0x4030201); in rtw_coex_limited_tx()
83 rtw_write8_clr(rtwdev, REG_LIFETIME_EN, 0xf); in rtw_coex_limited_tx()
91 rtw_write8(rtwdev, REG_AMPDU_MAX_TIME_V1, 0x20); in rtw_coex_limited_tx()
132 COEX_RSSI_HIGH(coex_dm->bt_rssi_state[0])) in rtw_coex_freerun_check()
136 bt_rssi = coex_dm->bt_rssi_state[0]; in rtw_coex_freerun_check()
152 u8 para[6] = {0}; in rtw_coex_wl_slot_extend()
154 para[0] = COEX_H2C69_WL_LEAKAP; in rtw_coex_wl_slot_extend()
160 coex_stat->cnt_wl[COEX_CNT_WL_5MS_NOEXTEND] = 0; in rtw_coex_wl_slot_extend()
163 rtw_fw_bt_wifi_control(rtwdev, para[0], ¶[1]); in rtw_coex_wl_slot_extend()
177 "[BTCoex], set h2c 0x69 opcode 12 to turn off 5ms WL slot extend!!\n"); in rtw_coex_wl_ccklock_action()
187 coex_stat->cnt_wl[COEX_CNT_WL_5MS_NOEXTEND] = 0; in rtw_coex_wl_ccklock_action()
195 "[BTCoex], set h2c 0x69 opcode 12 to turn off 5ms WL slot extend!!\n"); in rtw_coex_wl_ccklock_action()
200 "[BTCoex], set h2c 0x69 opcode 12 to turn on 5ms WL slot extend!!\n"); in rtw_coex_wl_ccklock_action()
275 coex_stat->cnt_wl[COEX_CNT_WL_NOISY0] = 0; in rtw_coex_wl_noisy_detect()
276 coex_stat->cnt_wl[COEX_CNT_WL_NOISY1] = 0; in rtw_coex_wl_noisy_detect()
283 coex_stat->cnt_wl[COEX_CNT_WL_NOISY1] = 0; in rtw_coex_wl_noisy_detect()
284 coex_stat->cnt_wl[COEX_CNT_WL_NOISY2] = 0; in rtw_coex_wl_noisy_detect()
291 coex_stat->cnt_wl[COEX_CNT_WL_NOISY0] = 0; in rtw_coex_wl_noisy_detect()
292 coex_stat->cnt_wl[COEX_CNT_WL_NOISY2] = 0; in rtw_coex_wl_noisy_detect()
301 coex_stat->wl_noisy_level = 0; in rtw_coex_wl_noisy_detect()
312 u8 para[2] = {0}; in rtw_coex_tdma_timer_base()
321 para[0] = COEX_H2C69_TDMA_SLOT; in rtw_coex_tdma_timer_base()
328 } else if (tbtt_interval < 80 && tbtt_interval > 0) { in rtw_coex_tdma_timer_base()
330 if (100 % tbtt_interval != 0) in rtw_coex_tdma_timer_base()
345 rtw_fw_bt_wifi_control(rtwdev, para[0], ¶[1]); in rtw_coex_tdma_timer_base()
347 rtw_dbg(rtwdev, RTW_DBG_COEX, "[BTCoex], %s(): h2c_0x69 = 0x%x\n", in rtw_coex_tdma_timer_base()
371 u16 val = 0x2; in rtw_coex_write_scbd()
406 return 0; in rtw_coex_read_scbd()
417 u8 cnt = 0; in rtw_coex_check_rfk()
422 coex_stat->bt_iqk_state != 0xff) { in rtw_coex_check_rfk()
445 coex_stat->bt_iqk_state = 0xff; in rtw_coex_check_rfk()
510 coex_stat->bt_ble_scan_type = 0; in rtw_coex_monitor_bt_enable()
511 coex_dm->cur_bt_lna_lvl = 0; in rtw_coex_monitor_bt_enable()
566 for (i = 0; i < 4; i++) { in rtw_coex_update_wl_link_info()
621 if (payload[0] != COEX_RESP_ACK_BY_WL_FW) { in rtw_coex_info_response()
658 struct rtw_coex_info_req req = {0}; in rtw_coex_get_bt_scan_type()
676 struct rtw_coex_info_req req = {0}; in rtw_coex_set_lna_constrain_level()
718 for (i = 0; i < COEX_RSSI_STEP; i++) { in rtw_coex_update_bt_link_info()
728 coex_stat->cnt_bt[COEX_CNT_BT_INFOUPDATE] % 3 == 0) { in rtw_coex_update_bt_link_info()
733 if ((coex_stat->bt_ble_scan_type & 0x1) == 0x1) in rtw_coex_update_bt_link_info()
740 coex_stat->bt_profile_num = 0; in rtw_coex_update_bt_link_info()
812 u8 link = 0; in rtw_coex_update_wl_ch_info()
813 u8 center_chan = 0; in rtw_coex_update_wl_ch_info()
822 if (center_chan == 0 || in rtw_coex_update_wl_ch_info()
825 link = 0; in rtw_coex_update_wl_ch_info()
826 center_chan = 0; in rtw_coex_update_wl_ch_info()
827 bw = 0; in rtw_coex_update_wl_ch_info()
829 link = 0x1; in rtw_coex_update_wl_ch_info()
836 for (i = 0; i < chip->afh_5g_num; i++) { in rtw_coex_update_wl_ch_info()
838 link = 0x3; in rtw_coex_update_wl_ch_info()
846 coex_dm->wl_ch_info[0] = link; in rtw_coex_update_wl_ch_info()
852 "[BTCoex], %s: para[0:2] = 0x%x 0x%x 0x%x\n", __func__, link, in rtw_coex_update_wl_ch_info()
895 u8 offset = 0; in rtw_coex_set_rf_para()
912 return 0; in rtw_coex_read_indirect_reg()
953 rtw_coex_write_indirect_reg(rtwdev, LTE_COEX_CTRL, 0xc000, state); in rtw_coex_set_gnt_bt()
954 rtw_coex_write_indirect_reg(rtwdev, LTE_COEX_CTRL, 0x0c00, state); in rtw_coex_set_gnt_bt()
959 rtw_coex_write_indirect_reg(rtwdev, LTE_COEX_CTRL, 0x3000, state); in rtw_coex_set_gnt_wl()
960 rtw_coex_write_indirect_reg(rtwdev, LTE_COEX_CTRL, 0x0300, state); in rtw_coex_set_gnt_wl()
985 u8 h2c_para[6] = {0}; in rtw_btc_wltoggle_table_a()
986 u32 table_wl = 0x5a5a5a5a; in rtw_btc_wltoggle_table_a()
988 h2c_para[0] = COEX_H2C69_TOGGLE_TABLE_A; in rtw_btc_wltoggle_table_a()
990 h2c_para[1] = 0x1; in rtw_btc_wltoggle_table_a()
1001 h2c_para[2] = (u8)u32_get_bits(table_wl, GENMASK(7, 0)); in rtw_btc_wltoggle_table_a()
1006 rtw_fw_bt_wifi_control(rtwdev, h2c_para[0], &h2c_para[1]); in rtw_btc_wltoggle_table_a()
1010 __func__, h2c_para[0], h2c_para[1], h2c_para[2], in rtw_btc_wltoggle_table_a()
1014 #define COEX_WL_SLOT_TOGLLE 0x5a5a5aaa
1020 u8 cur_h2c_para[6] = {0}; in rtw_btc_wltoggle_table_b()
1023 cur_h2c_para[0] = COEX_H2C69_TOGGLE_TABLE_B; in rtw_btc_wltoggle_table_b()
1025 cur_h2c_para[2] = (u8)u32_get_bits(table, GENMASK(7, 0)); in rtw_btc_wltoggle_table_b()
1032 for (i = 0; i <= 5; i++) in rtw_btc_wltoggle_table_b()
1035 rtw_fw_bt_wifi_control(rtwdev, cur_h2c_para[0], &cur_h2c_para[1]); in rtw_btc_wltoggle_table_b()
1039 __func__, cur_h2c_para[0], cur_h2c_para[1], cur_h2c_para[2], in rtw_btc_wltoggle_table_b()
1046 #define DEF_BRK_TABLE_VAL 0xf0ffffff in rtw_coex_set_table()
1061 "[BTCoex], %s(): 0x6c0 = %x, 0x6c4 = %x\n", __func__, table0, in rtw_coex_set_table()
1108 u8 lps_mode = 0x0; in rtw_coex_power_save_state()
1123 rtw_fw_coex_tdma_type(rtwdev, 0, 0, 0, 0, 0); in rtw_coex_power_save_state()
1155 rtw_coex_power_save_state(rtwdev, ps_type, 0x0, 0x0); in rtw_coex_set_tdma()
1159 "[BTCoex], %s(): Force LPS (byte1 = 0x%x)\n", __func__, in rtw_coex_set_tdma()
1166 rtw_coex_power_save_state(rtwdev, ps_type, 0x50, 0x4); in rtw_coex_set_tdma()
1169 "[BTCoex], %s(): native power save (byte1 = 0x%x)\n", in rtw_coex_set_tdma()
1173 rtw_coex_power_save_state(rtwdev, ps_type, 0x0, 0x0); in rtw_coex_set_tdma()
1176 coex_dm->ps_tdma_para[0] = byte1; in rtw_coex_set_tdma()
1209 type = (u8)(tcase & 0xff); in rtw_coex_tdma()
1211 turn_on = (type == 0 || type == 100) ? false : true; in rtw_coex_tdma()
1238 chip->tdma_sant[type].para[0], in rtw_coex_tdma()
1247 chip->tdma_nsant[n].para[0], in rtw_coex_tdma()
1277 "[BTCoex], coex_stat->bt_disabled = 0x%x\n", in rtw_coex_set_ant_path()
1464 u8 profile_map = 0; in rtw_coex_algorithm()
1506 if (coex_stat->bt_hid_pair_num > 0) in rtw_coex_algorithm()
1533 rtw_coex_set_rf_para(rtwdev, chip->wl_rf_para_rx[0]); in rtw_coex_action_coex_all_off()
1538 tdma_case = 0; in rtw_coex_action_coex_all_off()
1556 u8 level = 0; in rtw_coex_action_freerun()
1573 if (COEX_RSSI_HIGH(coex_dm->wl_rssi_state[0])) in rtw_coex_action_freerun()
1603 rtw_coex_set_rf_para(rtwdev, chip->wl_rf_para_rx[0]); in rtw_coex_action_rf4ce()
1628 rtw_coex_set_rf_para(rtwdev, chip->wl_rf_para_rx[0]); in rtw_coex_action_bt_whql_test()
1633 tdma_case = 0; in rtw_coex_action_bt_whql_test()
1651 u32 slot_type = 0; in rtw_coex_action_bt_relink()
1656 rtw_coex_set_rf_para(rtwdev, chip->wl_rf_para_rx[0]); in rtw_coex_action_bt_relink()
1670 tdma_case = 0; in rtw_coex_action_bt_relink()
1692 u8 table_case = 0xff, tdma_case = 0xff; in rtw_coex_action_bt_idle()
1695 rtw_coex_set_rf_para(rtwdev, chip->wl_rf_para_rx[0]); in rtw_coex_action_bt_idle()
1702 table_case = 0; in rtw_coex_action_bt_idle()
1703 tdma_case = 0; in rtw_coex_action_bt_idle()
1710 if (table_case != 0xff && tdma_case != 0xff) { in rtw_coex_action_bt_idle()
1738 } else if ((coex_stat->bt_ble_scan_type & 0x2) && in rtw_coex_action_bt_idle()
1761 u32 slot_type = 0; in rtw_coex_action_bt_inquiry()
1765 rtw_coex_set_rf_para(rtwdev, chip->wl_rf_para_rx[0]); in rtw_coex_action_bt_inquiry()
1778 if (coex_stat->bt_profile_num > 0) in rtw_coex_action_bt_inquiry()
1789 if (coex_stat->bt_profile_num == 0) { in rtw_coex_action_bt_inquiry()
1811 tdma_case = 0; in rtw_coex_action_bt_inquiry()
1820 if (coex_stat->bt_profile_num > 0) in rtw_coex_action_bt_inquiry()
1872 table_case = 0; in rtw_coex_action_bt_game_hid()
1878 tdma_case = 0; in rtw_coex_action_bt_game_hid()
1894 rtw_coex_set_rf_para(rtwdev, chip->wl_rf_para_rx[0]); in rtw_coex_action_bt_game_hid()
1911 rtw_coex_set_rf_para(rtwdev, chip->wl_rf_para_rx[0]); in rtw_coex_action_bt_hfp()
1939 u32 slot_type = 0; in rtw_coex_action_bt_hid()
1944 rtw_coex_set_rf_para(rtwdev, chip->wl_rf_para_rx[0]); in rtw_coex_action_bt_hid()
2023 u32 slot_type = 0; in rtw_coex_action_bt_a2dp()
2028 rtw_coex_set_rf_para(rtwdev, chip->wl_rf_para_rx[0]); in rtw_coex_action_bt_a2dp()
2034 if (coex_stat->wl_gl_busy && coex_stat->wl_noisy_level == 0) in rtw_coex_action_bt_a2dp()
2069 rtw_coex_set_rf_para(rtwdev, chip->wl_rf_para_rx[0]); in rtw_coex_action_bt_a2dpsink()
2074 tdma_case = 0; in rtw_coex_action_bt_a2dpsink()
2106 rtw_coex_set_rf_para(rtwdev, chip->wl_rf_para_rx[0]); in rtw_coex_action_bt_pan()
2110 if (coex_stat->wl_gl_busy && coex_stat->wl_noisy_level == 0) in rtw_coex_action_bt_pan()
2140 u8 table_case, tdma_case, interval = 0; in rtw_coex_action_bt_a2dp_hid()
2141 u32 slot_type = 0; in rtw_coex_action_bt_a2dp_hid()
2148 rtw_coex_set_rf_para(rtwdev, chip->wl_rf_para_rx[0]); in rtw_coex_action_bt_a2dp_hid()
2201 rtw_coex_set_rf_para(rtwdev, chip->wl_rf_para_rx[0]); in rtw_coex_action_bt_a2dp_pan()
2205 coex_stat->wl_noisy_level == 0) in rtw_coex_action_bt_a2dp_pan()
2224 rtw_coex_set_rf_para(rtwdev, chip->wl_rf_para_rx[0]); in rtw_coex_action_bt_a2dp_pan()
2240 rtw_coex_set_rf_para(rtwdev, chip->wl_rf_para_rx[0]); in rtw_coex_action_bt_pan_hid()
2274 rtw_coex_set_rf_para(rtwdev, chip->wl_rf_para_rx[0]); in rtw_coex_action_bt_a2dp_pan_hid()
2309 rtw_coex_set_rf_para(rtwdev, chip->wl_rf_para_rx[0]); in rtw_coex_action_wl_under5g()
2318 table_case = 0; in rtw_coex_action_wl_under5g()
2319 tdma_case = 0; in rtw_coex_action_wl_under5g()
2338 rtw_coex_set_rf_para(rtwdev, chip->wl_rf_para_rx[0]); in rtw_coex_action_wl_only()
2343 tdma_case = 0; in rtw_coex_action_wl_only()
2372 tdma_case = 0; in rtw_coex_action_wl_native_lps()
2386 rtw_coex_set_rf_para(rtwdev, chip->wl_rf_para_rx[0]); in rtw_coex_action_wl_native_lps()
2400 u32 slot_type = 0; in rtw_coex_action_wl_linkscan()
2404 rtw_coex_set_rf_para(rtwdev, chip->wl_rf_para_rx[0]); in rtw_coex_action_wl_linkscan()
2441 rtw_coex_set_rf_para(rtwdev, chip->wl_rf_para_rx[0]); in rtw_coex_action_wl_not_connected()
2446 tdma_case = 0; in rtw_coex_action_wl_not_connected()
2650 memset(coex_dm, 0, sizeof(*coex_dm)); in rtw_coex_init_coex_var()
2651 memset(coex_stat, 0, sizeof(*coex_stat)); in rtw_coex_init_coex_var()
2653 for (i = 0; i < COEX_CNT_WL_MAX; i++) in rtw_coex_init_coex_var()
2654 coex_stat->cnt_wl[i] = 0; in rtw_coex_init_coex_var()
2656 for (i = 0; i < COEX_CNT_BT_MAX; i++) in rtw_coex_init_coex_var()
2657 coex_stat->cnt_bt[i] = 0; in rtw_coex_init_coex_var()
2659 for (i = 0; i < ARRAY_SIZE(coex_dm->bt_rssi_state); i++) in rtw_coex_init_coex_var()
2662 for (i = 0; i < ARRAY_SIZE(coex_dm->wl_rssi_state); i++) in rtw_coex_init_coex_var()
2679 coex_stat->kt_ver = u8_get_bits(rtw_read8(rtwdev, 0xf1), GENMASK(7, 4)); in __rtw_coex_init_hw_config()
2721 rtw_coex_tdma(rtwdev, true, 0); in __rtw_coex_init_hw_config()
2735 /* enable BB, we can write 0x948 */ in rtw_coex_power_on_setting()
2747 rtw_write8(rtwdev, 0xff1a, 0x0); in rtw_coex_power_on_setting()
2977 rtw_coex_set_wl_pri_mask(rtwdev, COEX_WLPRI_RX_CCK, 0); in rtw_coex_media_status_notify()
2991 u8 i, rsp_source = 0, type; in rtw_coex_bt_info_notify()
2994 rsp_source = buf[0] & 0xf; in rtw_coex_bt_info_notify()
3001 if (coex_stat->bt_iqk_state == 0) in rtw_coex_bt_info_notify()
3007 "[BTCoex], BT IQK by bt_info, data0 = 0x%02x\n", in rtw_coex_bt_info_notify()
3015 "[BTCoex], BT Scoreboard change notify by WL FW c2h, 0xaa = 0x%02x, 0xab = 0x%02x\n", in rtw_coex_bt_info_notify()
3028 "[BTCoex], H2C 0x60 content replied by WL FW: H2C_0x60 = [%02x %02x %02x %02x %02x]\n", in rtw_coex_bt_info_notify()
3066 buf[0], length, buf[1], buf[2], buf[3], buf[4], buf[5], buf[6]); in rtw_coex_bt_info_notify()
3068 for (i = 0; i < COEX_BTINFO_LENGTH; i++) in rtw_coex_bt_info_notify()
3090 /* 0xff means BT is under WHCK test */ in rtw_coex_bt_info_notify()
3091 coex_stat->bt_whck_test = (coex_stat->bt_info_lb2 == 0xff); in rtw_coex_bt_info_notify()
3109 if (coex_stat->bt_info_hb1 & BIT(0)) { in rtw_coex_bt_info_notify()
3116 } else if (coex_stat->bt_info_hb1 & BIT(0)) { in rtw_coex_bt_info_notify()
3125 if (coex_stat->bt_info_hb1 & BIT(0)) { in rtw_coex_bt_info_notify()
3141 coex_stat->cnt_bt[COEX_CNT_BT_RETRY] = coex_stat->bt_info_lb3 & 0xf; in rtw_coex_bt_info_notify()
3163 coex_stat->bt_rssi = 0; in rtw_coex_bt_info_notify()
3194 /* for multi_link = 0 but bt pkt remain exist */ in rtw_coex_bt_info_notify()
3224 coex_stat->bt_opp_exist = ((coex_stat->bt_info_hb2 & BIT(0)) == BIT(0)); in rtw_coex_bt_info_notify()
3230 coex_stat->bt_hid_slot = (coex_stat->bt_info_hb2 & 0x30) >> 4; in rtw_coex_bt_info_notify()
3231 coex_stat->bt_hid_pair_num = (coex_stat->bt_info_hb2 & 0xc0) >> 6; in rtw_coex_bt_info_notify()
3232 if (coex_stat->bt_hid_pair_num > 0 && coex_stat->bt_hid_slot >= 2) in rtw_coex_bt_info_notify()
3234 else if (coex_stat->bt_hid_pair_num == 0 || coex_stat->bt_hid_slot == 1) in rtw_coex_bt_info_notify()
3237 if ((coex_stat->bt_info_lb2 & 0x49) == 0x49) in rtw_coex_bt_info_notify()
3238 coex_stat->bt_a2dp_bitpool = (coex_stat->bt_info_hb3 & 0x7f); in rtw_coex_bt_info_notify()
3240 coex_stat->bt_a2dp_bitpool = 0; in rtw_coex_bt_info_notify()
3248 #define COEX_BT_HIDINFO_MTK 0x46
3249 static const u8 coex_bt_hidinfo_ps[] = {0x57, 0x69, 0x72};
3250 static const u8 coex_bt_hidinfo_xb[] = {0x58, 0x62, 0x6f};
3260 u8 sub_id = buf[2], gamehid_cnt = 0, handle, i; in rtw_coex_bt_hid_info_notify()
3268 "[BTCoex], HID info notify, sub_id = 0x%x\n", sub_id); in rtw_coex_bt_hid_info_notify()
3277 memset(&coex_stat->hid_info, 0, sizeof(coex_stat->hid_info)); in rtw_coex_bt_hid_info_notify()
3278 for (i = 0; i < COEX_BT_HIDINFO_HANDLE_NUM; i++) { in rtw_coex_bt_hid_info_notify()
3281 hl->handle[i] != 0) in rtw_coex_bt_hid_info_notify()
3288 for (i = 0; i < COEX_BT_HIDINFO_HANDLE_NUM; i++) { in rtw_coex_bt_hid_info_notify()
3300 for (i = 0; i < COEX_BT_HIDINFO_HANDLE_NUM; i++) { in rtw_coex_bt_hid_info_notify()
3305 handle == 0 || handle >= COEX_BT_BLE_HANDLE_THRS) { in rtw_coex_bt_hid_info_notify()
3313 COEX_BT_HIDINFO_NAME)) == 0) in rtw_coex_bt_hid_info_notify()
3317 COEX_BT_HIDINFO_NAME)) == 0) in rtw_coex_bt_hid_info_notify()
3328 if (gamehid_cnt > 0) in rtw_coex_bt_hid_info_notify()
3361 rtw_fw_coex_query_hid_info(rtwdev, COEX_BT_HIDINFO_LIST, 0); in rtw_coex_query_bt_hid_list()
3363 for (i = 0; i < COEX_BT_HIDINFO_HANDLE_NUM; i++) { in rtw_coex_query_bt_hid_list()
3367 if (handle == 0 || handle == COEX_BT_HIDINFO_NOTCON || in rtw_coex_query_bt_hid_list()
3390 if (buf[0] != 0x08) in rtw_coex_wl_fwdbginfo_notify()
3568 u8 ans = 0xFF; in rtw_coex_get_table_index()
3579 for (i = 0; i < n; i++) { in rtw_coex_get_table_index()
3604 u8 ans = 0xFF; in rtw_coex_get_tdma_index()
3615 for (i = 0; i < n; i++) { in rtw_coex_get_tdma_index()
3617 for (j = 0; j < 5; j++) { in rtw_coex_get_tdma_index()
3643 const char *sep = n == 0 ? "" : "/ "; in rtw_coex_addr_info()
3647 if (INFO_SIZE - n <= 0) in rtw_coex_addr_info()
3648 return 0; in rtw_coex_addr_info()
3666 return 0; in rtw_coex_addr_info()
3672 if (ffs == 0 && fls == max_fls) in rtw_coex_addr_info()
3687 const char *sep = n == 0 ? "" : "/ "; in rtw_coex_val_info()
3690 if (INFO_SIZE - n <= 0) in rtw_coex_val_info()
3691 return 0; in rtw_coex_val_info()
3710 return 0; in rtw_coex_val_info()
3723 int n_addr = 0; in rtw_coex_set_coexinfo_hw()
3725 int n_val = 0; in rtw_coex_set_coexinfo_hw()
3728 for (i = 0; i < chip->coex_info_hw_regs_num; i++) { in rtw_coex_set_coexinfo_hw()
3736 n_addr = 0; in rtw_coex_set_coexinfo_hw()
3737 n_val = 0; in rtw_coex_set_coexinfo_hw()
3741 if (n_addr != 0 && n_val != 0) in rtw_coex_set_coexinfo_hw()
3748 struct rtw_coex_info_req req = {0}; in rtw_coex_get_bt_reg()
3756 req.para2 = le16_get_bits(le_addr, GENMASK(7, 0)); in rtw_coex_get_bt_reg()
3760 *val = 0xeaea; in rtw_coex_get_bt_reg()
3774 struct rtw_coex_info_req req = {0}; in rtw_coex_get_bt_patch_version()
3793 struct rtw_coex_info_req req = {0}; in rtw_coex_get_bt_supported_version()
3812 struct rtw_coex_info_req req = {0}; in rtw_coex_get_bt_supported_feature()
3918 sys_lte = rtw_read8(rtwdev, 0x73); in rtw_coex_display_coex_info()
3919 lte_coex = rtw_coex_read_indirect_reg(rtwdev, 0x38); in rtw_coex_display_coex_info()
3920 bt_coex = rtw_coex_read_indirect_reg(rtwdev, 0x54); in rtw_coex_display_coex_info()
3930 rtw_coex_get_bt_reg(rtwdev, 3, 0xae, &coex_stat->bt_reg_vendor_ae); in rtw_coex_display_coex_info()
3931 rtw_coex_get_bt_reg(rtwdev, 3, 0xac, &coex_stat->bt_reg_vendor_ac); in rtw_coex_display_coex_info()
3933 if (coex_stat->patch_ver != 0) in rtw_coex_display_coex_info()
3959 seq_printf(m, "%-40s = %08x/ 0x%02x/ 0x%08x %s\n", in rtw_coex_display_coex_info()
3971 seq_printf(m, "%-40s = %u.%u/ 0x%x/ 0x%x/ %c\n", in rtw_coex_display_coex_info()
3978 coex_dm->wl_ch_info[0], coex_dm->wl_ch_info[1], in rtw_coex_display_coex_info()
4006 seq_printf(m, "%-40s = %u/ %u/ %u/ 0x%08x\n", in rtw_coex_display_coex_info()
4018 seq_printf(m, "%-40s = 0x%04x/ 0x%04x/ 0x%04x/ 0x%04x\n", in rtw_coex_display_coex_info()
4019 "0xae/ 0xac/ score board (W->B)/ (B->W)", in rtw_coex_display_coex_info()
4027 for (i = 0; i < COEX_BTINFO_SRC_BT_IQK; i++) in rtw_coex_display_coex_info()
4059 &coex_dm->fw_tdma_para[0])); in rtw_coex_display_coex_info()
4073 seq_printf(m, "%-40s = %d(%d)/ 0x%08x/ 0x%08x/ 0x%08x\n", in rtw_coex_display_coex_info()
4074 "Table/ 0x6c0/ 0x6c4/ 0x6c8", in rtw_coex_display_coex_info()
4078 seq_printf(m, "%-40s = 0x%08x/ 0x%08x/ %d/ reason (%s)\n", in rtw_coex_display_coex_info()
4079 "0x778/ 0x6cc/ Run Count/ Reason", in rtw_coex_display_coex_info()