realtek/rtlwifi/wifi.h

1732 struct rtl_dm {  struct
1734 	long entry_min_undec_sm_pwdb;
1735 	long undec_sm_cck;
1736 	long undec_sm_pwdb;	/*out dm */
1737 	long entry_max_undec_sm_pwdb;
1738 	s32 ofdm_pkt_cnt;
1739 	bool dm_initialgain_enable;
1740 	bool dynamic_txpower_enable;
1741 	bool current_turbo_edca;
1742 	bool is_any_nonbepkts;	/*out dm */
1743 	bool is_cur_rdlstate;
1744 	bool txpower_trackinginit;
1745 	bool disable_framebursting;
1746 	bool cck_inch14;
1747 	bool txpower_tracking;
1748 	bool useramask;
1749 	bool rfpath_rxenable[4];
1750 	bool inform_fw_driverctrldm;
1751 	bool current_mrc_switch;
1752 	u8 txpowercount;
1753 	u8 powerindex_backup[6];
1755 	u8 thermalvalue_rxgain;
1756 	u8 thermalvalue_iqk;
1757 	u8 thermalvalue_lck;
1758 	u8 thermalvalue;
1759 	u8 last_dtp_lvl;
1760 	u8 thermalvalue_avg[AVG_THERMAL_NUM];
1761 	u8 thermalvalue_avg_index;
1762 	u8 tm_trigger;
1763 	bool done_txpower;
1764 	u8 dynamic_txhighpower_lvl;	/*Tx high power level */
1765 	u8 dm_flag;		/*Indicate each dynamic mechanism's status. */
1766 	u8 dm_flag_tmp;
1767 	u8 dm_type;
1768 	u8 dm_rssi_sel;
1769 	u8 txpower_track_control;
1770 	bool interrupt_migration;
1771 	bool disable_tx_int;
1772 	s8 ofdm_index[MAX_RF_PATH];
1773 	u8 default_ofdm_index;
1774 	u8 default_cck_index;
1775 	s8 cck_index;
1776 	s8 delta_power_index[MAX_RF_PATH];
1777 	s8 delta_power_index_last[MAX_RF_PATH];
1778 	s8 power_index_offset[MAX_RF_PATH];
1779 	s8 absolute_ofdm_swing_idx[MAX_RF_PATH];
1780 	s8 remnant_ofdm_swing_idx[MAX_RF_PATH];
1781 	s8 remnant_cck_idx;
1782 	bool modify_txagc_flag_path_a;
1783 	bool modify_txagc_flag_path_b;
1785 	bool one_entry_only;
1786 	struct dm_phy_dbg_info dbginfo;
1789 	bool atc_status;
1790 	bool large_cfo_hit;
1791 	bool is_freeze;
1792 	int cfo_tail[2];
1793 	int cfo_ave_pre;
1794 	int crystal_cap;
1795 	u8 cfo_threshold;
1796 	u32 packet_count;
1797 	u32 packet_count_pre;
1798 	u8 tx_rate;
1801 	u8	swing_idx_ofdm[MAX_RF_PATH];
1802 	u8	swing_idx_ofdm_cur;
1803 	u8	swing_idx_ofdm_base[MAX_RF_PATH];
1804 	bool	swing_flag_ofdm;
1805 	u8	swing_idx_cck;
1806 	u8	swing_idx_cck_cur;
1807 	u8	swing_idx_cck_base;
1808 	bool	swing_flag_cck;
1810 	s8	swing_diff_2g;
1811 	s8	swing_diff_5g;
1814 	bool supp_phymode_switch;
1817 	struct fast_ant_training fat_table;
1819 	u8	resp_tx_path;
1820 	u8	path_sel;
1821 	u32	patha_sum;
1822 	u32	pathb_sum;
1823 	u32	patha_cnt;
1824 	u32	pathb_cnt;
1826 	u8 pre_channel;
1827 	u8 *p_channel;
1828 	u8 linked_interval;
1830 	u64 last_tx_ok_cnt;
1831 	u64 last_rx_ok_cnt;
2843 #define rtl_dm(rtlpriv)		(&((rtlpriv)->dm))  macro