68 	if (bitmask != RFREG_OFFSET_MASK) {  in rtl8723be_phy_set_rf_reg()
224 		rtl_set_rfreg(hw, rfpath, regaddr, RFREG_OFFSET_MASK, data);  in _rtl8723be_config_rf_reg()
1432 					      RFREG_OFFSET_MASK,  in _rtl8723be_phy_sw_chnl_step_by_step()
1461 	rtl_set_rfreg(hw, RF90_PATH_A, RF_WE_LUT, RFREG_OFFSET_MASK, 0x800a0);  in _rtl8723be_phy_path_a_iqk()
1462 	rtl_set_rfreg(hw, RF90_PATH_A, RF_RCK_OS, RFREG_OFFSET_MASK, 0x20000);  in _rtl8723be_phy_path_a_iqk()
1463 	rtl_set_rfreg(hw, RF90_PATH_A, RF_TXPA_G1, RFREG_OFFSET_MASK, 0x0003f);  in _rtl8723be_phy_path_a_iqk()
1464 	rtl_set_rfreg(hw, RF90_PATH_A, RF_TXPA_G2, RFREG_OFFSET_MASK, 0xc7f87);  in _rtl8723be_phy_path_a_iqk()
1538 	rtl_set_rfreg(hw, RF90_PATH_A, RF_RCK_OS, RFREG_OFFSET_MASK, 0x30000);  in _rtl8723be_phy_path_a_rx_iqk()
1539 	rtl_set_rfreg(hw, RF90_PATH_A, RF_TXPA_G1, RFREG_OFFSET_MASK, 0x0001f);  in _rtl8723be_phy_path_a_rx_iqk()
1541 	rtl_set_rfreg(hw, RF90_PATH_A, RF_TXPA_G2, RFREG_OFFSET_MASK, 0xf7fb7);  in _rtl8723be_phy_path_a_rx_iqk()
1607 	rtl_set_rfreg(hw, RF90_PATH_A, RF_RCK_OS, RFREG_OFFSET_MASK, 0x30000);  in _rtl8723be_phy_path_a_rx_iqk()
1608 	rtl_set_rfreg(hw, RF90_PATH_A, RF_TXPA_G1, RFREG_OFFSET_MASK, 0x0001f);  in _rtl8723be_phy_path_a_rx_iqk()
1610 	rtl_set_rfreg(hw, RF90_PATH_A, RF_TXPA_G2, RFREG_OFFSET_MASK, 0xf7d77);  in _rtl8723be_phy_path_a_rx_iqk()
1613 	rtl_set_rfreg(hw, RF90_PATH_A, 0xdf, RFREG_OFFSET_MASK, 0xf80);  in _rtl8723be_phy_path_a_rx_iqk()
1614 	rtl_set_rfreg(hw, RF90_PATH_A, 0x55, RFREG_OFFSET_MASK, 0x4021f);  in _rtl8723be_phy_path_a_rx_iqk()
1651 	rtl_set_rfreg(hw, RF90_PATH_A, 0xdf, RFREG_OFFSET_MASK, 0x780);  in _rtl8723be_phy_path_a_rx_iqk()
1682 	rtl_set_rfreg(hw, RF90_PATH_A, 0xed, RFREG_OFFSET_MASK, 0x00020);  in _rtl8723be_phy_path_b_iqk()
1683 	rtl_set_rfreg(hw, RF90_PATH_A, 0x43, RFREG_OFFSET_MASK, 0x40fc1);  in _rtl8723be_phy_path_b_iqk()
1756 	rtl_set_rfreg(hw, RF90_PATH_A, RF_WE_LUT, RFREG_OFFSET_MASK, 0x800a0);  in _rtl8723be_phy_path_b_rx_iqk()
1757 	rtl_set_rfreg(hw, RF90_PATH_A, RF_RCK_OS, RFREG_OFFSET_MASK, 0x30000);  in _rtl8723be_phy_path_b_rx_iqk()
1758 	rtl_set_rfreg(hw, RF90_PATH_A, RF_TXPA_G1, RFREG_OFFSET_MASK, 0x0001f);  in _rtl8723be_phy_path_b_rx_iqk()
1759 	rtl_set_rfreg(hw, RF90_PATH_A, RF_TXPA_G2, RFREG_OFFSET_MASK, 0xf7ff7);  in _rtl8723be_phy_path_b_rx_iqk()
1762 	rtl_set_rfreg(hw, RF90_PATH_A, 0xed, RFREG_OFFSET_MASK, 0x00020);  in _rtl8723be_phy_path_b_rx_iqk()
1763 	rtl_set_rfreg(hw, RF90_PATH_A, 0x43, RFREG_OFFSET_MASK, 0x60fed);  in _rtl8723be_phy_path_b_rx_iqk()
1827 	rtl_set_rfreg(hw, RF90_PATH_A, RF_RCK_OS, RFREG_OFFSET_MASK, 0x30000);  in _rtl8723be_phy_path_b_rx_iqk()
1828 	rtl_set_rfreg(hw, RF90_PATH_A, RF_TXPA_G1, RFREG_OFFSET_MASK, 0x0001f);  in _rtl8723be_phy_path_b_rx_iqk()
1829 	rtl_set_rfreg(hw, RF90_PATH_A, RF_TXPA_G2, RFREG_OFFSET_MASK, 0xf7d77);  in _rtl8723be_phy_path_b_rx_iqk()
1833 	rtl_set_rfreg(hw, RF90_PATH_A, 0xed, RFREG_OFFSET_MASK, 0x00020);  in _rtl8723be_phy_path_b_rx_iqk()
1834 	rtl_set_rfreg(hw, RF90_PATH_A, 0x43, RFREG_OFFSET_MASK, 0x60fbd);  in _rtl8723be_phy_path_b_rx_iqk()
2214 	rtl_set_rfreg(hw, RF90_PATH_A, 0xb0, RFREG_OFFSET_MASK, 0xdfbe0);  in _rtl8723be_phy_lc_calibrate()
2222 	rtl_set_rfreg(hw, RF90_PATH_A, 0xb0, RFREG_OFFSET_MASK, 0xdffe0);  in _rtl8723be_phy_lc_calibrate()
2508 	rtl_set_rfreg(hw, RF90_PATH_A, 0x00, RFREG_OFFSET_MASK, 0x00);  in _rtl8723be_phy_set_rf_sleep()