Lines Matching refs:rtl_write_dword
562 rtl_write_dword(rtlpriv, REG_RCR, ((u32 *)(val))[0]); in rtl92ee_set_hw_reg()
648 rtl_write_dword(rtlpriv, REG_TSFTR, in rtl92ee_set_hw_reg()
650 rtl_write_dword(rtlpriv, REG_TSFTR + 4, in rtl92ee_set_hw_reg()
682 rtl_write_dword(rtlpriv, REG_RQPN, 0x80E60808); in _rtl92ee_llt_table_init()
757 rtl_write_dword(rtlpriv, REG_AFE_CTRL4, dwordtmp); in _rtl92ee_init_mac()
768 rtl_write_dword(rtlpriv, REG_AFE_CTRL4, dwordtmp); in _rtl92ee_init_mac()
804 rtl_write_dword(rtlpriv, REG_HISR, 0xffffffff); in _rtl92ee_init_mac()
805 rtl_write_dword(rtlpriv, REG_HISRE, 0xffffffff); in _rtl92ee_init_mac()
815 rtl_write_dword(rtlpriv, REG_RCR, rtlpci->receive_config); in _rtl92ee_init_mac()
819 rtl_write_dword(rtlpriv, REG_TCR, rtlpci->transmit_config); in _rtl92ee_init_mac()
825 rtl_write_dword(rtlpriv, REG_BCNQ_DESA + 4, in _rtl92ee_init_mac()
828 rtl_write_dword(rtlpriv, REG_MGQ_DESA + 4, in _rtl92ee_init_mac()
830 rtl_write_dword(rtlpriv, REG_VOQ_DESA + 4, in _rtl92ee_init_mac()
832 rtl_write_dword(rtlpriv, REG_VIQ_DESA + 4, in _rtl92ee_init_mac()
834 rtl_write_dword(rtlpriv, REG_BEQ_DESA + 4, in _rtl92ee_init_mac()
836 rtl_write_dword(rtlpriv, REG_BKQ_DESA + 4, in _rtl92ee_init_mac()
838 rtl_write_dword(rtlpriv, REG_HQ0_DESA + 4, in _rtl92ee_init_mac()
841 rtl_write_dword(rtlpriv, REG_RX_DESA + 4, in _rtl92ee_init_mac()
847 rtl_write_dword(rtlpriv, REG_BCNQ_DESA, in _rtl92ee_init_mac()
850 rtl_write_dword(rtlpriv, REG_MGQ_DESA, in _rtl92ee_init_mac()
853 rtl_write_dword(rtlpriv, REG_VOQ_DESA, in _rtl92ee_init_mac()
856 rtl_write_dword(rtlpriv, REG_VIQ_DESA, in _rtl92ee_init_mac()
860 rtl_write_dword(rtlpriv, REG_BEQ_DESA, in _rtl92ee_init_mac()
866 rtl_write_dword(rtlpriv, REG_BKQ_DESA, in _rtl92ee_init_mac()
869 rtl_write_dword(rtlpriv, REG_HQ0_DESA, in _rtl92ee_init_mac()
873 rtl_write_dword(rtlpriv, REG_RX_DESA, in _rtl92ee_init_mac()
881 rtl_write_dword(rtlpriv, REG_TSFTIMER_HCI, 0x3fffffff); in _rtl92ee_init_mac()
886 rtl_write_dword(rtlpriv, REG_INT_MIG, 0); in _rtl92ee_init_mac()
888 rtl_write_dword(rtlpriv, REG_MCUTST_1, 0x0); in _rtl92ee_init_mac()
923 rtl_write_dword(rtlpriv, REG_TSFTIMER_HCI, 0XFFFFFFFF); in _rtl92ee_init_mac()
937 rtl_write_dword(rtlpriv, REG_RRSR, reg_rrsr); in _rtl92ee_hw_configure()
940 rtl_write_dword(rtlpriv, REG_ARFR0, 0x00000010); in _rtl92ee_hw_configure()
941 rtl_write_dword(rtlpriv, REG_ARFR0 + 4, 0x3e0ff000); in _rtl92ee_hw_configure()
944 rtl_write_dword(rtlpriv, REG_ARFR1, 0x00000010); in _rtl92ee_hw_configure()
945 rtl_write_dword(rtlpriv, REG_ARFR1 + 4, 0x000ff000); in _rtl92ee_hw_configure()
957 rtl_write_dword(rtlpriv, REG_BAR_MODE_CTRL, 0x0201ffff); in _rtl92ee_hw_configure()
960 rtl_write_dword(rtlpriv, REG_DARFRC, 0x01000000); in _rtl92ee_hw_configure()
961 rtl_write_dword(rtlpriv, REG_DARFRC + 4, 0x07060504); in _rtl92ee_hw_configure()
962 rtl_write_dword(rtlpriv, REG_RARFRC, 0x01000000); in _rtl92ee_hw_configure()
963 rtl_write_dword(rtlpriv, REG_RARFRC + 4, 0x07060504); in _rtl92ee_hw_configure()
989 rtl_write_dword(rtlpriv, REG_FAST_EDCA_CTRL, 0x03086666); in _rtl92ee_hw_configure()
1012 rtl_write_dword(rtlpriv, REG_MAR, 0xffffffff); in _rtl92ee_hw_configure()
1013 rtl_write_dword(rtlpriv, REG_MAR + 4, 0xffffffff); in _rtl92ee_hw_configure()
1037 rtl_write_dword(rtlpriv, REG_BACKDOOR_DBI_WDATA, in _rtl92ee_enable_aspm_back_door()
1065 rtl_write_dword(rtlpriv, REG_BACKDOOR_DBI_WDATA, in _rtl92ee_enable_aspm_back_door()
1090 rtl_write_dword(rtlpriv, REG_BACKDOOR_DBI_WDATA, in _rtl92ee_enable_aspm_back_door()
1417 rtl_write_dword(rtlpriv, REG_SYS_SWR_CTRL1, tmp_u4b); in rtl92ee_hw_init()
1421 rtl_write_dword(rtlpriv, 0x4fc, 0); in rtl92ee_hw_init()
1567 rtl_write_dword(rtlpriv, REG_EDCA_BK_PARAM, 0xa44f); in rtl92ee_set_qos()
1573 rtl_write_dword(rtlpriv, REG_EDCA_VI_PARAM, 0x5e4322); in rtl92ee_set_qos()
1576 rtl_write_dword(rtlpriv, REG_EDCA_VO_PARAM, 0x2f3222); in rtl92ee_set_qos()
1589 rtl_write_dword(rtlpriv, REG_HIMR, rtlpci->irq_mask[0] & 0xFFFFFFFF); in rtl92ee_enable_interrupt()
1590 rtl_write_dword(rtlpriv, REG_HIMRE, rtlpci->irq_mask[1] & 0xFFFFFFFF); in rtl92ee_enable_interrupt()
1599 rtl_write_dword(rtlpriv, REG_HIMR, IMR_DISABLED); in rtl92ee_disable_interrupt()
1600 rtl_write_dword(rtlpriv, REG_HIMRE, IMR_DISABLED); in rtl92ee_disable_interrupt()
1680 rtl_write_dword(rtlpriv, ISR, intvec->inta); in rtl92ee_interrupt_recognized()
1683 rtl_write_dword(rtlpriv, REG_HISRE, intvec->intb); in rtl92ee_interrupt_recognized()
2603 rtl_write_dword(rtlpriv, REG_RCR, rtlpci->receive_config); in rtl92ee_allow_all_destaddr()