72 				     u8 rpwm_val, bool b_need_turn_off_ckk)  in _rtl92ee_set_fw_clock_on()  argument
109 					      (u8 *)(&rpwm_val));  in _rtl92ee_set_fw_clock_on()
110 		if (FW_PS_IS_ACK(rpwm_val)) {  in _rtl92ee_set_fw_clock_on()
142 static void _rtl92ee_set_fw_clock_off(struct ieee80211_hw *hw, u8 rpwm_val)  in _rtl92ee_set_fw_clock_off()  argument
182 			rtlhal->fw_ps_state = FW_PS_STATE(rpwm_val);  in _rtl92ee_set_fw_clock_off()
185 						      (u8 *)(&rpwm_val));  in _rtl92ee_set_fw_clock_off()
199 	u8 rpwm_val = 0;  in _rtl92ee_set_fw_ps_rf_on()  local
201 	rpwm_val |= (FW_PS_STATE_RF_OFF_92E | FW_PS_ACK);  in _rtl92ee_set_fw_ps_rf_on()
202 	_rtl92ee_set_fw_clock_on(hw, rpwm_val, true);  in _rtl92ee_set_fw_ps_rf_on()
207 	u8 rpwm_val = 0;  in _rtl92ee_set_fw_ps_rf_off_low_power()  local
209 	rpwm_val |= FW_PS_STATE_RF_OFF_LOW_PWR;  in _rtl92ee_set_fw_ps_rf_off_low_power()
210 	_rtl92ee_set_fw_clock_off(hw, rpwm_val);  in _rtl92ee_set_fw_ps_rf_off_low_power()
226 	u8 rpwm_val = 0, fw_pwrmode = FW_PS_ACTIVE_MODE;  in _rtl92ee_fwlps_leave()  local
229 		rpwm_val = (FW_PS_STATE_ALL_ON_92E | FW_PS_ACK);/* RF on */  in _rtl92ee_fwlps_leave()
230 		_rtl92ee_set_fw_clock_on(hw, rpwm_val, false);  in _rtl92ee_fwlps_leave()
237 		rpwm_val = FW_PS_STATE_ALL_ON_92E;	/* RF on */  in _rtl92ee_fwlps_leave()
239 					      (u8 *)(&rpwm_val));  in _rtl92ee_fwlps_leave()
253 	u8 rpwm_val;  in _rtl92ee_fwlps_enter()  local
256 		rpwm_val = FW_PS_STATE_RF_OFF_LOW_PWR;	/* RF off */  in _rtl92ee_fwlps_enter()
262 		_rtl92ee_set_fw_clock_off(hw, rpwm_val);  in _rtl92ee_fwlps_enter()
264 		rpwm_val = FW_PS_STATE_RF_OFF_92E;	/* RF off */  in _rtl92ee_fwlps_enter()
270 					      (u8 *)(&rpwm_val));  in _rtl92ee_fwlps_enter()
587 		u8 rpwm_val;  in rtl92ee_set_hw_reg()  local
589 		rpwm_val = rtl_read_byte(rtlpriv, REG_PCIE_HRPWM);  in rtl92ee_set_hw_reg()
592 		if (rpwm_val & BIT(7)) {  in rtl92ee_set_hw_reg()