Lines Matching refs:adda_reg
1291 const u32 *adda_reg, in _rtl92du_phy_reload_adda_registers() argument
1301 if (adda_reg[i] == ROFDM0_XAAGCCORE1 || in _rtl92du_phy_reload_adda_registers()
1302 adda_reg[i] == ROFDM0_XBAGCCORE1) in _rtl92du_phy_reload_adda_registers()
1303 rtl_set_bbreg(hw, adda_reg[i], MASKDWORD, 0x50); in _rtl92du_phy_reload_adda_registers()
1305 rtl_set_bbreg(hw, adda_reg[i], MASKDWORD, adda_backup[i]); in _rtl92du_phy_reload_adda_registers()
1347 static const u32 adda_reg[IQK_ADDA_REG_NUM] = { in _rtl92du_phy_iq_calibrate() local
1378 rtl92d_phy_save_adda_registers(hw, adda_reg, in _rtl92du_phy_iq_calibrate()
1387 rtl92d_phy_path_adda_on(hw, adda_reg, true, is2t); in _rtl92du_phy_iq_calibrate()
1457 rtl92d_phy_path_adda_on(hw, adda_reg, false, is2t); in _rtl92du_phy_iq_calibrate()
1500 _rtl92du_phy_reload_adda_registers(hw, adda_reg, in _rtl92du_phy_iq_calibrate()
1527 static const u32 adda_reg[IQK_ADDA_REG_NUM] = { in _rtl92du_phy_iq_calibrate_5g_normal() local
1566 rtl92d_phy_save_adda_registers(hw, adda_reg, in _rtl92du_phy_iq_calibrate_5g_normal()
1582 rtl92d_phy_path_adda_on(hw, adda_reg, !rf_path_div, is2t); in _rtl92du_phy_iq_calibrate_5g_normal()
1650 rtl92d_phy_path_adda_on(hw, adda_reg, false, is2t); in _rtl92du_phy_iq_calibrate_5g_normal()
1705 _rtl92du_phy_reload_adda_registers(hw, adda_reg, in _rtl92du_phy_iq_calibrate_5g_normal()