487 					RFREG_OFFSET_MASK,  in rtl92du_phy_config_rf_with_headerfile()
494 					RFREG_OFFSET_MASK,  in rtl92du_phy_config_rf_with_headerfile()
685 				      RFREG_OFFSET_MASK,  in _rtl92du_phy_reload_imr_setting()
710 					      RFREG_OFFSET_MASK,  in _rtl92du_phy_reload_imr_setting()
786 					      RFREG_OFFSET_MASK, 0xE439D);  in _rtl92du_phy_switch_rf_setting()
794 					      RFREG_OFFSET_MASK, u4tmp2);  in _rtl92du_phy_switch_rf_setting()
798 					      RFREG_OFFSET_MASK,  in _rtl92du_phy_switch_rf_setting()
808 					      RFREG_OFFSET_MASK));  in _rtl92du_phy_switch_rf_setting()
853 							RFREG_OFFSET_MASK,  in _rtl92du_phy_switch_rf_setting()
858 							RFREG_OFFSET_MASK,  in _rtl92du_phy_switch_rf_setting()
914 					      RFREG_OFFSET_MASK,  in _rtl92du_phy_switch_rf_setting()
920 					      RFREG_OFFSET_MASK,  in _rtl92du_phy_switch_rf_setting()
931 					      RFREG_OFFSET_MASK));  in _rtl92du_phy_switch_rf_setting()
938 			      RFREG_OFFSET_MASK,  in _rtl92du_phy_switch_rf_setting()
1642 			rtl_get_rfreg(hw, RF90_PATH_A, RF_AC, RFREG_OFFSET_MASK));  in _rtl92du_phy_iq_calibrate_5g_normal()
2321 			      RFREG_OFFSET_MASK, 0x010000);  in _rtl92du_phy_lc_calibrate_sw()
2324 						 RFREG_OFFSET_MASK);  in _rtl92du_phy_lc_calibrate_sw()
2338 				      RFREG_OFFSET_MASK);  in _rtl92du_phy_lc_calibrate_sw()
2344 					      RF_SYN_G6, RFREG_OFFSET_MASK);  in _rtl92du_phy_lc_calibrate_sw()
2358 		rtl_get_rfreg(hw, index, RF_SYN_G4, RFREG_OFFSET_MASK);  in _rtl92du_phy_lc_calibrate_sw()
2384 				      RFREG_OFFSET_MASK, 0x0);  in _rtl92du_phy_lc_calibrate_sw()
2387 						0x4F, RFREG_OFFSET_MASK);  in _rtl92du_phy_lc_calibrate_sw()
2414 		rtl_set_rfreg(hw, index, RF_SYN_G4, RFREG_OFFSET_MASK,  in _rtl92du_phy_lc_calibrate_sw()
2532 		rtl_set_rfreg(hw, rfpath, RF_CHNLBW, RFREG_OFFSET_MASK,  in rtl92du_phy_sw_chnl()
2583 	rtl_set_rfreg(hw, RF90_PATH_A, 0x00, RFREG_OFFSET_MASK, 0x00);  in _rtl92du_phy_set_rfsleep()
2593 	u4btmp = rtl_get_rfreg(hw, RF90_PATH_A, 0, RFREG_OFFSET_MASK);  in _rtl92du_phy_set_rfsleep()
2596 		rtl_set_rfreg(hw, RF90_PATH_A, 0x00, RFREG_OFFSET_MASK, 0x00);  in _rtl92du_phy_set_rfsleep()
2598 		u4btmp = rtl_get_rfreg(hw, RF90_PATH_A, 0, RFREG_OFFSET_MASK);  in _rtl92du_phy_set_rfsleep()
2917 			rtl_set_rfreg(hw, RF90_PATH_A, RF_CHNLBW, RFREG_OFFSET_MASK,  in rtl92du_update_bbrf_configuration()
2928 					      RFREG_OFFSET_MASK, 0x97524);  in rtl92du_update_bbrf_configuration()
2937 					      RFREG_OFFSET_MASK, 0x87401);  in rtl92du_update_bbrf_configuration()
2977 							      RFREG_OFFSET_MASK);  in rtl92du_update_bbrf_configuration()
2979 							 RFREG_OFFSET_MASK);  in rtl92du_update_bbrf_configuration()
3039 		rtl_set_rfreg(hw, RF90_PATH_A, RF_CHNLBW, RFREG_OFFSET_MASK, 0x07401);  in rtl92du_phy_init_pa_bias()
3040 		rtl_set_rfreg(hw, RF90_PATH_A, RF_AC, RFREG_OFFSET_MASK, 0x70000);  in rtl92du_phy_init_pa_bias()
3041 		rtl_set_rfreg(hw, RF90_PATH_A, RF_IPA, RFREG_OFFSET_MASK, 0x0F425);  in rtl92du_phy_init_pa_bias()
3042 		rtl_set_rfreg(hw, RF90_PATH_A, RF_IPA, RFREG_OFFSET_MASK, 0x4F425);  in rtl92du_phy_init_pa_bias()
3043 		rtl_set_rfreg(hw, RF90_PATH_A, RF_IPA, RFREG_OFFSET_MASK, 0x8F425);  in rtl92du_phy_init_pa_bias()
3046 		rtl_set_rfreg(hw, RF90_PATH_A, RF_AC, RFREG_OFFSET_MASK, 0x30000);  in rtl92du_phy_init_pa_bias()
3054 		rtl_set_rfreg(hw, rf_path, RF_CHNLBW, RFREG_OFFSET_MASK, 0x07401);  in rtl92du_phy_init_pa_bias()
3055 		rtl_set_rfreg(hw, rf_path, RF_AC, RFREG_OFFSET_MASK, 0x70000);  in rtl92du_phy_init_pa_bias()
3056 		rtl_set_rfreg(hw, rf_path, RF_IPA, RFREG_OFFSET_MASK, 0x0F425);  in rtl92du_phy_init_pa_bias()
3057 		rtl_set_rfreg(hw, rf_path, RF_IPA, RFREG_OFFSET_MASK, 0x4F425);  in rtl92du_phy_init_pa_bias()
3058 		rtl_set_rfreg(hw, rf_path, RF_IPA, RFREG_OFFSET_MASK, 0x8F425);  in rtl92du_phy_init_pa_bias()
3061 		rtl_set_rfreg(hw, rf_path, RF_AC, RFREG_OFFSET_MASK, 0x30000);  in rtl92du_phy_init_pa_bias()
3068 		rtl_set_rfreg(hw, RF90_PATH_A, RF_CHNLBW, RFREG_OFFSET_MASK, 0x17524);  in rtl92du_phy_init_pa_bias()
3069 		rtl_set_rfreg(hw, RF90_PATH_A, RF_AC, RFREG_OFFSET_MASK, 0x70000);  in rtl92du_phy_init_pa_bias()
3070 		rtl_set_rfreg(hw, RF90_PATH_A, RF_IPA, RFREG_OFFSET_MASK, 0x0F496);  in rtl92du_phy_init_pa_bias()
3071 		rtl_set_rfreg(hw, RF90_PATH_A, RF_IPA, RFREG_OFFSET_MASK, 0x4F496);  in rtl92du_phy_init_pa_bias()
3072 		rtl_set_rfreg(hw, RF90_PATH_A, RF_IPA, RFREG_OFFSET_MASK, 0x8F496);  in rtl92du_phy_init_pa_bias()
3075 		rtl_set_rfreg(hw, RF90_PATH_A, RF_CHNLBW, RFREG_OFFSET_MASK, 0x37564);  in rtl92du_phy_init_pa_bias()
3076 		rtl_set_rfreg(hw, RF90_PATH_A, RF_AC, RFREG_OFFSET_MASK, 0x70000);  in rtl92du_phy_init_pa_bias()
3077 		rtl_set_rfreg(hw, RF90_PATH_A, RF_IPA, RFREG_OFFSET_MASK, 0x0F496);  in rtl92du_phy_init_pa_bias()
3078 		rtl_set_rfreg(hw, RF90_PATH_A, RF_IPA, RFREG_OFFSET_MASK, 0x4F496);  in rtl92du_phy_init_pa_bias()
3079 		rtl_set_rfreg(hw, RF90_PATH_A, RF_IPA, RFREG_OFFSET_MASK, 0x8F496);  in rtl92du_phy_init_pa_bias()
3082 		rtl_set_rfreg(hw, RF90_PATH_A, RF_CHNLBW, RFREG_OFFSET_MASK, 0x57595);  in rtl92du_phy_init_pa_bias()
3083 		rtl_set_rfreg(hw, RF90_PATH_A, RF_AC, RFREG_OFFSET_MASK, 0x70000);  in rtl92du_phy_init_pa_bias()
3084 		rtl_set_rfreg(hw, RF90_PATH_A, RF_IPA, RFREG_OFFSET_MASK, 0x0F496);  in rtl92du_phy_init_pa_bias()
3085 		rtl_set_rfreg(hw, RF90_PATH_A, RF_IPA, RFREG_OFFSET_MASK, 0x4F496);  in rtl92du_phy_init_pa_bias()
3086 		rtl_set_rfreg(hw, RF90_PATH_A, RF_IPA, RFREG_OFFSET_MASK, 0x8F496);  in rtl92du_phy_init_pa_bias()
3089 		rtl_set_rfreg(hw, RF90_PATH_A, RF_AC, RFREG_OFFSET_MASK, 0x30000);  in rtl92du_phy_init_pa_bias()
3098 		rtl_set_rfreg(hw, rf_path, RF_CHNLBW, RFREG_OFFSET_MASK, 0x17524);  in rtl92du_phy_init_pa_bias()
3099 		rtl_set_rfreg(hw, rf_path, RF_AC, RFREG_OFFSET_MASK, 0x70000);  in rtl92du_phy_init_pa_bias()
3100 		rtl_set_rfreg(hw, rf_path, RF_IPA, RFREG_OFFSET_MASK, 0x0F496);  in rtl92du_phy_init_pa_bias()
3101 		rtl_set_rfreg(hw, rf_path, RF_IPA, RFREG_OFFSET_MASK, 0x4F496);  in rtl92du_phy_init_pa_bias()
3102 		rtl_set_rfreg(hw, rf_path, RF_IPA, RFREG_OFFSET_MASK, 0x8F496);  in rtl92du_phy_init_pa_bias()
3105 		rtl_set_rfreg(hw, rf_path, RF_CHNLBW, RFREG_OFFSET_MASK, 0x37564);  in rtl92du_phy_init_pa_bias()
3106 		rtl_set_rfreg(hw, rf_path, RF_AC, RFREG_OFFSET_MASK, 0x70000);  in rtl92du_phy_init_pa_bias()
3107 		rtl_set_rfreg(hw, rf_path, RF_IPA, RFREG_OFFSET_MASK, 0x0F496);  in rtl92du_phy_init_pa_bias()
3108 		rtl_set_rfreg(hw, rf_path, RF_IPA, RFREG_OFFSET_MASK, 0x4F496);  in rtl92du_phy_init_pa_bias()
3109 		rtl_set_rfreg(hw, rf_path, RF_IPA, RFREG_OFFSET_MASK, 0x8F496);  in rtl92du_phy_init_pa_bias()
3112 		rtl_set_rfreg(hw, rf_path, RF_CHNLBW, RFREG_OFFSET_MASK, 0x57595);  in rtl92du_phy_init_pa_bias()
3113 		rtl_set_rfreg(hw, rf_path, RF_AC, RFREG_OFFSET_MASK, 0x70000);  in rtl92du_phy_init_pa_bias()
3114 		rtl_set_rfreg(hw, rf_path, RF_IPA, RFREG_OFFSET_MASK, 0x0F496);  in rtl92du_phy_init_pa_bias()
3115 		rtl_set_rfreg(hw, rf_path, RF_IPA, RFREG_OFFSET_MASK, 0x4F496);  in rtl92du_phy_init_pa_bias()
3116 		rtl_set_rfreg(hw, rf_path, RF_IPA, RFREG_OFFSET_MASK, 0x8F496);  in rtl92du_phy_init_pa_bias()
3119 		rtl_set_rfreg(hw, rf_path, RF_AC, RFREG_OFFSET_MASK, 0x30000);  in rtl92du_phy_init_pa_bias()