Lines Matching refs:rtl_write_word

29 	rtl_write_word(rtlpriv, REG_DBI_CTRL, (offset & 0xFFC));  in rtl92de_read_dword_dbi()
41 rtl_write_word(rtlpriv, REG_DBI_CTRL, ((offset & 0xFFC) | 0xF000)); in rtl92de_write_dword_dbi()
392 rtl_write_word(rtlpriv, REG_APS_FSMCO, 0x1012); in _rtl92de_init_mac()
404 rtl_write_word(rtlpriv, REG_CR, 0x0); in _rtl92de_init_mac()
407 rtl_write_word(rtlpriv, REG_CR, 0x2ff); in _rtl92de_init_mac()
444 rtl_write_word(rtlpriv, REG_TRXDMA_CTRL, wordtmp); in _rtl92de_init_mac()
517 rtl_write_word(rtlpriv, REG_FWHW_TXQ_CTRL, 0x1F80); in _rtl92de_hw_configure()
518 rtl_write_word(rtlpriv, REG_RL, 0x0707); in _rtl92de_hw_configure()
539 rtl_write_word(rtlpriv, REG_NAV_PROT_LEN, 0x0020); in _rtl92de_hw_configure()
541 rtl_write_word(rtlpriv, REG_FAST_EDCA_CTRL, 0x6666); in _rtl92de_hw_configure()
545 rtl_write_word(rtlpriv, REG_SPEC_SIFS, 0x1010); in _rtl92de_hw_configure()
546 rtl_write_word(rtlpriv, REG_MAC_SPEC_SIFS, 0x1010); in _rtl92de_hw_configure()
548 rtl_write_word(rtlpriv, REG_SIFS_CTX, 0x1010); in _rtl92de_hw_configure()
550 rtl_write_word(rtlpriv, REG_SIFS_TRX, 0x1010); in _rtl92de_hw_configure()
572 rtl_write_word(rtlpriv, 0x350, 0x870c); in _rtl92de_enable_aspm_back_door()
578 rtl_write_word(rtlpriv, 0x350, 0x2718); in _rtl92de_enable_aspm_back_door()
640 rtl_write_word(rtlpriv, REG_RD_NAV_NXT, 0x200); in rtl92de_hw_init()
906 rtl_write_word(rtlpriv, REG_GPIO_IO_SEL, 0x0790); in _rtl92de_poweroff_adapter()
909 rtl_write_word(rtlpriv, REG_LEDCFG0, 0x8080); in _rtl92de_poweroff_adapter()
1033 rtl_write_word(rtlpriv, REG_ATIMWND, atim_window); in rtl92de_set_beacon_related_registers()
1034 rtl_write_word(rtlpriv, REG_BCN_INTERVAL, bcn_interval); in rtl92de_set_beacon_related_registers()
1035 rtl_write_word(rtlpriv, REG_BCNTCFG, 0x660f); in rtl92de_set_beacon_related_registers()
1053 rtl_write_word(rtlpriv, REG_BCN_INTERVAL, bcn_interval); in rtl92de_set_beacon_interval()