42 	rtl_write_dword(rtlpriv, REG_DBI_WDATA, value);  in rtl92de_write_dword_dbi()
145 		rtl_write_dword(rtlpriv, REG_RCR, ((u32 *) (val))[0]);  in rtl92de_set_hw_reg()
186 		rtl_write_dword(rtlpriv, REG_TSFTR,  in rtl92de_set_hw_reg()
188 		rtl_write_dword(rtlpriv, REG_TSFTR + 4,  in rtl92de_set_hw_reg()
204 			rtl_write_dword(rtlpriv, REG_INT_MIG, 0xfe000fa0);  in rtl92de_set_hw_reg()
208 			rtl_write_dword(rtlpriv, REG_INT_MIG, 0);  in rtl92de_set_hw_reg()
266 	rtl_write_dword(rtlpriv, REG_RQPN, value32);  in _rtl92de_llt_table_init()
270 	rtl_write_dword(rtlpriv, REG_TRXFF_BNDY,  in _rtl92de_llt_table_init()
422 	rtl_write_dword(rtlpriv, REG_HISR, 0xffffffff);  in _rtl92de_init_mac()
456 	rtl_write_dword(rtlpriv, REG_RCR, rtlpci->receive_config);  in _rtl92de_init_mac()
460 	rtl_write_dword(rtlpriv, REG_TCR, rtlpci->transmit_config);  in _rtl92de_init_mac()
466 	rtl_write_dword(rtlpriv, REG_BCNQ_DESA,  in _rtl92de_init_mac()
468 	rtl_write_dword(rtlpriv, REG_MGQ_DESA, rtlpci->tx_ring[MGNT_QUEUE].dma);  in _rtl92de_init_mac()
469 	rtl_write_dword(rtlpriv, REG_VOQ_DESA, rtlpci->tx_ring[VO_QUEUE].dma);  in _rtl92de_init_mac()
470 	rtl_write_dword(rtlpriv, REG_VIQ_DESA, rtlpci->tx_ring[VI_QUEUE].dma);  in _rtl92de_init_mac()
471 	rtl_write_dword(rtlpriv, REG_BEQ_DESA, rtlpci->tx_ring[BE_QUEUE].dma);  in _rtl92de_init_mac()
472 	rtl_write_dword(rtlpriv, REG_BKQ_DESA, rtlpci->tx_ring[BK_QUEUE].dma);  in _rtl92de_init_mac()
473 	rtl_write_dword(rtlpriv, REG_HQ_DESA, rtlpci->tx_ring[HIGH_QUEUE].dma);  in _rtl92de_init_mac()
475 	rtl_write_dword(rtlpriv, REG_RX_DESA,  in _rtl92de_init_mac()
484 	rtl_write_dword(rtlpriv, REG_INT_MIG, 0);  in _rtl92de_init_mac()
498 	rtl_write_dword(rtlpriv, REG_MCUTST_1, 0x0);  in _rtl92de_init_mac()
514 	rtl_write_dword(rtlpriv, REG_RRSR, reg_rrsr);  in _rtl92de_hw_configure()
519 	rtl_write_dword(rtlpriv, REG_BAR_MODE_CTRL, 0x02012802);  in _rtl92de_hw_configure()
521 	rtl_write_dword(rtlpriv, REG_DARFRC, 0x01000000);  in _rtl92de_hw_configure()
522 	rtl_write_dword(rtlpriv, REG_DARFRC + 4, 0x07060504);  in _rtl92de_hw_configure()
523 	rtl_write_dword(rtlpriv, REG_RARFRC, 0x01000000);  in _rtl92de_hw_configure()
524 	rtl_write_dword(rtlpriv, REG_RARFRC + 4, 0x07060504);  in _rtl92de_hw_configure()
527 		rtl_write_dword(rtlpriv, REG_AGGLEN_LMT, 0xb9726641);  in _rtl92de_hw_configure()
529 		rtl_write_dword(rtlpriv, REG_AGGLEN_LMT, 0x66626641);  in _rtl92de_hw_configure()
531 		rtl_write_dword(rtlpriv, REG_AGGLEN_LMT, 0xb972a841);  in _rtl92de_hw_configure()
552 	rtl_write_dword(rtlpriv, REG_MAR, 0xffffffff);  in _rtl92de_hw_configure()
553 	rtl_write_dword(rtlpriv, REG_MAR + 4, 0xffffffff);  in _rtl92de_hw_configure()
854 	rtl_write_dword(rtlpriv, REG_HIMR, rtlpci->irq_mask[0] & 0xFFFFFFFF);  in rtl92de_enable_interrupt()
855 	rtl_write_dword(rtlpriv, REG_HIMRE, rtlpci->irq_mask[1] & 0xFFFFFFFF);  in rtl92de_enable_interrupt()
864 	rtl_write_dword(rtlpriv, REG_HIMR, IMR8190_DISABLED);  in rtl92de_disable_interrupt()
865 	rtl_write_dword(rtlpriv, REG_HIMRE, IMR8190_DISABLED);  in rtl92de_disable_interrupt()
895 	rtl_write_dword(rtlpriv, REG_GPIO_PIN_CTRL, 0x00000000);  in _rtl92de_poweroff_adapter()
902 	rtl_write_dword(rtlpriv, REG_GPIO_PIN_CTRL,  in _rtl92de_poweroff_adapter()
1021 	rtl_write_dword(rtlpriv, ISR, intvec->inta);  in rtl92de_interrupt_recognized()