163 				       u8 index, u8 rf, u8 pwr_diff_limit[4])  in _rtl92d_get_pwr_diff_limit()  argument
172 	mcs_offset = rtlphy->mcs_offset[0][index + (rf ? 8 : 0)];  in _rtl92d_get_pwr_diff_limit()
178 			limit = rtlefuse->pwrgroup_ht40[rf][channel - 1];  in _rtl92d_get_pwr_diff_limit()
180 			limit = rtlefuse->pwrgroup_ht20[rf][channel - 1];  in _rtl92d_get_pwr_diff_limit()
196 	u32 writeval = 0, customer_limit, rf;  in _rtl92d_get_txpower_writeval_by_regulatory()  local
199 	for (rf = 0; rf < 2; rf++) {  in _rtl92d_get_txpower_writeval_by_regulatory()
202 			writeval = rtlphy->mcs_offset[0][index + (rf ? 8 : 0)];  in _rtl92d_get_txpower_writeval_by_regulatory()
221 					[chnlgroup][index + (rf ? 8 : 0)];  in _rtl92d_get_txpower_writeval_by_regulatory()
235 					rf == 0 ? 'A' : 'B',  in _rtl92d_get_txpower_writeval_by_regulatory()
236 					rtlefuse->pwrgroup_ht40[rf][channel - 1]);  in _rtl92d_get_txpower_writeval_by_regulatory()
240 					rf == 0 ? 'A' : 'B',  in _rtl92d_get_txpower_writeval_by_regulatory()
241 					rtlefuse->pwrgroup_ht20[rf][channel - 1]);  in _rtl92d_get_txpower_writeval_by_regulatory()
244 			_rtl92d_get_pwr_diff_limit(hw, channel, index, rf,  in _rtl92d_get_txpower_writeval_by_regulatory()
254 				rf == 0 ? 'A' : 'B', customer_limit);  in _rtl92d_get_txpower_writeval_by_regulatory()
261 			writeval = rtlphy->mcs_offset[0][index + (rf ? 8 : 0)];  in _rtl92d_get_txpower_writeval_by_regulatory()
269 			writeval += powerbase0[rf];  in _rtl92d_get_txpower_writeval_by_regulatory()
271 			writeval += powerbase1[rf];  in _rtl92d_get_txpower_writeval_by_regulatory()
274 			rf == 0 ? 'A' : 'B', writeval);  in _rtl92d_get_txpower_writeval_by_regulatory()
276 		*(p_outwriteval + rf) = writeval;  in _rtl92d_get_txpower_writeval_by_regulatory()
295 	u8 i, rf, pwr_val[4];  in _rtl92d_write_ofdm_power_reg()  local
299 	for (rf = 0; rf < 2; rf++) {  in _rtl92d_write_ofdm_power_reg()
300 		writeval = pvalue[rf];  in _rtl92d_write_ofdm_power_reg()
309 		if (rf == 0)  in _rtl92d_write_ofdm_power_reg()