Lines Matching refs:rtl_read_byte
40 tmp1byte = rtl_read_byte(rtlpriv, REG_FWHW_TXQ_CTRL + 2); in _rtl92ce_stop_tx_beacon()
43 tmp1byte = rtl_read_byte(rtlpriv, REG_TBTT_PROHIBIT + 2); in _rtl92ce_stop_tx_beacon()
53 tmp1byte = rtl_read_byte(rtlpriv, REG_FWHW_TXQ_CTRL + 2); in _rtl92ce_resume_tx_beacon()
56 tmp1byte = rtl_read_byte(rtlpriv, REG_TBTT_PROHIBIT + 2); in _rtl92ce_resume_tx_beacon()
307 u8 acm_ctrl = rtl_read_byte(rtlpriv, REG_ACMHWCTRL); in rtl92ce_set_hw_reg()
384 rpwm_val = rtl_read_byte(rtlpriv, REG_PCIE_HRPWM); in rtl92ce_set_hw_reg()
419 tmp_regcr = rtl_read_byte(rtlpriv, REG_CR + 1); in rtl92ce_set_hw_reg()
427 rtl_read_byte(rtlpriv, in rtl92ce_set_hw_reg()
678 bytetmp = rtl_read_byte(rtlpriv, REG_APS_FSMCO + 1) | BIT(0); in _rtl92ce_init_mac()
684 bytetmp = rtl_read_byte(rtlpriv, REG_APS_FSMCO + 1); in _rtl92ce_init_mac()
694 bytetmp = rtl_read_byte(rtlpriv, REG_APS_FSMCO + 1); in _rtl92ce_init_mac()
706 bytetmp = rtl_read_byte(rtlpriv, REG_AFE_XTAL_CTRL+2) & 0xfd; in _rtl92ce_init_mac()
759 bytetmp = rtl_read_byte(rtlpriv, REG_APSD_CTRL); in _rtl92ce_init_mac()
763 bytetmp = rtl_read_byte(rtlpriv, REG_APSD_CTRL); in _rtl92ce_init_mac()
1020 tmp_u1b = rtl_read_byte(rtlpriv, 0x16); in rtl92ce_hw_init()
1130 u8 bt_msr = rtl_read_byte(rtlpriv, MSR); in _rtl92ce_set_media_status()
1303 if (rtl_read_byte(rtlpriv, REG_MCUFWDL) & BIT(7)) in _rtl92ce_poweroff_adapter()
1308 u1b_tmp = rtl_read_byte(rtlpriv, REG_GPIO_PIN_CTRL); in _rtl92ce_poweroff_adapter()
1741 tmp_u1b = rtl_read_byte(rtlpriv, REG_9346CR); in rtl92ce_read_eeprom_info()
2031 rtl_write_byte(rtlpriv, REG_MAC_PINMUX_CFG, rtl_read_byte(rtlpriv, in rtl92ce_gpio_radio_on_off_checking()
2034 u1tmp = rtl_read_byte(rtlpriv, REG_GPIO_IO_SEL); in rtl92ce_gpio_radio_on_off_checking()
2306 u1_tmp = rtl_read_byte(rtlpriv, 0x4fd) & BIT(0); in rtl8192ce_bt_hw_init()
2320 u1_tmp = rtl_read_byte(rtlpriv, ROFDM0_TRXPATHENABLE); in rtl8192ce_bt_hw_init()
2324 u1_tmp = rtl_read_byte(rtlpriv, ROFDM1_TRXPATHENABLE); in rtl8192ce_bt_hw_init()