Lines Matching refs:RF90_PATH_D

769 	case RF90_PATH_D:  in rtl88e_phy_config_rf_with_headerfile()
814 	rtlphy->phyreg_def[RF90_PATH_D].rfintfs = RFPGA0_XCD_RFINTERFACESW;  in _rtl88e_phy_init_bb_rf_register_definition()
819 	rtlphy->phyreg_def[RF90_PATH_D].rfintfi = RFPGA0_XCD_RFINTERFACERB;  in _rtl88e_phy_init_bb_rf_register_definition()
835 	rtlphy->phyreg_def[RF90_PATH_D].rflssi_select = RFPGA0_XCD_RFPARAMETER;  in _rtl88e_phy_init_bb_rf_register_definition()
840 	rtlphy->phyreg_def[RF90_PATH_D].rftxgain_stage = RFPGA0_TXGAINSTAGE;  in _rtl88e_phy_init_bb_rf_register_definition()
854 	rtlphy->phyreg_def[RF90_PATH_D].rfsw_ctrl =  in _rtl88e_phy_init_bb_rf_register_definition()
860 	rtlphy->phyreg_def[RF90_PATH_D].rfagc_control1 = ROFDM0_XDAGCCORE1;  in _rtl88e_phy_init_bb_rf_register_definition()
865 	rtlphy->phyreg_def[RF90_PATH_D].rfagc_control2 = ROFDM0_XDAGCCORE2;  in _rtl88e_phy_init_bb_rf_register_definition()
870 	rtlphy->phyreg_def[RF90_PATH_D].rfrxiq_imbal = ROFDM0_XDRXIQIMBALANCE;  in _rtl88e_phy_init_bb_rf_register_definition()
875 	rtlphy->phyreg_def[RF90_PATH_D].rfrx_afe = ROFDM0_XDRXAFE;  in _rtl88e_phy_init_bb_rf_register_definition()
880 	rtlphy->phyreg_def[RF90_PATH_D].rftxiq_imbal = ROFDM0_XDTXIQIMBALANCE;  in _rtl88e_phy_init_bb_rf_register_definition()