Lines Matching full:u8
402 u8 pkt_offset;
403 u8 txdw0;
416 u8 pkt_offset;
417 u8 txdw0;
595 u8 gain:7, trsw:1;
597 u8 trsw:1, gain:7;
606 u8 ch_corr[RTL8723A_MAX_RF_PATHS];
607 u8 cck_sig_qual_ofdm_pwdb_all;
608 u8 cck_agc_rpt_ofdm_cfosho_a;
609 u8 cck_rpt_b_ofdm_cfosho_b;
610 u8 reserved_1;
611 u8 noise_power_db_msb;
613 u8 pcts_mask[RTL8723A_MAX_RF_PATHS];
615 u8 path_rxsnr[RTL8723A_MAX_RF_PATHS];
616 u8 noise_power_db_lsb;
617 u8 reserved_2[3];
618 u8 stream_csi[RTL8723A_MAX_RF_PATHS];
619 u8 stream_target_csi[RTL8723A_MAX_RF_PATHS];
621 u8 reserved_3;
624 u8 antsel_rx_keep_2:1; /* ex_intf_flg:1; */
625 u8 sgi_en:1;
626 u8 rxsc:2;
627 u8 idle_long:1;
628 u8 r_ant_train_en:1;
629 u8 antenna_select_b:1;
630 u8 antenna_select:1;
632 u8 antenna_select:1;
633 u8 antenna_select_b:1;
634 u8 r_ant_train_en:1;
635 u8 idle_long:1;
636 u8 rxsc:2;
637 u8 sgi_en:1;
638 u8 antsel_rx_keep_2:1; /* ex_intf_flg:1; */
644 u8 page_num;
645 u8 pwdb;
647 u8 gain: 6;
648 u8 rsvd_0: 1;
649 u8 trsw: 1;
651 u8 trsw: 1;
652 u8 rsvd_0: 1;
653 u8 gain: 6;
655 u8 rsvd_1;
658 u8 rsvd_2;
660 u8 rxsc: 4;
661 u8 agc_table: 4;
663 u8 agc_table: 4;
664 u8 rxsc: 4;
666 u8 channel;
667 u8 band;
672 u8 antidx_a: 3;
673 u8 antidx_b: 3;
674 u8 rsvd_3: 2;
675 u8 antidx_c: 3;
676 u8 antidx_d: 3;
677 u8 rsvd_4:2;
679 u8 rsvd_3: 2;
680 u8 antidx_b: 3;
681 u8 antidx_a: 3;
682 u8 rsvd_4:2;
683 u8 antidx_d: 3;
684 u8 antidx_c: 3;
688 u8 signal_quality;
690 u8 vga:5;
691 u8 lna_l:3;
692 u8 bb_power:6;
693 u8 rsvd_9:1;
694 u8 lna_h:1;
696 u8 lna_l:3;
697 u8 vga:5;
698 u8 lna_h:1;
699 u8 rsvd_9:1;
700 u8 bb_power:6;
702 u8 rsvd_5;
716 u8 page_num;
717 u8 pwdb[4];
719 u8 l_rxsc: 4;
720 u8 ht_rxsc: 4;
722 u8 ht_rxsc: 4;
723 u8 l_rxsc: 4;
725 u8 channel;
727 u8 band: 2;
728 u8 rsvd_0: 1;
729 u8 hw_antsw_occu: 1;
730 u8 gnt_bt: 1;
731 u8 ldpc: 1;
732 u8 stbc: 1;
733 u8 beamformed: 1;
735 u8 beamformed: 1;
736 u8 stbc: 1;
737 u8 ldpc: 1;
738 u8 gnt_bt: 1;
739 u8 hw_antsw_occu: 1;
740 u8 rsvd_0: 1;
741 u8 band: 2;
747 u8 antidx_a: 3;
748 u8 antidx_b: 3;
749 u8 rsvd_1: 2;
750 u8 antidx_c: 3;
751 u8 antidx_d: 3;
752 u8 rsvd_2: 2;
754 u8 rsvd_1: 2;
755 u8 antidx_b: 3;
756 u8 antidx_a: 3;
757 u8 rsvd_2: 2;
758 u8 antidx_d: 3;
759 u8 antidx_c: 3;
763 u8 paid;
765 u8 paid_msb: 1;
766 u8 gid: 6;
767 u8 rsvd_3: 1;
769 u8 rsvd_3: 1;
770 u8 gid: 6;
771 u8 paid_msb: 1;
773 u8 intf_pos;
775 u8 intf_pos_msb: 1;
776 u8 rsvd_4: 2;
777 u8 nb_intf_flag: 1;
778 u8 rf_mode: 2;
779 u8 rsvd_5: 2;
781 u8 rsvd_5: 2;
782 u8 rf_mode: 2;
783 u8 nb_intf_flag: 1;
784 u8 rsvd_4: 2;
785 u8 intf_pos_msb: 1;
800 u8 page_num;
801 u8 pwdb[4];
803 u8 l_rxsc: 4;
804 u8 ht_rxsc: 4;
806 u8 ht_rxsc: 4;
807 u8 l_rxsc: 4;
809 u8 channel;
811 u8 band: 2;
812 u8 rsvd_0: 1;
813 u8 hw_antsw_occu: 1;
814 u8 gnt_bt: 1;
815 u8 ldpc: 1;
816 u8 stbc: 1;
817 u8 beamformed: 1;
819 u8 beamformed: 1;
820 u8 stbc: 1;
821 u8 ldpc: 1;
822 u8 gnt_bt: 1;
823 u8 hw_antsw_occu: 1;
824 u8 rsvd_0: 1;
825 u8 band: 2;
830 u8 shift_l_map: 6;
831 u8 rsvd_1: 2;
833 u8 rsvd_1: 2;
834 u8 shift_l_map: 6;
836 u8 cnt_pw2cca;
838 u8 agc_table_a: 4;
839 u8 agc_table_b: 4;
840 u8 agc_table_c: 4;
841 u8 agc_table_d: 4;
843 u8 agc_table_b: 4;
844 u8 agc_table_a: 4;
845 u8 agc_table_d: 4;
846 u8 agc_table_c: 4;
850 u8 cnt_cca2agc_rdy;
852 u8 gain_a: 6;
853 u8 rsvd_2: 1;
854 u8 trsw_a: 1;
855 u8 gain_b: 6;
856 u8 rsvd_3: 1;
857 u8 trsw_b: 1;
858 u8 gain_c: 6;
859 u8 rsvd_4: 1;
860 u8 trsw_c: 1;
861 u8 gain_d: 6;
862 u8 rsvd_5: 1;
863 u8 trsw_d: 1;
864 u8 aagc_step_a: 2;
865 u8 aagc_step_b: 2;
866 u8 aagc_step_c: 2;
867 u8 aagc_step_d: 2;
869 u8 trsw_a: 1;
870 u8 rsvd_2: 1;
871 u8 gain_a: 6;
872 u8 trsw_b: 1;
873 u8 rsvd_3: 1;
874 u8 gain_b: 6;
875 u8 trsw_c: 1;
876 u8 rsvd_4: 1;
877 u8 gain_c: 6;
878 u8 trsw_d: 1;
879 u8 rsvd_5: 1;
880 u8 gain_d: 6;
881 u8 aagc_step_d: 2;
882 u8 aagc_step_c: 2;
883 u8 aagc_step_b: 2;
884 u8 aagc_step_a: 2;
886 u8 ht_aagc_gain[4];
887 u8 dagc_gain[4];
889 u8 counter: 6;
890 u8 rsvd_6: 2;
891 u8 syn_count: 5;
892 u8 rsvd_7:3;
894 u8 rsvd_6: 2;
895 u8 counter: 6;
896 u8 rsvd_7:3;
897 u8 syn_count: 5;
913 u8 category; /* AP/NIC and USB/PCI */
914 u8 function;
917 u8 minor_version; /* FW Subversion, default 0x00 */
918 u8 reserved1;
920 u8 month; /* Release time Month field */
921 u8 date; /* Release time Date field */
922 u8 hour; /* Release time Hour field */
923 u8 minute; /* Release time Minute field */
934 u8 data[];
977 u8 res0[0xe];
978 u8 cck_tx_power_index_A[3]; /* 0x10 */
979 u8 cck_tx_power_index_B[3];
980 u8 ht40_1s_tx_power_index_A[3]; /* 0x16 */
981 u8 ht40_1s_tx_power_index_B[3];
990 u8 channel_plan; /* 0x28 */
991 u8 tssi_a;
992 u8 thermal_meter;
993 u8 rf_regulatory;
994 u8 rf_option_2;
995 u8 rf_option_3;
996 u8 rf_option_4;
997 u8 res7;
998 u8 version /* 0x30 */;
999 u8 customer_id_major;
1000 u8 customer_id_minor;
1001 u8 xtal_k;
1002 u8 chipset; /* 0x34 */
1003 u8 res8[0x82];
1004 u8 vid; /* 0xb7 */
1005 u8 res9;
1006 u8 pid; /* 0xb9 */
1007 u8 res10[0x0c];
1008 u8 mac_addr[ETH_ALEN]; /* 0xc6 */
1009 u8 res11[2];
1010 u8 vendor_name[7];
1011 u8 res12[2];
1012 u8 device_name[0x29]; /* 0xd7 */
1018 u8 res0[2];
1025 u8 res1[4];
1026 u8 mac_addr[ETH_ALEN]; /* 0x16 */
1027 u8 res2[2];
1028 u8 vendor_name[7];
1029 u8 res3[3];
1030 u8 device_name[0x14]; /* 0x28 */
1031 u8 res4[0x1e]; /* 0x3c */
1032 u8 cck_tx_power_index_A[3]; /* 0x5a */
1033 u8 cck_tx_power_index_B[3];
1034 u8 ht40_1s_tx_power_index_A[3]; /* 0x60 */
1035 u8 ht40_1s_tx_power_index_B[3];
1045 u8 channel_plan; /* 0x75 */
1046 u8 tssi_a;
1047 u8 tssi_b;
1048 u8 thermal_meter; /* xtal_k */ /* 0x78 */
1049 u8 rf_regulatory;
1050 u8 rf_option_2;
1051 u8 rf_option_3;
1052 u8 rf_option_4;
1053 u8 res5[1]; /* 0x7d */
1054 u8 version;
1055 u8 customer_id;
1073 u8 cck_base[6];
1074 u8 ht40_base[5];
1077 u8 dummy5g[24]; /* max channel group (14) + power diff offset (10) */
1082 u8 res0[0x0e];
1087 u8 channel_plan; /* 0xb8 */
1088 u8 xtal_k;
1089 u8 thermal_meter;
1090 u8 iqk_lck;
1091 u8 pa_type; /* 0xbc */
1092 u8 lna_type_2g; /* 0xbd */
1093 u8 res2[3];
1094 u8 rf_board_option;
1095 u8 rf_feature_option;
1096 u8 rf_bt_setting;
1097 u8 eeprom_version;
1098 u8 eeprom_customer_id;
1099 u8 res3[2];
1100 u8 tx_pwr_calibrate_rate;
1101 u8 rf_antenna_option; /* 0xc9 */
1102 u8 rfe_option;
1103 u8 res4[9];
1104 u8 usb_optional_function;
1105 u8 res5[0x1e];
1106 u8 res6[2];
1107 u8 serial[0x0b]; /* 0xf5 */
1108 u8 vid; /* 0x100 */
1109 u8 res7;
1110 u8 pid;
1111 u8 res8[4];
1112 u8 mac_addr[ETH_ALEN]; /* 0x107 */
1113 u8 res9[2];
1114 u8 vendor_name[0x07];
1115 u8 res10[2];
1116 u8 device_name[0x14];
1117 u8 res11[0xcf];
1118 u8 package_type; /* 0x1fb */
1119 u8 res12[0x4];
1123 u8 cck_base[6];
1124 u8 ht40_base[5];
1127 u8 dummy5g[24]; /* max channel group (14) + power diff offset (10) */
1132 u8 res0[0x0e];
1135 u8 res2[0x54];
1136 u8 channel_plan; /* 0xb8 */
1137 u8 xtal_k;
1138 u8 thermal_meter;
1139 u8 iqk_lck;
1140 u8 pa_type; /* 0xbc */
1141 u8 lna_type_2g; /* 0xbd */
1142 u8 res3[1];
1143 u8 lna_type_5g; /* 0xbf */
1144 u8 res4[1];
1145 u8 rf_board_option;
1146 u8 rf_feature_option;
1147 u8 rf_bt_setting;
1148 u8 eeprom_version;
1149 u8 eeprom_customer_id;
1150 u8 res5[3];
1151 u8 rf_antenna_option; /* 0xc9 */
1152 u8 res6[6];
1153 u8 vid; /* 0xd0 */
1154 u8 res7[1];
1155 u8 pid; /* 0xd2 */
1156 u8 res8[1];
1157 u8 usb_optional_function;
1158 u8 res9[2];
1159 u8 mac_addr[ETH_ALEN]; /* 0xd7 */
1160 u8 device_info[80];
1161 u8 res11[3];
1162 u8 unknown[0x0d]; /* 0x130 */
1163 u8 res12[0xc3];
1167 u8 cck_base[6];
1168 u8 ht40_base[5];
1175 u8 res0[0x0e];
1177 u8 res1[0x9c]; /* 0x1c */
1178 u8 channel_plan; /* 0xb8 */
1179 u8 xtal_k;
1180 u8 thermal_meter;
1181 u8 iqk_lck;
1182 u8 res2[5];
1183 u8 rf_board_option;
1184 u8 rf_feature_option;
1185 u8 rf_bt_setting;
1186 u8 eeprom_version;
1187 u8 eeprom_customer_id;
1188 u8 res3[2];
1189 u8 kfree_thermal_k_on;
1190 u8 rf_antenna_option; /* 0xc9 */
1191 u8 rfe_option;
1192 u8 country_code;
1193 u8 res4[4];
1194 u8 vid; /* 0xd0 */
1195 u8 res5[1];
1196 u8 pid; /* 0xd2 */
1197 u8 res6[1];
1198 u8 usb_optional_function;
1199 u8 res7[2];
1200 u8 mac_addr[ETH_ALEN]; /* 0xd7 */
1201 u8 res8[2];
1202 u8 vendor_name[7];
1203 u8 res9[2];
1204 u8 device_name[7]; /* 0xe8 */
1205 u8 res10[0x41];
1206 u8 unknown[0x0d]; /* 0x130 */
1207 u8 res11[0xc3];
1212 u8 res0[0x0e];
1214 u8 res1[0x7e]; /* 0x3a */
1215 u8 channel_plan; /* 0xb8 */
1216 u8 xtal_k;
1217 u8 thermal_meter;
1218 u8 iqk_lck;
1219 u8 res2[5];
1220 u8 rf_board_option;
1221 u8 rf_feature_option;
1222 u8 rf_bt_setting;
1223 u8 eeprom_version;
1224 u8 eeprom_customer_id;
1225 u8 res3[3];
1226 u8 rf_antenna_option; /* 0xc9 */
1227 u8 res4[6];
1228 u8 vid; /* 0xd0 */
1229 u8 res5[1];
1230 u8 pid; /* 0xd2 */
1231 u8 res6[1];
1232 u8 usb_optional_function;
1233 u8 res7[2];
1234 u8 mac_addr[ETH_ALEN]; /* 0xd7 */
1235 u8 res8[2];
1236 u8 vendor_name[7];
1237 u8 res9[2];
1238 u8 device_name[0x0b]; /* 0xe8 */
1239 u8 res10[2];
1240 u8 serial[0x0b]; /* 0xf5 */
1241 u8 res11[0x30];
1242 u8 unknown[0x0d]; /* 0x130 */
1243 u8 res12[0xc3];
1248 u8 res0[0x1e];
1250 u8 res1[0x9c]; /* 0x2c */
1251 u8 channel_plan; /* 0xc8 */
1252 u8 xtal_k; /* 0xc9 */
1253 u8 thermal_meter; /* 0xca */
1254 u8 res2[0x4f];
1255 u8 mac_addr[ETH_ALEN]; /* 0x11a */
1256 u8 res3[0x11];
1257 u8 rf_board_option; /* 0x131 */
1258 u8 res4[2];
1259 u8 eeprom_version; /* 0x134 */
1260 u8 eeprom_customer_id; /* 0x135 */
1261 u8 res5[5];
1262 u8 country_code; /* 0x13b */
1263 u8 res6[0x84];
1264 u8 vid[2]; /* 0x1c0 */
1265 u8 pid[2]; /* 0x1c2 */
1266 u8 res7[0x3c];
1271 u8 res0[0x0e];
1274 u8 res2[0x54];
1275 u8 channel_plan; /* 0xb8 */
1276 u8 xtal_k; /* 0xb9 */
1277 u8 thermal_meter; /* 0xba */
1278 u8 iqk_lck; /* 0xbb */
1279 u8 pa_type; /* 0xbc */
1280 u8 lna_type_2g; /* 0xbd */
1281 u8 res3[1];
1282 u8 lna_type_5g; /* 0xbf */
1283 u8 res4[1];
1284 u8 rf_board_option; /* 0xc1 */
1285 u8 rf_feature_option; /* 0xc2 */
1286 u8 rf_bt_setting; /* 0xc3 */
1287 u8 eeprom_version; /* 0xc4 */
1288 u8 eeprom_customer_id; /* 0xc5 */
1289 u8 res5[3];
1290 u8 rf_antenna_option; /* 0xc9 */
1291 u8 rfe_option; /* 0xca */
1292 u8 country_code; /* 0xcb */
1293 u8 res6[52];
1294 u8 vid[2]; /* 0x100 */
1295 u8 pid[2]; /* 0x102 */
1296 u8 usb_optional_function; /* 0x104 */
1297 u8 res7[2];
1298 u8 mac_addr[ETH_ALEN]; /* 0x107 */
1299 u8 device_info[80]; /* 0x10d */
1300 u8 res9[163];
1305 u8 val;
1314 u8 reg;
1427 u8 cmd;
1428 u8 data[7];
1439 u8 cmd;
1440 u8 data;
1443 u8 cmd;
1445 u8 arg;
1449 u8 cmd;
1450 u8 parm;
1451 u8 macid;
1452 u8 macid_end;
1455 u8 cmd;
1456 u8 macid;
1461 u8 data1;
1469 u8 data2;
1470 u8 ramask0;
1471 u8 ramask1;
1472 u8 ramask2;
1473 u8 ramask3;
1476 u8 cmd;
1477 u8 data1;
1478 u8 data2;
1479 u8 data3;
1480 u8 data4;
1481 u8 data5;
1484 u8 cmd;
1485 u8 data;
1488 u8 cmd;
1489 u8 operreq;
1490 u8 opcode;
1491 u8 data;
1492 u8 addr;
1495 u8 cmd;
1496 u8 data;
1499 u8 cmd;
1500 u8 data;
1503 u8 cmd;
1504 u8 ant_inverse;
1505 u8 int_switch_type;
1508 u8 cmd;
1509 u8 data;
1512 u8 cmd;
1513 u8 macid;
1514 u8 unknown0;
1515 u8 rssi;
1522 u8 data;
1527 u8 ra_th_offset;
1528 u8 unknown1;
1529 u8 unknown2;
1605 u8 id;
1606 u8 seq;
1609 u8 payload[0];
1612 u8 ext_id;
1613 u8 status:4;
1614 u8 retlen:4;
1615 u8 opcode_ver:4;
1616 u8 req_num:4;
1617 u8 payload[2];
1620 u8 response_source:4;
1621 u8 dummy0_0:4;
1623 u8 bt_info;
1625 u8 retry_count:4;
1626 u8 dummy2_0:1;
1627 u8 bt_page:1;
1628 u8 tx_rx_mask:1;
1629 u8 dummy2_2:1;
1631 u8 rssi;
1633 u8 basic_rate:1;
1634 u8 bt_has_reset:1;
1635 u8 dummy4_1:1;
1636 u8 ignore_wlan:1;
1637 u8 auto_report:1;
1638 u8 dummy4_2:3;
1640 u8 a4;
1641 u8 a5;
1644 u8 rate:7;
1645 u8 sgi:1;
1646 u8 macid;
1647 u8 ldpc:1;
1648 u8 txbf:1;
1649 u8 noisy_state:1;
1650 u8 dummy2_0:5;
1651 u8 dummy3_0;
1652 u8 dummy4_0;
1653 u8 dummy5_0;
1654 u8 bw;
1714 u8 bt_status;
1737 u8 desc_rate;
1741 u8 rate_id;
1744 u8 rate_sgi;
1745 u8 rssi_sta_ra; /* Percentage */
1746 u8 pre_rssi_sta_ra;
1747 u8 sgi_enable;
1748 u8 decision_rate;
1749 u8 pre_rate;
1750 u8 highest_rate;
1751 u8 lowest_rate;
1759 u8 dynamic_tx_rpt_timing_counter;
1760 u8 ra_waiting_counter;
1761 u8 ra_pending_counter;
1762 u8 ra_drop_after_down;
1763 u8 pt_try_state; /* 0 trying state, 1 for decision state */
1764 u8 pt_stage; /* 0~6 */
1765 u8 pt_stop_count; /* Stop PT counter */
1766 u8 pt_pre_rate; /* if rate change do PT */
1767 u8 pt_pre_rssi; /* if RSSI change 5% do PT */
1768 u8 pt_mode_ss; /* decide which rate should do PT */
1769 u8 ra_stage; /* StageRA, decide how many times RA will be done between PT */
1770 u8 pt_smooth_factor;
1781 u8 crystal_cap;
1808 u8 mac_addr[ETH_ALEN];
1811 u8 cck_tx_power_index_A[RTL8XXXU_MAX_CHANNEL_GROUPS];
1812 u8 cck_tx_power_index_B[RTL8XXXU_MAX_CHANNEL_GROUPS];
1813 u8 ht40_1s_tx_power_index_A[RTL8XXXU_MAX_CHANNEL_GROUPS];
1814 u8 ht40_1s_tx_power_index_B[RTL8XXXU_MAX_CHANNEL_GROUPS];
1833 u8 package_type;
1854 u8 default_crystal_cap;
1855 u8 rfe_type;
1859 u8 out_ep[RTL8XXXU_OUT_ENDPOINTS];
1860 u8 ep_tx_count;
1861 u8 rf_paths;
1862 u8 rx_paths;
1863 u8 tx_paths;
1887 u8 val8;
1890 u8 raw[EFUSE_MAP_LEN];
1905 u8 pi_enabled:1;
1906 u8 no_pape:1;
1907 u8 int_buf[USB_INTR_CONTENT_LENGTH];
1934 u8 macid;
1936 u8 rssi_level;
1941 u8 hw_key_idx;
1986 u32 ramask, u8 rateid, int sgi, int txbw_40mhz,
1987 u8 macid);
1989 u8 macid, u8 role, bool connect);
1990 void (*report_rssi) (struct rtl8xxxu_priv *priv, u8 macid, u8 rssi);
1995 u32 rts_rate, u8 macid);
1996 void (*set_crystal_cap) (struct rtl8xxxu_priv *priv, u8 crystal_cap);
2004 u8 has_s0s1:1;
2005 u8 has_tx_report:1;
2006 u8 gen2_thermal_meter:1;
2007 u8 needs_full_init:1;
2008 u8 init_reg_rxfltmap:1;
2009 u8 init_reg_pkt_life_time:1;
2010 u8 init_reg_hmtfr:1;
2011 u8 supports_concurrent:1;
2012 u8 ampdu_max_time;
2013 u8 ustime_tsf_edca;
2015 u8 supports_ap:1;
2023 u8 pbp_rx;
2024 u8 pbp_tx;
2026 u8 total_page_num;
2027 u8 page_num_hi;
2028 u8 page_num_lo;
2029 u8 page_num_norm;
2030 u8 last_llt_entry;
2036 u8 rtl8xxxu_read8(struct rtl8xxxu_priv *priv, u16 addr);
2039 int rtl8xxxu_write8(struct rtl8xxxu_priv *priv, u16 addr, u8 val);
2042 int rtl8xxxu_write8_set(struct rtl8xxxu_priv *priv, u16 addr, u8 bits);
2043 int rtl8xxxu_write8_clear(struct rtl8xxxu_priv *priv, u16 addr, u8 bits);
2052 enum rtl8xxxu_rfpath path, u8 reg);
2054 enum rtl8xxxu_rfpath path, u8 reg, u32 data);
2056 enum rtl8xxxu_rfpath path, u8 reg,
2086 int rtl8xxxu_read_efuse8(struct rtl8xxxu_priv *priv, u16 offset, u8 *data);
2090 void rtl8xxxu_gen2_prepare_calibrate(struct rtl8xxxu_priv *priv, u8 start);
2111 u32 ramask, u8 rateid, int sgi, int txbw_40mhz, u8 macid);
2113 u32 ramask, u8 rateid, int sgi, int txbw_40mhz, u8 macid);
2115 u8 macid, u8 role, bool connect);
2117 u8 macid, u8 role, bool connect);
2118 void rtl8xxxu_gen1_report_rssi(struct rtl8xxxu_priv *priv, u8 macid, u8 rssi);
2119 void rtl8xxxu_gen2_report_rssi(struct rtl8xxxu_priv *priv, u8 macid, u8 rssi);
2146 u32 rts_rate, u8 macid);
2151 u32 rts_rate, u8 macid);
2156 u32 rts_rate, u8 macid);
2158 u8 arg1, u8 arg2, u8 arg3, u8 arg4, u8 arg5);
2160 void rtl8723a_set_crystal_cap(struct rtl8xxxu_priv *priv, u8 crystal_cap);
2161 void rtl8188f_set_crystal_cap(struct rtl8xxxu_priv *priv, u8 crystal_cap);
2164 u8 rate, u8 sgi, u8 bw);