585 	val32 = rtl8xxxu_read32(priv, REG_FPGA0_IQK);  in rtl8723bu_iqk_path_a()
587 	rtl8xxxu_write32(priv, REG_FPGA0_IQK, val32);  in rtl8723bu_iqk_path_a()
622 	val32 = rtl8xxxu_read32(priv, REG_FPGA0_IQK);  in rtl8723bu_iqk_path_a()
625 	rtl8xxxu_write32(priv, REG_FPGA0_IQK, val32);  in rtl8723bu_iqk_path_a()
658 	val32 = rtl8xxxu_read32(priv, REG_FPGA0_IQK);  in rtl8723bu_iqk_path_a()
660 	rtl8xxxu_write32(priv, REG_FPGA0_IQK, val32);  in rtl8723bu_iqk_path_a()
695 	val32 = rtl8xxxu_read32(priv, REG_FPGA0_IQK);  in rtl8723bu_rx_iqk_path_a()
697 	rtl8xxxu_write32(priv, REG_FPGA0_IQK, val32);  in rtl8723bu_rx_iqk_path_a()
732 	val32 = rtl8xxxu_read32(priv, REG_FPGA0_IQK);  in rtl8723bu_rx_iqk_path_a()
735 	rtl8xxxu_write32(priv, REG_FPGA0_IQK, val32);  in rtl8723bu_rx_iqk_path_a()
768 	val32 = rtl8xxxu_read32(priv, REG_FPGA0_IQK);  in rtl8723bu_rx_iqk_path_a()
770 	rtl8xxxu_write32(priv, REG_FPGA0_IQK, val32);  in rtl8723bu_rx_iqk_path_a()
798 	val32 = rtl8xxxu_read32(priv, REG_FPGA0_IQK);  in rtl8723bu_rx_iqk_path_a()
800 	rtl8xxxu_write32(priv, REG_FPGA0_IQK, val32);  in rtl8723bu_rx_iqk_path_a()
836 	val32 = rtl8xxxu_read32(priv, REG_FPGA0_IQK);  in rtl8723bu_rx_iqk_path_a()
839 	rtl8xxxu_write32(priv, REG_FPGA0_IQK, val32);  in rtl8723bu_rx_iqk_path_a()
867 	val32 = rtl8xxxu_read32(priv, REG_FPGA0_IQK);  in rtl8723bu_rx_iqk_path_a()
869 	rtl8xxxu_write32(priv, REG_FPGA0_IQK, val32);  in rtl8723bu_rx_iqk_path_a()
955 	val32 = rtl8xxxu_read32(priv, REG_FPGA0_IQK);  in rtl8723bu_phy_iqcalibrate()
957 	rtl8xxxu_write32(priv, REG_FPGA0_IQK, val32);  in rtl8723bu_phy_iqcalibrate()
976 			val32 = rtl8xxxu_read32(priv, REG_FPGA0_IQK);  in rtl8723bu_phy_iqcalibrate()
978 			rtl8xxxu_write32(priv, REG_FPGA0_IQK, val32);  in rtl8723bu_phy_iqcalibrate()
1019 		val32 = rtl8xxxu_read32(priv, REG_FPGA0_IQK);  in rtl8723bu_phy_iqcalibrate()
1021 		rtl8xxxu_write32(priv, REG_FPGA0_IQK, val32);  in rtl8723bu_phy_iqcalibrate()
1024 		val32 = rtl8xxxu_read32(priv, REG_FPGA0_IQK);  in rtl8723bu_phy_iqcalibrate()
1027 		rtl8xxxu_write32(priv, REG_FPGA0_IQK, val32);  in rtl8723bu_phy_iqcalibrate()
1065 	val32 = rtl8xxxu_read32(priv, REG_FPGA0_IQK);  in rtl8723bu_phy_iqcalibrate()
1067 	rtl8xxxu_write32(priv, REG_FPGA0_IQK, val32);  in rtl8723bu_phy_iqcalibrate()
1646 	val32 = rtl8xxxu_read32(priv, REG_FPGA0_IQK);  in rtl8723bu_init_statistics()
1648 	rtl8xxxu_write32(priv, REG_FPGA0_IQK, val32);  in rtl8723bu_init_statistics()