832 	val32 = rtl8xxxu_read32(priv, REG_FPGA0_IQK);  in rtl8710bu_init_statistics()
834 	rtl8xxxu_write32(priv, REG_FPGA0_IQK, val32);  in rtl8710bu_init_statistics()
1003 	val32 = rtl8xxxu_read32(priv, REG_FPGA0_IQK);  in rtl8710bu_iqk_path_a()
1005 	rtl8xxxu_write32(priv, REG_FPGA0_IQK, val32);  in rtl8710bu_iqk_path_a()
1026 	val32 = rtl8xxxu_read32(priv, REG_FPGA0_IQK);  in rtl8710bu_iqk_path_a()
1028 	rtl8xxxu_write32(priv, REG_FPGA0_IQK, val32);  in rtl8710bu_iqk_path_a()
1051 	val32 = rtl8xxxu_read32(priv, REG_FPGA0_IQK);  in rtl8710bu_iqk_path_a()
1053 	rtl8xxxu_write32(priv, REG_FPGA0_IQK, val32);  in rtl8710bu_iqk_path_a()
1087 	val32 = rtl8xxxu_read32(priv, REG_FPGA0_IQK);  in rtl8710bu_rx_iqk_path_a()
1089 	rtl8xxxu_write32(priv, REG_FPGA0_IQK, val32);  in rtl8710bu_rx_iqk_path_a()
1110 	val32 = rtl8xxxu_read32(priv, REG_FPGA0_IQK);  in rtl8710bu_rx_iqk_path_a()
1112 	rtl8xxxu_write32(priv, REG_FPGA0_IQK, val32);  in rtl8710bu_rx_iqk_path_a()
1153 		val32 = rtl8xxxu_read32(priv, REG_FPGA0_IQK);  in rtl8710bu_rx_iqk_path_a()
1155 		rtl8xxxu_write32(priv, REG_FPGA0_IQK, val32);  in rtl8710bu_rx_iqk_path_a()
1170 	val32 = rtl8xxxu_read32(priv, REG_FPGA0_IQK);  in rtl8710bu_rx_iqk_path_a()
1172 	rtl8xxxu_write32(priv, REG_FPGA0_IQK, val32);  in rtl8710bu_rx_iqk_path_a()
1194 	val32 = rtl8xxxu_read32(priv, REG_FPGA0_IQK);  in rtl8710bu_rx_iqk_path_a()
1196 	rtl8xxxu_write32(priv, REG_FPGA0_IQK, val32);  in rtl8710bu_rx_iqk_path_a()
1224 	val32 = rtl8xxxu_read32(priv, REG_FPGA0_IQK);  in rtl8710bu_rx_iqk_path_a()
1226 	rtl8xxxu_write32(priv, REG_FPGA0_IQK, val32);  in rtl8710bu_rx_iqk_path_a()
1331 	val32 = rtl8xxxu_read32(priv, REG_FPGA0_IQK);  in rtl8710bu_phy_iqcalibrate()
1333 	rtl8xxxu_write32(priv, REG_FPGA0_IQK, val32);  in rtl8710bu_phy_iqcalibrate()
1373 	val32 = rtl8xxxu_read32(priv, REG_FPGA0_IQK);  in rtl8710bu_phy_iqcalibrate()
1375 	rtl8xxxu_write32(priv, REG_FPGA0_IQK, val32);  in rtl8710bu_phy_iqcalibrate()