ralink/rt2x00/rt61pci.h

1 /* SPDX-License-Identifier: GPL-2.0-or-later */
3 	Copyright (C) 2004 - 2009 Ivo van Doorn <IvDoorn@gmail.com>
34  * Default offset is required for RSSI <-> dBm conversion.
121  * 16 entries 32-byte for shared key table
122  * 64 entries 32-byte for pairwise key table
123  * 64 entries 8-byte for pairwise ta key table
152  * Other on-chip shared memory space.
164  * On-chip BEACON frame space.
175  * HOST-MCU shared memory.
179  * H2M_MAILBOX_CSR: Host-to-MCU Mailbox.
249  *	to determine the UNICAST_TO_ME bit for RX frames.
272  *	when determining the MY_BSS of RX frames.
273  *		0: 1-BSSID mode (BSS index = 0)
274  *		1: 2-BSSID mode (BSS index: Byte5, bit 0)
275  *		2: 2-BSSID mode (BSS index: byte5, bit 1)
276  *		3: 4-BSSID mode (BSS index: byte5, bit 0 - 1)
304  * MAC_CSR9: Back-Off control register.
306  * CWMIN: Bit for Cwmin. default Cwmin is 31 (2^5 - 1).
307  * CWMAX: Bit for Cwmax, default Cwmax is 1023 (2^10 - 1).
391  * TXRX_CSR0: TX/RX configuration register.
394  * DISABLE_RX: Disable Rx engine.
461  * TXRX_CSR4: Auto-Responder/Tx-retry register.
464  * OFDM_TX_RATE_STEP: 0:1-step, 1: 2-step, 2:3-step, 3:4-step.
511  * TSF_SYNC: Tsf sync, 0: disable, 1: infra, 2: ad-hoc/master mode.
572  * PHY_CSR2: Pre-TX BBP control.
605  * PHY_CSR5: RX to TX signal switch timing control.
611  * PHY_CSR6: TX to RX signal timing control.
626  * SEC_CSR0: Shared key table control.
647  * SEC_CSR1: Shared key table security mode register.
677  * SEC_CSR5: shared key table security mode register.
694  * STA_CSR0: RX PLCP error count & RX FCS error count.
701  * STA_CSR1: RX False CCA count & RX LONG frame count.
708  * STA_CSR2: TX Beacon count and RX FIFO overflow count.
758  * RX QOS-CFPOLL MAC address register.
759  * QOS_CSR3: RX QOS-CFPOLL MAC address 0.
760  * QOS_CSR4: RX QOS-CFPOLL MAC address 1.
766  * QOS_CSR5: "QosControl" field of the RX QOS-CFPOLL.
815  * TXD_SIZE: In unit of 32-bit.
896  * LOAD_TX_RING_CSR: Load RX desriptor
906  * Several read-only registers, for debugging.
922  * RXD_SIZE: In unit of 32-bit.
937  * RXPTR_CSR: Read-only, for debugging.
1106  * R4: RX antenna control
1107  * FRAME_END: 1 - DPDT, 0 - SPDT (Only valid for 802.11G, RF2527 & RF2529)
1290  * KEY_TABLE: Use per-client pairwise KEY table.
1293  * 0~3 to shared KEY table 0 (BSS0).
1294  * 4~7 to shared KEY table 1 (BSS1).
1295  * 8~11 to shared KEY table 2 (BSS2).
1296  * 12~15 to shared KEY table 3 (BSS3).
1362  * the above 24-byte is called TXINFO and will be DMAed to MAC block
1372  * Word6-10: Buffer physical address
1381  * Word11-13: Buffer length
1400  * RX descriptor format for RX Ring.
1423  * SIGNAL: RX raw data rate reported by BBP.
1450  * the above 20-byte is called RXINFO and will be DMAed to MAC RX block
1462  * Word6-15: Reserved