60 	for (i = 0; i < 200; i++) {  in rt2800pci_mcu_status()
75 	rt2x00mmio_register_write(rt2x00dev, H2M_MAILBOX_STATUS, ~0);  in rt2800pci_mcu_status()
76 	rt2x00mmio_register_write(rt2x00dev, H2M_MAILBOX_CID, ~0);  in rt2800pci_mcu_status()
97 	u32 reg = 0;  in rt2800pci_eepromregister_write()
121 	case 0:  in rt2800pci_read_eeprom_pci()
131 	eeprom.reg_data_in = 0;  in rt2800pci_read_eeprom_pci()
132 	eeprom.reg_data_out = 0;  in rt2800pci_read_eeprom_pci()
133 	eeprom.reg_data_clock = 0;  in rt2800pci_read_eeprom_pci()
134 	eeprom.reg_chip_select = 0;  in rt2800pci_read_eeprom_pci()
139 	return 0;  in rt2800pci_read_eeprom_pci()
174 	reg = 0;  in rt2800pci_write_firmware()
184 	rt2x00mmio_register_write(rt2x00dev, PBF_SYS_CTRL, 0x00000);  in rt2800pci_write_firmware()
185 	rt2x00mmio_register_write(rt2x00dev, PBF_SYS_CTRL, 0x00001);  in rt2800pci_write_firmware()
187 	rt2x00mmio_register_write(rt2x00dev, H2M_BBP_AGENT, 0);  in rt2800pci_write_firmware()
188 	rt2x00mmio_register_write(rt2x00dev, H2M_MAILBOX_CSR, 0);  in rt2800pci_write_firmware()
190 	return 0;  in rt2800pci_write_firmware()
205 	rt2x00mmio_register_write(rt2x00dev, H2M_MAILBOX_STATUS, ~0);  in rt2800pci_enable_radio()
206 	rt2x00mmio_register_write(rt2x00dev, H2M_MAILBOX_CID, ~0);  in rt2800pci_enable_radio()
208 	rt2800_mcu_request(rt2x00dev, MCU_SLEEP, TOKEN_RADIO_OFF, 0xff, 0x02);  in rt2800pci_enable_radio()
211 	rt2800_mcu_request(rt2x00dev, MCU_WAKEUP, TOKEN_WAKEUP, 0, 0);  in rt2800pci_enable_radio()
222 				   0, 0x02);  in rt2800pci_set_state()
226 					  0xffffffff);  in rt2800pci_set_state()
228 					  0xffffffff);  in rt2800pci_set_state()
230 				   0xff, 0x01);  in rt2800pci_set_state()
233 	return 0;  in rt2800pci_set_state()
239 	int retval = 0;  in rt2800pci_set_device_state()
400 	{ PCI_DEVICE(0x1814, 0x0601) },
401 	{ PCI_DEVICE(0x1814, 0x0681) },
402 	{ PCI_DEVICE(0x1814, 0x0701) },
403 	{ PCI_DEVICE(0x1814, 0x0781) },
404 	{ PCI_DEVICE(0x1814, 0x3090) },
405 	{ PCI_DEVICE(0x1814, 0x3091) },
406 	{ PCI_DEVICE(0x1814, 0x3092) },
407 	{ PCI_DEVICE(0x1432, 0x7708) },
408 	{ PCI_DEVICE(0x1432, 0x7727) },
409 	{ PCI_DEVICE(0x1432, 0x7728) },
410 	{ PCI_DEVICE(0x1432, 0x7738) },
411 	{ PCI_DEVICE(0x1432, 0x7748) },
412 	{ PCI_DEVICE(0x1432, 0x7758) },
413 	{ PCI_DEVICE(0x1432, 0x7768) },
414 	{ PCI_DEVICE(0x1462, 0x891a) },
415 	{ PCI_DEVICE(0x1a3b, 0x1059) },
417 	{ PCI_DEVICE(0x1814, 0x3290) },
420 	{ PCI_DEVICE(0x1814, 0x3390) },
423 	{ PCI_DEVICE(0x1432, 0x7711) },
424 	{ PCI_DEVICE(0x1432, 0x7722) },
425 	{ PCI_DEVICE(0x1814, 0x3060) },
426 	{ PCI_DEVICE(0x1814, 0x3062) },
427 	{ PCI_DEVICE(0x1814, 0x3562) },
428 	{ PCI_DEVICE(0x1814, 0x3592) },
429 	{ PCI_DEVICE(0x1814, 0x3593) },
430 	{ PCI_DEVICE(0x1814, 0x359f) },
433 	{ PCI_DEVICE(0x1814, 0x5360) },
434 	{ PCI_DEVICE(0x1814, 0x5362) },
435 	{ PCI_DEVICE(0x1814, 0x5390) },
436 	{ PCI_DEVICE(0x1814, 0x5392) },
437 	{ PCI_DEVICE(0x1814, 0x539a) },
438 	{ PCI_DEVICE(0x1814, 0x539b) },
439 	{ PCI_DEVICE(0x1814, 0x539f) },
441 	{ 0, }