30 	mt76_set(dev, MT_VEND_ADDR(CFG, 0x130), BIT(0) | BIT(16));  in mt76x2u_power_on_rf_patch()
33 	mt76_clear(dev, MT_VEND_ADDR(CFG, 0x1c), 0xff);  in mt76x2u_power_on_rf_patch()
34 	mt76_set(dev, MT_VEND_ADDR(CFG, 0x1c), 0x30);  in mt76x2u_power_on_rf_patch()
36 	mt76_wr(dev, MT_VEND_ADDR(CFG, 0x14), 0x484f);  in mt76x2u_power_on_rf_patch()
39 	mt76_set(dev, MT_VEND_ADDR(CFG, 0x130), BIT(17));  in mt76x2u_power_on_rf_patch()
42 	mt76_clear(dev, MT_VEND_ADDR(CFG, 0x130), BIT(16));  in mt76x2u_power_on_rf_patch()
45 	mt76_set(dev, MT_VEND_ADDR(CFG, 0x14c), BIT(19) | BIT(20));  in mt76x2u_power_on_rf_patch()
50 	int shift = unit ? 8 : 0;  in mt76x2u_power_on_rf()
54 	mt76_set(dev, MT_VEND_ADDR(CFG, 0x130), BIT(0) << shift);  in mt76x2u_power_on_rf()
58 	mt76_set(dev, MT_VEND_ADDR(CFG, 0x130), val);  in mt76x2u_power_on_rf()
62 	mt76_clear(dev, MT_VEND_ADDR(CFG, 0x130), BIT(2) << shift);  in mt76x2u_power_on_rf()
67 	mt76_set(dev, 0x530, 0xf);  in mt76x2u_power_on_rf()
75 	mt76_set(dev, MT_VEND_ADDR(CFG, 0x148),  in mt76x2u_power_on()
82 	mt76_poll(dev, MT_VEND_ADDR(CFG, 0x148), val, val, 1000);  in mt76x2u_power_on()
84 	mt76_clear(dev, MT_VEND_ADDR(CFG, 0x148), 0x7f << 16);  in mt76x2u_power_on()
87 	mt76_clear(dev, MT_VEND_ADDR(CFG, 0x148), 0xf << 24);  in mt76x2u_power_on()
90 	mt76_set(dev, MT_VEND_ADDR(CFG, 0x148), 0xf << 24);  in mt76x2u_power_on()
91 	mt76_clear(dev, MT_VEND_ADDR(CFG, 0x148), 0xfff);  in mt76x2u_power_on()
94 	mt76_clear(dev, MT_VEND_ADDR(CFG, 0x1204), BIT(3));  in mt76x2u_power_on()
97 	mt76_set(dev, MT_VEND_ADDR(CFG, 0x80), BIT(0));  in mt76x2u_power_on()
100 	mt76_clear(dev, MT_VEND_ADDR(CFG, 0x64), BIT(18));  in mt76x2u_power_on()
102 	mt76x2u_power_on_rf(dev, 0);  in mt76x2u_power_on()
117 	for (i = 0; i + 4 <= MT7612U_EEPROM_SIZE; i += 4) {  in mt76x2u_init_eeprom()
123 	return 0;  in mt76x2u_init_eeprom()
137 	if (err < 0)  in mt76x2u_init_hardware()
142 			    MT_WPDMA_GLO_CFG_RX_DMA_BUSY, 0, 100))  in mt76x2u_init_hardware()
152 	if (err < 0)  in mt76x2u_init_hardware()
156 	if (err < 0)  in mt76x2u_init_hardware()
166 	for (i = 0; i < 256; i++)  in mt76x2u_init_hardware()
167 		mt76x02_mac_wcid_setup(dev, i, 0, NULL);  in mt76x2u_init_hardware()
170 	for (i = 0; i < 16; i++) {  in mt76x2u_init_hardware()
171 		for (k = 0; k < 4; k++)  in mt76x2u_init_hardware()
177 	mt76_rmw(dev, MT_US_CYC_CFG, MT_US_CYC_CNT, 0x1e);  in mt76x2u_init_hardware()
178 	mt76_wr(dev, MT_TXOP_CTRL_CFG, 0x583f);  in mt76x2u_init_hardware()
180 	err = mt76x2_mcu_load_cr(dev, MT_RF_BBP_CR, 0, 0);  in mt76x2u_init_hardware()
181 	if (err < 0)  in mt76x2u_init_hardware()
202 	if (err < 0)  in mt76x2u_register_device()
211 	if (err < 0)  in mt76x2u_register_device()
215 	if (err < 0)  in mt76x2u_register_device()
231 	return 0;  in mt76x2u_register_device()