1 // SPDX-License-Identifier: GPL-2.0-only
37 	cnt_free = end - start + 1;  in mt76x0_efuse_physical_size_check()
39 	if (MT_EFUSE_USAGE_MAP_SIZE - cnt_free < 5) {  in mt76x0_efuse_physical_size_check()
40 		dev_err(dev->mt76.dev,  in mt76x0_efuse_physical_size_check()
42 		return -EINVAL;  in mt76x0_efuse_physical_size_check()
54 	dev_dbg(dev->mt76.dev, "2GHz %d 5GHz %d\n",  in mt76x0_set_chip_cap()
55 		dev->mphy.cap.has_2ghz, dev->mphy.cap.has_5ghz);  in mt76x0_set_chip_cap()
57 	if (dev->no_2ghz) {  in mt76x0_set_chip_cap()
58 		dev->mphy.cap.has_2ghz = false;  in mt76x0_set_chip_cap()
59 		dev_dbg(dev->mt76.dev, "mask out 2GHz support\n");  in mt76x0_set_chip_cap()
63 		dev->mphy.cap.has_5ghz = false;  in mt76x0_set_chip_cap()
64 		dev_dbg(dev->mt76.dev, "mask out 5GHz support\n");  in mt76x0_set_chip_cap()
71 		dev_dbg(dev->mt76.dev,  in mt76x0_set_chip_cap()
79 		dev_err(dev->mt76.dev, "invalid tx-rx stream\n");  in mt76x0_set_chip_cap()
88 		dev->cal.rx.temp_offset = mt76x02_sign_extend(val, 8);  in mt76x0_set_temp_offset()
90 		dev->cal.rx.temp_offset = -10;  in mt76x0_set_temp_offset()
95 	struct mt76x02_rx_freq_cal *caldata = &dev->cal.rx;  in mt76x0_set_freq_offset()
101 	caldata->freq_offset = val;  in mt76x0_set_freq_offset()
107 	caldata->freq_offset -= mt76x02_sign_extend(val, 8);  in mt76x0_set_freq_offset()
112 	struct ieee80211_channel *chan = dev->mphy.chandef.chan;  in mt76x0_read_rx_gain()
113 	struct mt76x02_rx_freq_cal *caldata = &dev->cal.rx;  in mt76x0_read_rx_gain()
118 	mt76x02_get_rx_gain(dev, chan->band, &rssi_offset, &lna_2g, lna_5g);  in mt76x0_read_rx_gain()
119 	caldata->lna_gain = mt76x02_get_lna_gain(dev, &lna_2g, lna_5g, chan);  in mt76x0_read_rx_gain()
121 	for (i = 0; i < ARRAY_SIZE(caldata->rssi_offset); i++) {  in mt76x0_read_rx_gain()
123 		if (val < -10 || val > 10)  in mt76x0_read_rx_gain()
126 		caldata->rssi_offset[i] = val;  in mt76x0_read_rx_gain()
132 	struct cfg80211_chan_def *chandef = &dev->mphy.chandef;  in mt76x0_get_delta()
135 	if (chandef->width == NL80211_CHAN_WIDTH_80) {  in mt76x0_get_delta()
137 	} else if (chandef->width == NL80211_CHAN_WIDTH_40) {  in mt76x0_get_delta()
141 		if (chandef->chan->band == NL80211_BAND_5GHZ)  in mt76x0_get_delta()
156 	bool is_2ghz = chan->band == NL80211_BAND_2GHZ;  in mt76x0_get_tx_power_per_rate()
164 	t->cck[0] = t->cck[1] = s6_to_s8(val);  in mt76x0_get_tx_power_per_rate()
165 	t->cck[2] = t->cck[3] = s6_to_s8(val >> 8);  in mt76x0_get_tx_power_per_rate()
170 	t->ofdm[0] = t->ofdm[1] = s6_to_s8(val);  in mt76x0_get_tx_power_per_rate()
171 	t->ofdm[2] = t->ofdm[3] = s6_to_s8(val >> 8);  in mt76x0_get_tx_power_per_rate()
176 	t->ofdm[4] = t->ofdm[5] = s6_to_s8(val);  in mt76x0_get_tx_power_per_rate()
177 	t->ofdm[6] = t->ofdm[7] = s6_to_s8(val >> 8);  in mt76x0_get_tx_power_per_rate()
179 	/* ht-vht mcs 1ss 0, 1, 2, 3 */  in mt76x0_get_tx_power_per_rate()
182 	t->ht[0] = t->ht[1] = s6_to_s8(val);  in mt76x0_get_tx_power_per_rate()
183 	t->ht[2] = t->ht[3] = s6_to_s8(val >> 8);  in mt76x0_get_tx_power_per_rate()
185 	/* ht-vht mcs 1ss 4, 5, 6 */  in mt76x0_get_tx_power_per_rate()
188 	t->ht[4] = t->ht[5] = s6_to_s8(val);  in mt76x0_get_tx_power_per_rate()
189 	t->ht[6] = t->ht[7] = s6_to_s8(val >> 8);  in mt76x0_get_tx_power_per_rate()
193 	t->vht[0] = s6_to_s8(val);  in mt76x0_get_tx_power_per_rate()
194 	t->vht[1] = s6_to_s8(val >> 8);  in mt76x0_get_tx_power_per_rate()
222 		if (chan->band == NL80211_BAND_5GHZ)  in mt76x0_get_power_info()
226 		target_power = (data & 0xff) - dev->rate_power.ofdm[7];  in mt76x0_get_power_info()
233 		if (chan->hw_value <= chan_map[i].chan) {  in mt76x0_get_power_info()
234 			idx = (chan->hw_value == chan_map[i].chan);  in mt76x0_get_power_info()
242 	if (chan->band == NL80211_BAND_2GHZ) {  in mt76x0_get_power_info()
245 		switch (chan->hw_value) {  in mt76x0_get_power_info()
277 	val = get_unaligned_le16(dev->mt76.eeprom.data);  in mt76x0_check_eeprom()
279 		val = get_unaligned_le16(dev->mt76.eeprom.data +  in mt76x0_check_eeprom()
287 		dev_err(dev->mt76.dev, "EEPROM data check failed: %04x\n",  in mt76x0_check_eeprom()
289 		return -EINVAL;  in mt76x0_check_eeprom()
297 	found = mt76_eeprom_init(&dev->mt76, MT76X0_EEPROM_SIZE);  in mt76x0_load_eeprom()
308 	return mt76x02_get_efuse_data(dev, 0, dev->mt76.eeprom.data,  in mt76x0_load_eeprom()
327 		dev_warn(dev->mt76.dev,  in mt76x0_eeprom_init()
330 	dev_info(dev->mt76.dev, "EEPROM ver:%02hhx fae:%02hhx\n",  in mt76x0_eeprom_init()
333 	memcpy(dev->mphy.macaddr, (u8 *)dev->mt76.eeprom.data + MT_EE_MAC_ADDR,  in mt76x0_eeprom_init()
335 	mt76_eeprom_override(&dev->mphy);  in mt76x0_eeprom_init()
336 	mt76x02_mac_setaddr(dev, dev->mphy.macaddr);  in mt76x0_eeprom_init()