Lines Matching +full:7 +full:- +full:31
1 /* SPDX-License-Identifier: ISC */
7 #define MT_RXD0_PKT_TYPE GENMASK(31, 29)
24 PKT_TYPE_RX_EVENT = 7,
27 #define MT_RXD1_NORMAL_BSSID GENMASK(31, 26)
33 #define MT_RXD1_NORMAL_KEY_ID GENMASK(7, 6)
41 #define MT_RXD2_NORMAL_NON_AMPDU BIT(31)
59 #define MT_RXD2_NORMAL_WLAN_IDX GENMASK(7, 0)
61 #define MT_RXD3_NORMAL_PF_STS GENMASK(31, 30)
70 #define MT_RXD3_NORMAL_RXV_SEQ GENMASK(7, 0)
72 #define MT_RXV1_VHTA1_B5_B4 GENMASK(31, 30)
83 #define MT_RXV1_HT_STBC GENMASK(8, 7)
86 #define MT_RXV2_VHTA1_B16_B6 GENMASK(31, 21)
89 #define MT_RXV3_F_AGC1_CAL_GAIN GENMASK(31, 29)
95 #define MT_RXV3_SEL_ANT BIT(7)
100 #define MT_RXV4_F_AGC_CAL_GAIN GENMASK(31, 29)
105 #define MT_RXV4_IB_RSSI0 GENMASK(7, 0)
107 #define MT_RXV5_LTF_SNR0 GENMASK(31, 26)
109 #define MT_RXV5_FOE GENMASK(18, 7)
119 #define MT_RXV6_NF0 GENMASK(7, 0)
130 #define MT_TXD0_P_IDX BIT(31)
139 #define MT_TXD1_OWN_MAC GENMASK(31, 26)
147 #define MT_TXD1_WLAN_IDX GENMASK(7, 0)
149 #define MT_TXD2_FIX_RATE BIT(31)
161 #define MT_TXD2_NDPA BIT(7)
166 #define MT_TXD3_SN_VALID BIT(31)
172 #define MT_TXD4_PN_LOW GENMASK(31, 0)
174 #define MT_TXD5_PN_HIGH GENMASK(31, 16)
181 #define MT_TXD5_PID GENMASK(7, 0)
183 #define MT_TXD6_SGI BIT(31)
193 #define MT_TXD6_ANT_ID GENMASK(7, 2)
201 #define MT_TXS0_ANTENNA GENMASK(31, 26)
219 #define MT_TXS1_F0_TIMESTAMP GENMASK(31, 0)
222 #define MT_TXS1_F1_NOISE_0 GENMASK(7, 0)
227 #define MT_TXS2_F1_RCPI_0 GENMASK(7, 0)
229 #define MT_TXS3_WCID GENMASK(31, 24)
233 #define MT_TXS4_LAST_TX_RATE GENMASK(31, 29)