Lines Matching refs:iwl_write32
539 iwl_write32(trans, CSR_MSIX_AUTOMASK_ST_AD, BIT(queue)); in iwl_pcie_clear_irq()
817 iwl_write32(trans, CSR_INT_MASK, 0x00000000); in _iwl_disable_interrupts()
821 iwl_write32(trans, CSR_INT, 0xffffffff); in _iwl_disable_interrupts()
822 iwl_write32(trans, CSR_FH_INT_STATUS, 0xffffffff); in _iwl_disable_interrupts()
825 iwl_write32(trans, CSR_MSIX_FH_INT_MASK_AD, in _iwl_disable_interrupts()
827 iwl_write32(trans, CSR_MSIX_HW_INT_MASK_AD, in _iwl_disable_interrupts()
884 iwl_write32(trans, CSR_INT_MASK, trans_pcie->inta_mask); in _iwl_enable_interrupts()
892 iwl_write32(trans, CSR_MSIX_FH_INT_MASK_AD, in _iwl_enable_interrupts()
894 iwl_write32(trans, CSR_MSIX_HW_INT_MASK_AD, in _iwl_enable_interrupts()
911 iwl_write32(trans, CSR_MSIX_HW_INT_MASK_AD, ~msk); in iwl_enable_hw_int_msk_msix()
919 iwl_write32(trans, CSR_MSIX_FH_INT_MASK_AD, ~msk); in iwl_enable_fh_int_msk_msix()
930 iwl_write32(trans, CSR_INT_MASK, trans_pcie->inta_mask); in iwl_enable_fw_load_int()
932 iwl_write32(trans, CSR_MSIX_HW_INT_MASK_AD, in iwl_enable_fw_load_int()
954 iwl_write32(trans, CSR_INT_MASK, trans_pcie->inta_mask); in iwl_enable_fw_load_int_ctx_info()
996 iwl_write32(trans, CSR_INT_MASK, trans_pcie->inta_mask); in iwl_enable_rfkill_int()
998 iwl_write32(trans, CSR_MSIX_FH_INT_MASK_AD, in iwl_enable_rfkill_int()
1042 iwl_write32(trans, reg, v); in __iwl_trans_pcie_set_bits_mask()