103 	struct iwl_trans_pcie *trans_pcie = IWL_TRANS_GET_PCIE_TRANS(trans);  in iwl_pcie_ctxt_info_gen3_init()  local
113 	switch (trans_pcie->rx_buf_size) {  in iwl_pcie_ctxt_info_gen3_init()
135 					  &trans_pcie->prph_scratch_dma_addr,  in iwl_pcie_ctxt_info_gen3_init()
163 		cpu_to_le64(trans_pcie->rxq->bd_dma);  in iwl_pcie_ctxt_info_gen3_init()
190 				       &trans_pcie->prph_info_dma_addr,  in iwl_pcie_ctxt_info_gen3_init()
200 					    &trans_pcie->ctxt_info_dma_addr,  in iwl_pcie_ctxt_info_gen3_init()
208 		cpu_to_le64(trans_pcie->prph_info_dma_addr);  in iwl_pcie_ctxt_info_gen3_init()
210 		cpu_to_le64(trans_pcie->prph_scratch_dma_addr);  in iwl_pcie_ctxt_info_gen3_init()
214 		cpu_to_le64(trans_pcie->rxq->rb_stts_dma);  in iwl_pcie_ctxt_info_gen3_init()
216 		cpu_to_le64(trans_pcie->prph_info_dma_addr + PAGE_SIZE / 2);  in iwl_pcie_ctxt_info_gen3_init()
218 		cpu_to_le64(trans_pcie->prph_info_dma_addr + 3 * PAGE_SIZE / 4);  in iwl_pcie_ctxt_info_gen3_init()
220 		cpu_to_le64(trans_pcie->txqs.txq[trans_pcie->txqs.cmd.q_id]->dma_addr);  in iwl_pcie_ctxt_info_gen3_init()
222 		cpu_to_le64(trans_pcie->rxq->used_bd_dma);  in iwl_pcie_ctxt_info_gen3_init()
228 	trans_pcie->ctxt_info_gen3 = ctxt_info_gen3;  in iwl_pcie_ctxt_info_gen3_init()
229 	trans_pcie->prph_info = prph_info;  in iwl_pcie_ctxt_info_gen3_init()
230 	trans_pcie->prph_scratch = prph_scratch;  in iwl_pcie_ctxt_info_gen3_init()
233 	trans_pcie->iml = dma_alloc_coherent(trans->dev, trans->iml_len,  in iwl_pcie_ctxt_info_gen3_init()
234 					     &trans_pcie->iml_dma_addr,  in iwl_pcie_ctxt_info_gen3_init()
236 	if (!trans_pcie->iml) {  in iwl_pcie_ctxt_info_gen3_init()
241 	memcpy(trans_pcie->iml, trans->iml, trans->iml_len);  in iwl_pcie_ctxt_info_gen3_init()
247 		    trans_pcie->ctxt_info_dma_addr);  in iwl_pcie_ctxt_info_gen3_init()
249 		    trans_pcie->iml_dma_addr);  in iwl_pcie_ctxt_info_gen3_init()
258 	dma_free_coherent(trans->dev, sizeof(*trans_pcie->ctxt_info_gen3),  in iwl_pcie_ctxt_info_gen3_init()
259 			  trans_pcie->ctxt_info_gen3,  in iwl_pcie_ctxt_info_gen3_init()
260 			  trans_pcie->ctxt_info_dma_addr);  in iwl_pcie_ctxt_info_gen3_init()
261 	trans_pcie->ctxt_info_gen3 = NULL;  in iwl_pcie_ctxt_info_gen3_init()
264 			  trans_pcie->prph_info_dma_addr);  in iwl_pcie_ctxt_info_gen3_init()
270 			trans_pcie->prph_scratch_dma_addr);  in iwl_pcie_ctxt_info_gen3_init()
277 	struct iwl_trans_pcie *trans_pcie = IWL_TRANS_GET_PCIE_TRANS(trans);  in iwl_pcie_ctxt_info_gen3_free()  local
279 	if (trans_pcie->iml) {  in iwl_pcie_ctxt_info_gen3_free()
280 		dma_free_coherent(trans->dev, trans->iml_len, trans_pcie->iml,  in iwl_pcie_ctxt_info_gen3_free()
281 				  trans_pcie->iml_dma_addr);  in iwl_pcie_ctxt_info_gen3_free()
282 		trans_pcie->iml_dma_addr = 0;  in iwl_pcie_ctxt_info_gen3_free()
283 		trans_pcie->iml = NULL;  in iwl_pcie_ctxt_info_gen3_free()
291 	if (!trans_pcie->ctxt_info_gen3)  in iwl_pcie_ctxt_info_gen3_free()
295 	dma_free_coherent(trans->dev, sizeof(*trans_pcie->ctxt_info_gen3),  in iwl_pcie_ctxt_info_gen3_free()
296 			  trans_pcie->ctxt_info_gen3,  in iwl_pcie_ctxt_info_gen3_free()
297 			  trans_pcie->ctxt_info_dma_addr);  in iwl_pcie_ctxt_info_gen3_free()
298 	trans_pcie->ctxt_info_dma_addr = 0;  in iwl_pcie_ctxt_info_gen3_free()
299 	trans_pcie->ctxt_info_gen3 = NULL;  in iwl_pcie_ctxt_info_gen3_free()
301 	dma_free_coherent(trans->dev, sizeof(*trans_pcie->prph_scratch),  in iwl_pcie_ctxt_info_gen3_free()
302 			  trans_pcie->prph_scratch,  in iwl_pcie_ctxt_info_gen3_free()
303 			  trans_pcie->prph_scratch_dma_addr);  in iwl_pcie_ctxt_info_gen3_free()
304 	trans_pcie->prph_scratch_dma_addr = 0;  in iwl_pcie_ctxt_info_gen3_free()
305 	trans_pcie->prph_scratch = NULL;  in iwl_pcie_ctxt_info_gen3_free()
308 	dma_free_coherent(trans->dev, PAGE_SIZE, trans_pcie->prph_info,  in iwl_pcie_ctxt_info_gen3_free()
309 			  trans_pcie->prph_info_dma_addr);  in iwl_pcie_ctxt_info_gen3_free()
310 	trans_pcie->prph_info_dma_addr = 0;  in iwl_pcie_ctxt_info_gen3_free()
311 	trans_pcie->prph_info = NULL;  in iwl_pcie_ctxt_info_gen3_free()
407 	struct iwl_trans_pcie *trans_pcie = IWL_TRANS_GET_PCIE_TRANS(trans);  in iwl_trans_pcie_ctx_info_gen3_load_pnvm()  local
409 		&trans_pcie->prph_scratch->ctrl_cfg;  in iwl_trans_pcie_ctx_info_gen3_load_pnvm()
410 	struct iwl_dram_regions *dram_regions = &trans_pcie->pnvm_data;  in iwl_trans_pcie_ctx_info_gen3_load_pnvm()
464 	struct iwl_trans_pcie *trans_pcie = IWL_TRANS_GET_PCIE_TRANS(trans);  in iwl_pcie_set_pnvm_segments()  local
466 		&trans_pcie->prph_scratch->ctrl_cfg;  in iwl_pcie_set_pnvm_segments()
467 	struct iwl_dram_regions *dram_regions = &trans_pcie->pnvm_data;  in iwl_pcie_set_pnvm_segments()
477 	struct iwl_trans_pcie *trans_pcie = IWL_TRANS_GET_PCIE_TRANS(trans);  in iwl_pcie_set_continuous_pnvm()  local
479 		&trans_pcie->prph_scratch->ctrl_cfg;  in iwl_pcie_set_continuous_pnvm()
482 		cpu_to_le64(trans_pcie->pnvm_data.drams[0].physical);  in iwl_pcie_set_continuous_pnvm()
484 		cpu_to_le32(trans_pcie->pnvm_data.drams[0].size);  in iwl_pcie_set_continuous_pnvm()
503 	struct iwl_trans_pcie *trans_pcie = IWL_TRANS_GET_PCIE_TRANS(trans);  in iwl_trans_pcie_ctx_info_gen3_load_reduce_power()  local
505 		&trans_pcie->prph_scratch->ctrl_cfg;  in iwl_trans_pcie_ctx_info_gen3_load_reduce_power()
506 	struct iwl_dram_regions *dram_regions = &trans_pcie->reduced_tables_data;  in iwl_trans_pcie_ctx_info_gen3_load_reduce_power()
548 	struct iwl_trans_pcie *trans_pcie = IWL_TRANS_GET_PCIE_TRANS(trans);  in iwl_pcie_set_reduce_power_segments()  local
550 		&trans_pcie->prph_scratch->ctrl_cfg;  in iwl_pcie_set_reduce_power_segments()
551 	struct iwl_dram_regions *dram_regions = &trans_pcie->reduced_tables_data;  in iwl_pcie_set_reduce_power_segments()
561 	struct iwl_trans_pcie *trans_pcie = IWL_TRANS_GET_PCIE_TRANS(trans);  in iwl_pcie_set_continuous_reduce_power()  local
563 		&trans_pcie->prph_scratch->ctrl_cfg;  in iwl_pcie_set_continuous_reduce_power()
566 		cpu_to_le64(trans_pcie->reduced_tables_data.drams[0].physical);  in iwl_pcie_set_continuous_reduce_power()
568 		cpu_to_le32(trans_pcie->reduced_tables_data.drams[0].size);  in iwl_pcie_set_continuous_reduce_power()