Lines Matching +full:0 +full:x401000

19 #define IWL_22000_NVM_VERSION		0x0a1d
22 #define IWL_22000_DCCM_OFFSET		0x800000 /* LMAC1 */
23 #define IWL_22000_DCCM_LEN		0x10000 /* LMAC1 */
24 #define IWL_22000_DCCM2_OFFSET		0x880000
25 #define IWL_22000_DCCM2_LEN		0x8000
26 #define IWL_22000_SMEM_OFFSET		0x400000
27 #define IWL_22000_SMEM_LEN		0xD0000
84 	.mac_addr_from_csr = 0x380,					\
91 	.min_umac_error_event_table = 0x400000,				\
92 	.d3_debug_data_base_addr = 0x401000,				\
110 	.gp2_reg_addr = 0xa02c68,					\
114 			.mask = 0xffffffff,				\
118 			.mask = 0xffffffff,				\