Lines Matching refs:B43_PHY_EXTG
72 #define B43_PHY_HT_RF_SEQ_MODE B43_PHY_EXTG(0x000)
75 #define B43_PHY_HT_RF_SEQ_TRIG B43_PHY_EXTG(0x003)
82 #define B43_PHY_HT_RF_SEQ_STATUS B43_PHY_EXTG(0x004)
89 #define B43_PHY_HT_RF_CTL_INT_C1 B43_PHY_EXTG(0x04c)
90 #define B43_PHY_HT_RF_CTL_INT_C2 B43_PHY_EXTG(0x06c)
91 #define B43_PHY_HT_RF_CTL_INT_C3 B43_PHY_EXTG(0x08c)
93 #define B43_PHY_HT_AFE_C1_OVER B43_PHY_EXTG(0x110)
94 #define B43_PHY_HT_AFE_C1 B43_PHY_EXTG(0x111)
95 #define B43_PHY_HT_AFE_C2_OVER B43_PHY_EXTG(0x114)
96 #define B43_PHY_HT_AFE_C2 B43_PHY_EXTG(0x115)
97 #define B43_PHY_HT_AFE_C3_OVER B43_PHY_EXTG(0x118)
98 #define B43_PHY_HT_AFE_C3 B43_PHY_EXTG(0x119)
100 #define B43_PHY_HT_TXPCTL_CMD_C3 B43_PHY_EXTG(0x164)
102 #define B43_PHY_HT_TXPCTL_IDLE_TSSI2 B43_PHY_EXTG(0x165) /* TX power control idle TSSI */
105 #define B43_PHY_HT_TXPCTL_TARG_PWR2 B43_PHY_EXTG(0x166) /* TX power control target power */
108 #define B43_PHY_HT_TX_PCTL_STATUS_C3 B43_PHY_EXTG(0x169)