Lines Matching refs:b43_phy_mask

136 	b43_phy_mask(dev, B43_PHY_HT_RF_CTL_CMD, ~B43_PHY_HT_RF_CTL_CMD_CHIP0_PU);  in b43_radio_2059_init_pre()
138 b43_phy_mask(dev, B43_PHY_HT_RF_CTL_CMD, ~B43_PHY_HT_RF_CTL_CMD_FORCE); in b43_radio_2059_init_pre()
279 b43_phy_mask(dev, ctl_regs[i][1], ~0x1); in b43_phy_ht_afe_unk1()
282 b43_phy_mask(dev, ctl_regs[i][0], ~0x4); in b43_phy_ht_afe_unk1()
324 b43_phy_mask(dev, B43_PHY_B_BBCFG, in b43_phy_ht_bphy_reset()
345 b43_phy_mask(dev, B43_PHY_HT_IQLOCAL_CMDGCTL, 0x7FFF); in b43_phy_ht_stop_playback()
347 b43_phy_mask(dev, B43_PHY_HT_SAMP_CMD, ~0x0004); in b43_phy_ht_stop_playback()
397 b43_phy_mask(dev, B43_PHY_HT_SAMP_CMD, ~0); in b43_phy_ht_run_samples()
398 b43_phy_mask(dev, B43_PHY_HT_SAMP_CMD, ~0); in b43_phy_ht_run_samples()
399 b43_phy_mask(dev, B43_PHY_HT_IQLOCAL_CMDGCTL, ~0); in b43_phy_ht_run_samples()
523 b43_phy_mask(dev, B43_PHY_EXTG(0x108), mask); in b43_phy_ht_tx_power_fix()
554 b43_phy_mask(dev, B43_PHY_HT_TXPCTL_CMD_C1, 0xffff & ~en_bits); in b43_phy_ht_tx_power_ctl()
587 b43_phy_mask(dev, base[core] + 7, ~0xF); /* 0xF? Or just 0x6? */ in b43_phy_ht_tx_power_ctl_idle_tssi()
669 b43_phy_mask(dev, B43_PHY_HT_TXPCTL_CMD_C1, in b43_phy_ht_tx_power_ctl_setup()
757 b43_phy_mask(dev, B43_PHY_HT_BBCFG, in b43_phy_ht_spur_avoid()
769 b43_phy_mask(dev, B43_PHY_HT_BANDCTL, ~B43_PHY_HT_BANDCTL_5GHZ); in b43_phy_ht_channel_setup()
777 b43_phy_mask(dev, B43_PHY_HT_BANDCTL, ~B43_PHY_HT_BANDCTL_5GHZ); in b43_phy_ht_channel_setup()
796 b43_phy_mask(dev, B43_PHY_HT_TEST, ~0x840); in b43_phy_ht_channel_setup()
883 b43_phy_mask(dev, 0x0be, ~0x2); in b43_phy_ht_op_init()
890 b43_phy_mask(dev, B43_PHY_EXTG(0), ~0x3); in b43_phy_ht_op_init()
913 b43_phy_mask(dev, 0x17e, ~0x4000); in b43_phy_ht_op_init()
1026 b43_phy_mask(dev, B43_PHY_HT_RF_CTL_CMD, in b43_phy_ht_op_software_rfkill()