513 u16 b43_shm_read16(struct b43_wldev *dev, u16 routing, u16 offset)  in b43_shm_read16()  function
575 	ret = b43_shm_read16(dev, B43_SHM_SHARED, B43_SHM_SH_HOSTF3);  in b43_hf_read()
577 	ret |= b43_shm_read16(dev, B43_SHM_SHARED, B43_SHM_SH_HOSTF2);  in b43_hf_read()
579 	ret |= b43_shm_read16(dev, B43_SHM_SHARED, B43_SHM_SH_HOSTF1);  in b43_hf_read()
601 	return b43_shm_read16(dev, B43_SHM_SHARED, B43_SHM_SH_FWCAPA);  in b43_fwcapa_read()
1114 			u16 tmp = b43_shm_read16(dev, B43_SHM_SHARED, offset + i);  in b43_dump_keymemory()
1118 		algo = b43_shm_read16(dev, B43_SHM_SHARED,  in b43_dump_keymemory()
1127 					u16 tmp = b43_shm_read16(dev, B43_SHM_SHARED, offset + i);  in b43_dump_keymemory()
1133 			rcmta1 = b43_shm_read16(dev, B43_SHM_RCMTA,  in b43_dump_keymemory()
1193 			ucstat = b43_shm_read16(dev, B43_SHM_SHARED,  in b43_power_saving_ctl_bits()
1382 	val = b43_shm_read16(dev, B43_SHM_SHARED, B43_SHM_SH_JSSI1);  in b43_jssi_read()
1384 	val |= b43_shm_read16(dev, B43_SHM_SHARED, B43_SHM_SH_JSSI0);  in b43_jssi_read()
1469 		tmp = b43_shm_read16(dev, B43_SHM_SHARED, 0x40C);  in handle_irq_noise()
1643 	ctl = b43_shm_read16(dev, B43_SHM_SHARED, B43_SHM_SH_BEACPHYCTL);  in b43_write_beacon_template()
1871 	reason = b43_shm_read16(dev, B43_SHM_SCRATCH, B43_FWPANIC_REASON_REG);  in b43_handle_firmware_panic()
1901 	reason = b43_shm_read16(dev, B43_SHM_SCRATCH, B43_DEBUGIRQ_REASON_REG);  in handle_irq_ucode_debug()
1916 			u16 tmp = b43_shm_read16(dev, B43_SHM_SHARED, i);  in handle_irq_ucode_debug()
1929 			u16 tmp = b43_shm_read16(dev, B43_SHM_SCRATCH, i);  in handle_irq_ucode_debug()
1944 		marker_id = b43_shm_read16(dev, B43_SHM_SCRATCH,  in handle_irq_ucode_debug()
1946 		marker_line = b43_shm_read16(dev, B43_SHM_SCRATCH,  in handle_irq_ucode_debug()
2675 	fwrev = b43_shm_read16(dev, B43_SHM_SHARED, B43_SHM_SH_UCODEREV);  in b43_upload_microcode()
2676 	fwpatch = b43_shm_read16(dev, B43_SHM_SHARED, B43_SHM_SH_UCODEPATCH);  in b43_upload_microcode()
2677 	fwdate = b43_shm_read16(dev, B43_SHM_SHARED, B43_SHM_SH_UCODEDATE);  in b43_upload_microcode()
2678 	fwtime = b43_shm_read16(dev, B43_SHM_SHARED, B43_SHM_SH_UCODETIME);  in b43_upload_microcode()
2954 		fwstate = b43_shm_read16(dev, B43_SHM_SHARED,  in b43_mac_enable()
3165 			b43_shm_read16(dev, B43_SHM_SHARED, offset));  in b43_rate_memory_write()
3219 	tmp = b43_shm_read16(dev, B43_SHM_SHARED, B43_SHM_SH_ACKCTSPHYCTL);  in b43_mgmtframe_txantenna()
3223 	tmp = b43_shm_read16(dev, B43_SHM_SHARED, B43_SHM_SH_PRPHYCTL);  in b43_mgmtframe_txantenna()
3372 		wdr = b43_shm_read16(dev, B43_SHM_SCRATCH, B43_WATCHDOG_REG);  in b43_periodic_every15sec()
3489 	if (b43_shm_read16(dev, B43_SHM_SHARED, 0) != 0x1122 ||  in b43_validate_chipaccess()
3490 	    b43_shm_read16(dev, B43_SHM_SHARED, 2) != 0xCCDD ||  in b43_validate_chipaccess()
3491 	    b43_shm_read16(dev, B43_SHM_SHARED, 4) != 0xAABB ||  in b43_validate_chipaccess()
3492 	    b43_shm_read16(dev, B43_SHM_SHARED, 6) != 0x7788)  in b43_validate_chipaccess()
3523 	dev->ktp = b43_shm_read16(dev, B43_SHM_SHARED, B43_SHM_SH_KTP);  in b43_security_init()
3673 			tmp = b43_shm_read16(dev, B43_SHM_SHARED,  in b43_qos_params_upload()
4092 		rateptr = b43_shm_read16(dev, B43_SHM_SHARED,  in b43_update_basic_rates()