Lines Matching +full:0 +full:x0001ffff
19 #define B43_DMA32_TXCTL 0x00
20 #define B43_DMA32_TXENABLE 0x00000001
21 #define B43_DMA32_TXSUSPEND 0x00000002
22 #define B43_DMA32_TXLOOPBACK 0x00000004
23 #define B43_DMA32_TXFLUSH 0x00000010
24 #define B43_DMA32_TXPARITYDISABLE 0x00000800
25 #define B43_DMA32_TXADDREXT_MASK 0x00030000
27 #define B43_DMA32_TXRING 0x04
28 #define B43_DMA32_TXINDEX 0x08
29 #define B43_DMA32_TXSTATUS 0x0C
30 #define B43_DMA32_TXDPTR 0x00000FFF
31 #define B43_DMA32_TXSTATE 0x0000F000
32 #define B43_DMA32_TXSTAT_DISABLED 0x00000000
33 #define B43_DMA32_TXSTAT_ACTIVE 0x00001000
34 #define B43_DMA32_TXSTAT_IDLEWAIT 0x00002000
35 #define B43_DMA32_TXSTAT_STOPPED 0x00003000
36 #define B43_DMA32_TXSTAT_SUSP 0x00004000
37 #define B43_DMA32_TXERROR 0x000F0000
38 #define B43_DMA32_TXERR_NOERR 0x00000000
39 #define B43_DMA32_TXERR_PROT 0x00010000
40 #define B43_DMA32_TXERR_UNDERRUN 0x00020000
41 #define B43_DMA32_TXERR_BUFREAD 0x00030000
42 #define B43_DMA32_TXERR_DESCREAD 0x00040000
43 #define B43_DMA32_TXACTIVE 0xFFF00000
44 #define B43_DMA32_RXCTL 0x10
45 #define B43_DMA32_RXENABLE 0x00000001
46 #define B43_DMA32_RXFROFF_MASK 0x000000FE
48 #define B43_DMA32_RXDIRECTFIFO 0x00000100
49 #define B43_DMA32_RXPARITYDISABLE 0x00000800
50 #define B43_DMA32_RXADDREXT_MASK 0x00030000
52 #define B43_DMA32_RXRING 0x14
53 #define B43_DMA32_RXINDEX 0x18
54 #define B43_DMA32_RXSTATUS 0x1C
55 #define B43_DMA32_RXDPTR 0x00000FFF
56 #define B43_DMA32_RXSTATE 0x0000F000
57 #define B43_DMA32_RXSTAT_DISABLED 0x00000000
58 #define B43_DMA32_RXSTAT_ACTIVE 0x00001000
59 #define B43_DMA32_RXSTAT_IDLEWAIT 0x00002000
60 #define B43_DMA32_RXSTAT_STOPPED 0x00003000
61 #define B43_DMA32_RXERROR 0x000F0000
62 #define B43_DMA32_RXERR_NOERR 0x00000000
63 #define B43_DMA32_RXERR_PROT 0x00010000
64 #define B43_DMA32_RXERR_OVERFLOW 0x00020000
65 #define B43_DMA32_RXERR_BUFWRITE 0x00030000
66 #define B43_DMA32_RXERR_DESCREAD 0x00040000
67 #define B43_DMA32_RXACTIVE 0xFFF00000
74 #define B43_DMA32_DCTL_BYTECNT 0x00001FFF
75 #define B43_DMA32_DCTL_ADDREXT_MASK 0x00030000
77 #define B43_DMA32_DCTL_DTABLEEND 0x10000000
78 #define B43_DMA32_DCTL_IRQ 0x20000000
79 #define B43_DMA32_DCTL_FRAMEEND 0x40000000
80 #define B43_DMA32_DCTL_FRAMESTART 0x80000000
85 #define B43_DMA64_TXCTL 0x00
86 #define B43_DMA64_TXENABLE 0x00000001
87 #define B43_DMA64_TXSUSPEND 0x00000002
88 #define B43_DMA64_TXLOOPBACK 0x00000004
89 #define B43_DMA64_TXFLUSH 0x00000010
90 #define B43_DMA64_TXPARITYDISABLE 0x00000800
91 #define B43_DMA64_TXADDREXT_MASK 0x00030000
93 #define B43_DMA64_TXINDEX 0x04
94 #define B43_DMA64_TXRINGLO 0x08
95 #define B43_DMA64_TXRINGHI 0x0C
96 #define B43_DMA64_TXSTATUS 0x10
97 #define B43_DMA64_TXSTATDPTR 0x00001FFF
98 #define B43_DMA64_TXSTAT 0xF0000000
99 #define B43_DMA64_TXSTAT_DISABLED 0x00000000
100 #define B43_DMA64_TXSTAT_ACTIVE 0x10000000
101 #define B43_DMA64_TXSTAT_IDLEWAIT 0x20000000
102 #define B43_DMA64_TXSTAT_STOPPED 0x30000000
103 #define B43_DMA64_TXSTAT_SUSP 0x40000000
104 #define B43_DMA64_TXERROR 0x14
105 #define B43_DMA64_TXERRDPTR 0x0001FFFF
106 #define B43_DMA64_TXERR 0xF0000000
107 #define B43_DMA64_TXERR_NOERR 0x00000000
108 #define B43_DMA64_TXERR_PROT 0x10000000
109 #define B43_DMA64_TXERR_UNDERRUN 0x20000000
110 #define B43_DMA64_TXERR_TRANSFER 0x30000000
111 #define B43_DMA64_TXERR_DESCREAD 0x40000000
112 #define B43_DMA64_TXERR_CORE 0x50000000
113 #define B43_DMA64_RXCTL 0x20
114 #define B43_DMA64_RXENABLE 0x00000001
115 #define B43_DMA64_RXFROFF_MASK 0x000000FE
117 #define B43_DMA64_RXDIRECTFIFO 0x00000100
118 #define B43_DMA64_RXPARITYDISABLE 0x00000800
119 #define B43_DMA64_RXADDREXT_MASK 0x00030000
121 #define B43_DMA64_RXINDEX 0x24
122 #define B43_DMA64_RXRINGLO 0x28
123 #define B43_DMA64_RXRINGHI 0x2C
124 #define B43_DMA64_RXSTATUS 0x30
125 #define B43_DMA64_RXSTATDPTR 0x00001FFF
126 #define B43_DMA64_RXSTAT 0xF0000000
127 #define B43_DMA64_RXSTAT_DISABLED 0x00000000
128 #define B43_DMA64_RXSTAT_ACTIVE 0x10000000
129 #define B43_DMA64_RXSTAT_IDLEWAIT 0x20000000
130 #define B43_DMA64_RXSTAT_STOPPED 0x30000000
131 #define B43_DMA64_RXSTAT_SUSP 0x40000000
132 #define B43_DMA64_RXERROR 0x34
133 #define B43_DMA64_RXERRDPTR 0x0001FFFF
134 #define B43_DMA64_RXERR 0xF0000000
135 #define B43_DMA64_RXERR_NOERR 0x00000000
136 #define B43_DMA64_RXERR_PROT 0x10000000
137 #define B43_DMA64_RXERR_UNDERRUN 0x20000000
138 #define B43_DMA64_RXERR_TRANSFER 0x30000000
139 #define B43_DMA64_RXERR_DESCREAD 0x40000000
140 #define B43_DMA64_RXERR_CORE 0x50000000
149 #define B43_DMA64_DCTL0_DTABLEEND 0x10000000
150 #define B43_DMA64_DCTL0_IRQ 0x20000000
151 #define B43_DMA64_DCTL0_FRAMEEND 0x40000000
152 #define B43_DMA64_DCTL0_FRAMESTART 0x80000000
153 #define B43_DMA64_DCTL1_BYTECNT 0x00001FFF
154 #define B43_DMA64_DCTL1_ADDREXT_MASK 0x00030000
252 /* DMA controller index number (0-5). */