broadcom/b43/b43.h

1 /* SPDX-License-Identifier: GPL-2.0 */
61 /* 32-bit DMA */
68 /* 64-bit DMA */
203 #define B43_BFL2_APLL_WAR		0x0002	/* alternative A-band PLL settings implemented */
209 #define B43_BFL2_BTC3WIRE		0x0080	/* used 3-wire bluetooth coexist */
211 #define B43_BFL2_SPUR_WAR		0x0200	/* has a workaround for clock-harmonic spurs */
212 #define B43_BFL2_GPLL_WAR		0x0400	/* altenative G-band PLL settings implemented */
234 #define B43_SHM_AUTOINC_R		0x0200	/* Auto-increment address on read */
235 #define B43_SHM_AUTOINC_W		0x0100	/* Auto-increment address on write */
330 #define B43_SHM_SH_SPUWKUP		0x0094	/* pre-wakeup for synth PU in us */
331 #define B43_SHM_SH_PRETBTT		0x0096	/* pre-TBTT in us */
359 #define B43_HF_SYMW		0x000000000002ULL /* G-PHY SYM workaround */
363 #define B43_HF_GDCW		0x000000000020ULL /* G-PHY DC canceller filter bw workaround */
374 #define B43_HF_AFTERBURNER	0x000000008000ULL /* Afterburner enabled */
375 #define B43_HF_BT4PRIOCOEX	0x000000010000ULL /* Bluetooth 4-priority coexistance */
376 #define B43_HF_FWKUP		0x000000020000ULL /* Fast wake-up ucode */
387 #define B43_HF_BT3COEXT		0x000020000000ULL /* Bluetooth 3-wire coexistence (rev >= 13 only) */
389 #define B43_HF_ANTSELEN		0x000100000000ULL /* Antenna selection enabled (rev >= 13 only) */
451 #define B43_MACCTL_ENABLED		0x00000001	/* MAC Enabled */
454 #define B43_MACCTL_SHM_ENABLED		0x00000100	/* SHM Enabled */
456 #define B43_MACCTL_IHR_ENABLED		0x00000400	/* IHR Region Enabled */
457 #define B43_MACCTL_PSM_DBG		0x00002000	/* Microcode debugging enabled */
464 #define B43_MACCTL_KEEP_BADPLCP		0x00200000	/* Keep frames with bad PLCP */
466 #define B43_MACCTL_KEEP_CTL		0x00400000	/* Keep control frames */
467 #define B43_MACCTL_KEEP_BAD		0x00800000	/* Keep bad frames (FCS) */
499 #define B43_BCMA_IOCTL_PLLREFSEL	0x00000020	/* PLL Frequency Reference Select */
500 #define B43_BCMA_IOCTL_PHY_BW		0x000000C0	/* PHY band width and clock speed mask (N-PHY+ only?) */
516 #define B43_TMSLOW_PHY_BANDWIDTH	0x00C00000	/* PHY band width and clock speed mask (N-PHY only) */
520 #define B43_TMSLOW_PLLREFSEL		0x00200000	/* PLL Frequency Reference Select (rev >= 5) */
531 /* Generic-Interrupt reasons. */
568 /* The firmware register to fetch the debug-IRQ reason from. */
570 /* Debug-IRQ reasons. */
584 #define B43_FWPANIC_DIE			0 /* Firmware died. Don't auto-restart it. */
642 	 * For IV this is number-of-ivs. */
760 /* In-memory representation of a cached microcode file. */
766 	 * If you want to check for proprietary vs opensource, use (struct b43_firmware)->opensource
767 	 * instead! The (struct b43_firmware)->opensource flag is derived from the actual firmware
787 	/* Initial MMIO values for the firmware, band-specific */
820 #define b43_status(wldev)		atomic_read(&(wldev)->__init_status)
822 		atomic_set(&(wldev)->__init_status, (stat));	\
839 	bool radio_hw_enable;	/* saved state of radio hardware enabled state */
841 	bool hwcrypto_enabled;		/* TRUE, if HW crypto acceleration is enabled. */
863 	/* The currently active generic-interrupt mask. */
868 	/* if > 0 MAC is suspended. if == 0 MAC is enabled. */
906 	/* Hard-IRQ spinlock. This lock protects things used in the hard-IRQ
972 	/* Kmalloc'ed scratch space for PIO TX/RX. Protected by wl->mutex. */
979 	return hw->priv;  in hw_to_b43_wl()
991 	return (wl->operating && wl->if_type == type);  in b43_is_mode()
995  * b43_current_band - Returns the currently used band.
1000 	return wl->hw->conf.chandef.chan->band;  in b43_current_band()
1005 	return wldev->dev->bus_may_powerdown(wldev->dev);  in b43_bus_may_powerdown()
1009 	return wldev->dev->bus_powerup(wldev->dev, dynamic_pctl);  in b43_bus_powerup()
1013 	return wldev->dev->device_is_enabled(wldev->dev);  in b43_device_is_enabled()
1018 	wldev->dev->device_enable(wldev->dev, core_specific_flags);  in b43_device_enable()
1023 	wldev->dev->device_disable(wldev->dev, core_specific_flags);  in b43_device_disable()
1028 	return dev->dev->read16(dev->dev, offset);  in b43_read16()
1033 	dev->dev->write16(dev->dev, offset, value);  in b43_write16()
1041 	if (dev->dev->flush_writes)  in b43_write16f()
1054 	return dev->dev->read32(dev->dev, offset);  in b43_read32()
1059 	dev->dev->write32(dev->dev, offset, value);  in b43_write32()
1071 	dev->dev->block_read(dev->dev, buffer, count, offset, reg_width);  in b43_block_read()
1077 	dev->dev->block_write(dev->dev, buffer, count, offset, reg_width);  in b43_block_write()
1082 	return dev->__using_pio_transfers;  in b43_using_pio_transfers()
1087 	if (dev->qos_enabled)  in b43_wake_queue()
1088 		ieee80211_wake_queue(dev->wl->hw, queue_prio);  in b43_wake_queue()
1090 		ieee80211_wake_queue(dev->wl->hw, 0);  in b43_wake_queue()
1095 	if (dev->qos_enabled)  in b43_stop_queue()
1096 		ieee80211_stop_queue(dev->wl->hw, queue_prio);  in b43_stop_queue()
1098 		ieee80211_stop_queue(dev->wl->hw, 0);  in b43_stop_queue()