1380 	wil->txrx_ops.tx_desc_map((union wil_tx_desc *)d, pa,  in wil_tx_tso_gen_desc()
1625 	wil->txrx_ops.configure_interrupt_moderation =  in wil_init_txrx_ops_edma()
1628 	wil->txrx_ops.ring_init_tx = wil_ring_init_tx_edma;  in wil_init_txrx_ops_edma()
1629 	wil->txrx_ops.ring_fini_tx = wil_ring_free_edma;  in wil_init_txrx_ops_edma()
1630 	wil->txrx_ops.ring_init_bcast = wil_ring_init_bcast_edma;  in wil_init_txrx_ops_edma()
1631 	wil->txrx_ops.tx_init = wil_tx_init_edma;  in wil_init_txrx_ops_edma()
1632 	wil->txrx_ops.tx_fini = wil_tx_fini_edma;  in wil_init_txrx_ops_edma()
1633 	wil->txrx_ops.tx_desc_map = wil_tx_desc_map_edma;  in wil_init_txrx_ops_edma()
1634 	wil->txrx_ops.tx_desc_unmap = wil_tx_desc_unmap_edma;  in wil_init_txrx_ops_edma()
1635 	wil->txrx_ops.tx_ring_tso = __wil_tx_ring_tso_edma;  in wil_init_txrx_ops_edma()
1636 	wil->txrx_ops.tx_ring_modify = wil_tx_ring_modify_edma;  in wil_init_txrx_ops_edma()
1638 	wil->txrx_ops.rx_init = wil_rx_init_edma;  in wil_init_txrx_ops_edma()
1639 	wil->txrx_ops.wmi_addba_rx_resp = wmi_addba_rx_resp_edma;  in wil_init_txrx_ops_edma()
1640 	wil->txrx_ops.get_reorder_params = wil_get_reorder_params_edma;  in wil_init_txrx_ops_edma()
1641 	wil->txrx_ops.get_netif_rx_params = wil_get_netif_rx_params_edma;  in wil_init_txrx_ops_edma()
1642 	wil->txrx_ops.rx_crypto_check = wil_rx_crypto_check_edma;  in wil_init_txrx_ops_edma()
1643 	wil->txrx_ops.rx_error_check = wil_rx_error_check_edma;  in wil_init_txrx_ops_edma()
1644 	wil->txrx_ops.is_rx_idle = wil_is_rx_idle_edma;  in wil_init_txrx_ops_edma()
1645 	wil->txrx_ops.rx_fini = wil_rx_fini_edma;  in wil_init_txrx_ops_edma()