101 	wil_dbg_irq(wil, "mask_irq_misc: mask_halp(%s)\n",  in wil6210_mask_irq_misc()
110 	wil_dbg_irq(wil, "mask_halp\n");  in wil6210_mask_halp()
118 	wil_dbg_irq(wil, "mask_irq_pseudo\n");  in wil6210_mask_irq_pseudo()
153 	wil_dbg_irq(wil, "unmask_irq_misc: unmask_halp(%s)\n",  in wil6210_unmask_irq_misc()
162 	wil_dbg_irq(wil, "unmask_halp\n");  in wil6210_unmask_halp()
170 	wil_dbg_irq(wil, "unmask_irq_pseudo\n");  in wil6210_unmask_irq_pseudo()
179 	wil_dbg_irq(wil, "mask_irq\n");  in wil_mask_irq()
191 	wil_dbg_irq(wil, "unmask_irq\n");  in wil_unmask_irq()
240 	wil_dbg_irq(wil, "configure_interrupt_moderation\n");  in wil_configure_interrupt_moderation()
298 	wil_dbg_irq(wil, "ISR RX 0x%08x\n", isr);  in wil6210_irq_rx()
314 		wil_dbg_irq(wil, "RX done / RX_HTRSH received, ISR (0x%x)\n",  in wil6210_irq_rx()
360 	wil_dbg_irq(wil, "ISR RX 0x%08x\n", isr);  in wil6210_irq_rx_edma()
369 		wil_dbg_irq(wil, "RX status ring\n");  in wil6210_irq_rx_edma()
411 	wil_dbg_irq(wil, "ISR TX 0x%08x\n", isr);  in wil6210_irq_tx_edma()
420 		wil_dbg_irq(wil, "TX status ring\n");  in wil6210_irq_tx_edma()
457 	wil_dbg_irq(wil, "ISR TX 0x%08x\n", isr);  in wil6210_irq_tx()
466 		wil_dbg_irq(wil, "TX done\n");  in wil6210_irq_tx()
545 	wil_dbg_irq(wil, "ISR MISC 0x%08x\n", isr);  in wil6210_irq_misc()
570 		wil_dbg_irq(wil, "IRQ: FW ready\n");  in wil6210_irq_misc()
586 			wil_dbg_irq(wil, "irq_misc: HALP IRQ invoked\n");  in wil6210_irq_misc()
608 	wil_dbg_irq(wil, "Thread ISR MISC 0x%08x\n", isr);  in wil6210_irq_misc_thread()
624 		wil_dbg_irq(wil, "MBOX event\n");  in wil6210_irq_misc_thread()
630 		wil_dbg_irq(wil, "un-handled MISC ISR bits 0x%08x\n", isr);  in wil6210_irq_misc_thread()
640 		wil_dbg_irq(wil, "set suspend_resp_comp to true\n");  in wil6210_irq_misc_thread()
653 	wil_dbg_irq(wil, "Thread IRQ\n");  in wil6210_thread_irq()
661 		wil_dbg_irq(wil, "set suspend_resp_comp to true\n");  in wil6210_thread_irq()
764 	wil_dbg_irq(wil, "Pseudo IRQ 0x%08x\n", pseudo_cause);  in wil6210_hardirq()
859 	wil_dbg_irq(wil, "set_halp\n");  in wil6210_set_halp()
867 	wil_dbg_irq(wil, "clear_halp\n");  in wil6210_clear_halp()