Lines Matching +full:32 +full:k
130 const struct ath_keyval *k, in ath_hw_set_keycache_entry() argument
143 switch (k->kv_type) { in ath_hw_set_keycache_entry()
164 if (k->kv_len < WLAN_KEY_LEN_WEP40) { in ath_hw_set_keycache_entry()
166 k->kv_len); in ath_hw_set_keycache_entry()
169 if (k->kv_len <= WLAN_KEY_LEN_WEP40) in ath_hw_set_keycache_entry()
171 else if (k->kv_len <= WLAN_KEY_LEN_WEP104) in ath_hw_set_keycache_entry()
180 ath_err(common, "cipher %u not supported\n", k->kv_type); in ath_hw_set_keycache_entry()
184 key0 = get_unaligned_le32(k->kv_val + 0); in ath_hw_set_keycache_entry()
185 key1 = get_unaligned_le16(k->kv_val + 4); in ath_hw_set_keycache_entry()
186 key2 = get_unaligned_le32(k->kv_val + 6); in ath_hw_set_keycache_entry()
187 key3 = get_unaligned_le16(k->kv_val + 10); in ath_hw_set_keycache_entry()
188 key4 = get_unaligned_le32(k->kv_val + 12); in ath_hw_set_keycache_entry()
189 if (k->kv_len <= WLAN_KEY_LEN_WEP104) in ath_hw_set_keycache_entry()
194 * two 32-bit writes to actually update the values in the internal in ath_hw_set_keycache_entry()
230 * key2 [31:0] = RX key [63:32] in ath_hw_set_keycache_entry()
233 * key4 [31:0] = TX key [63:32] in ath_hw_set_keycache_entry()
237 mic0 = get_unaligned_le32(k->kv_mic + 0); in ath_hw_set_keycache_entry()
238 mic2 = get_unaligned_le32(k->kv_mic + 4); in ath_hw_set_keycache_entry()
239 mic1 = get_unaligned_le16(k->kv_txmic + 2) & 0xffff; in ath_hw_set_keycache_entry()
240 mic3 = get_unaligned_le16(k->kv_txmic + 0) & 0xffff; in ath_hw_set_keycache_entry()
241 mic4 = get_unaligned_le32(k->kv_txmic + 4); in ath_hw_set_keycache_entry()
249 /* Write RX[63:32] and TX[15:0] */ in ath_hw_set_keycache_entry()
253 /* Write TX[63:32] and keyType(reserved) */ in ath_hw_set_keycache_entry()
266 * main index + 32 + 96 for RX): in ath_hw_set_keycache_entry()
269 * key2 [31:0] = TX/RX MIC key [63:32] in ath_hw_set_keycache_entry()
279 mic0 = get_unaligned_le32(k->kv_mic + 0); in ath_hw_set_keycache_entry()
280 mic2 = get_unaligned_le32(k->kv_mic + 4); in ath_hw_set_keycache_entry()
288 /* Write MIC key[63:32] */ in ath_hw_set_keycache_entry()
292 /* Write TX[63:32] and keyType(reserved) */ in ath_hw_set_keycache_entry()
373 /* TX key goes at first index, RX key at +32. */ in ath_setkey_tkip()
383 return ath_hw_set_keycache_entry(common, keyix + 32, hk, addr); in ath_setkey_tkip()
395 (test_bit(i + 32, common->keymap) || in ath_reserve_key_cache_slot_tkip()
396 test_bit(i + 64 + 32, common->keymap))) in ath_reserve_key_cache_slot_tkip()
417 (test_bit(i + 32, common->keymap) || in ath_reserve_key_cache_slot()
419 test_bit(i + 64 + 32, common->keymap))) in ath_reserve_key_cache_slot()
421 if (!test_bit(i + 32, common->keymap) && in ath_reserve_key_cache_slot()
424 test_bit(i + 64 + 32, common->keymap))) in ath_reserve_key_cache_slot()
425 return i + 32; in ath_reserve_key_cache_slot()
428 test_bit(i + 32, common->keymap) || in ath_reserve_key_cache_slot()
429 test_bit(i + 64 + 32, common->keymap))) in ath_reserve_key_cache_slot()
431 if (!test_bit(i + 64 + 32, common->keymap) && in ath_reserve_key_cache_slot()
433 test_bit(i + 32, common->keymap) || in ath_reserve_key_cache_slot()
435 return i + 64 + 32; in ath_reserve_key_cache_slot()
456 if (i >= 32 && i < 32 + IEEE80211_WEP_NKID) in ath_reserve_key_cache_slot()
458 if (i >= 64 + 32 && i < 64 + 32 + IEEE80211_WEP_NKID) in ath_reserve_key_cache_slot()
570 set_bit(idx + 32, common->keymap); in ath_key_config()
571 set_bit(idx + 64 + 32, common->keymap); in ath_key_config()
572 set_bit(idx + 32, common->tkip_keymap); in ath_key_config()
573 set_bit(idx + 64 + 32, common->tkip_keymap); in ath_key_config()
610 ath_hw_keyreset(common, hw_key_idx + 32); in ath_key_delete()
611 clear_bit(hw_key_idx + 32, common->keymap); in ath_key_delete()
612 clear_bit(hw_key_idx + 64 + 32, common->keymap); in ath_key_delete()
614 clear_bit(hw_key_idx + 32, common->tkip_keymap); in ath_key_delete()
615 clear_bit(hw_key_idx + 64 + 32, common->tkip_keymap); in ath_key_delete()