Lines Matching +full:0 +full:x00000700
20 #define AR_PHY_AIC_CTRL_0_B0 (AR_SM_BASE + 0x4b0)
21 #define AR_PHY_AIC_CTRL_1_B0 (AR_SM_BASE + 0x4b4)
22 #define AR_PHY_AIC_CTRL_2_B0 (AR_SM_BASE + 0x4b8)
23 #define AR_PHY_AIC_CTRL_3_B0 (AR_SM_BASE + 0x4bc)
24 #define AR_PHY_AIC_CTRL_4_B0 (AR_SM_BASE + 0x4c0)
26 #define AR_PHY_AIC_STAT_0_B0 (AR_SM_BASE + 0x4c4)
27 #define AR_PHY_AIC_STAT_1_B0 (AR_SM_BASE + 0x4c8)
28 #define AR_PHY_AIC_STAT_2_B0 (AR_SM_BASE + 0x4cc)
30 #define AR_PHY_AIC_CTRL_0_B1 (AR_SM1_BASE + 0x4b0)
31 #define AR_PHY_AIC_CTRL_1_B1 (AR_SM1_BASE + 0x4b4)
32 #define AR_PHY_AIC_CTRL_4_B1 (AR_SM1_BASE + 0x4c0)
34 #define AR_PHY_AIC_STAT_0_B1 (AR_SM1_BASE + 0x4c4)
35 #define AR_PHY_AIC_STAT_1_B1 (AR_SM1_BASE + 0x4c8)
36 #define AR_PHY_AIC_STAT_2_B1 (AR_SM1_BASE + 0x4cc)
38 #define AR_PHY_AIC_SRAM_ADDR_B0 (AR_SM_BASE + 0x5f0)
39 #define AR_PHY_AIC_SRAM_DATA_B0 (AR_SM_BASE + 0x5f4)
41 #define AR_PHY_AIC_SRAM_ADDR_B1 (AR_SM1_BASE + 0x5f0)
42 #define AR_PHY_AIC_SRAM_DATA_B1 (AR_SM1_BASE + 0x5f4)
44 #define AR_PHY_BT_COEX_4 (AR_AGC_BASE + 0x60)
45 #define AR_PHY_BT_COEX_5 (AR_AGC_BASE + 0x64)
48 #define AR_PHY_AIC_MON_ENABLE 0x80000000
50 #define AR_PHY_AIC_CAL_MAX_HOP_COUNT 0x7F000000
52 #define AR_PHY_AIC_CAL_MIN_VALID_COUNT 0x00FE0000
54 #define AR_PHY_AIC_F_WLAN 0x0001FC00
56 #define AR_PHY_AIC_CAL_CH_VALID_RESET 0x00000200
58 #define AR_PHY_AIC_CAL_ENABLE 0x00000100
60 #define AR_PHY_AIC_BTTX_PWR_THR 0x000000FE
62 #define AR_PHY_AIC_ENABLE 0x00000001
63 #define AR_PHY_AIC_ENABLE_S 0
64 #define AR_PHY_AIC_CAL_BT_REF_DELAY 0x00F00000
66 #define AR_PHY_AIC_BT_IDLE_CFG 0x00080000
68 #define AR_PHY_AIC_STDBY_COND 0x00060000
70 #define AR_PHY_AIC_STDBY_ROT_ATT_DB 0x0001F800
72 #define AR_PHY_AIC_STDBY_COM_ATT_DB 0x00000700
74 #define AR_PHY_AIC_RSSI_MAX 0x000000F0
76 #define AR_PHY_AIC_RSSI_MIN 0x0000000F
77 #define AR_PHY_AIC_RSSI_MIN_S 0
78 #define AR_PHY_AIC_RADIO_DELAY 0x7F000000
80 #define AR_PHY_AIC_CAL_STEP_SIZE_CORR 0x00F00000
82 #define AR_PHY_AIC_CAL_ROT_IDX_CORR 0x000F8000
84 #define AR_PHY_AIC_CAL_CONV_CHECK_FACTOR 0x00006000
86 #define AR_PHY_AIC_ROT_IDX_COUNT_MAX 0x00001C00
88 #define AR_PHY_AIC_CAL_SYNTH_TOGGLE 0x00000200
90 #define AR_PHY_AIC_CAL_SYNTH_AFTER_BTRX 0x00000100
92 #define AR_PHY_AIC_CAL_SYNTH_SETTLING 0x000000FF
93 #define AR_PHY_AIC_CAL_SYNTH_SETTLING_S 0
94 #define AR_PHY_AIC_MON_MAX_HOP_COUNT 0x07F00000
96 #define AR_PHY_AIC_MON_MIN_STALE_COUNT 0x000FE000
98 #define AR_PHY_AIC_MON_PWR_EST_LONG 0x00001000
100 #define AR_PHY_AIC_MON_PD_TALLY_SCALING 0x00000C00
102 #define AR_PHY_AIC_MON_PERF_THR 0x000003E0
104 #define AR_PHY_AIC_CAL_TARGET_MAG_SETTING 0x00000018
106 #define AR_PHY_AIC_CAL_PERF_CHECK_FACTOR 0x00000006
108 #define AR_PHY_AIC_CAL_PWR_EST_LONG 0x00000001
109 #define AR_PHY_AIC_CAL_PWR_EST_LONG_S 0
110 #define AR_PHY_AIC_MON_DONE 0x80000000
112 #define AR_PHY_AIC_MON_ACTIVE 0x40000000
114 #define AR_PHY_AIC_MEAS_COUNT 0x3F000000
116 #define AR_PHY_AIC_CAL_ANT_ISO_EST 0x00FC0000
118 #define AR_PHY_AIC_CAL_HOP_COUNT 0x0003F800
120 #define AR_PHY_AIC_CAL_VALID_COUNT 0x000007F0
122 #define AR_PHY_AIC_CAL_BT_TOO_WEAK_ERR 0x00000008
124 #define AR_PHY_AIC_CAL_BT_TOO_STRONG_ERR 0x00000004
126 #define AR_PHY_AIC_CAL_DONE 0x00000002
128 #define AR_PHY_AIC_CAL_ACTIVE 0x00000001
129 #define AR_PHY_AIC_CAL_ACTIVE_S 0
131 #define AR_PHY_AIC_MEAS_MAG_MIN 0xFFC00000
133 #define AR_PHY_AIC_MON_STALE_COUNT 0x003F8000
135 #define AR_PHY_AIC_MON_HOP_COUNT 0x00007F00
137 #define AR_PHY_AIC_CAL_AIC_SM 0x000000F8
139 #define AR_PHY_AIC_SM 0x00000007
140 #define AR_PHY_AIC_SM_S 0
141 #define AR_PHY_AIC_SRAM_VALID 0x00000001
142 #define AR_PHY_AIC_SRAM_VALID_S 0
143 #define AR_PHY_AIC_SRAM_ROT_QUAD_ATT_DB 0x0000007E
145 #define AR_PHY_AIC_SRAM_VGA_QUAD_SIGN 0x00000080
147 #define AR_PHY_AIC_SRAM_ROT_DIR_ATT_DB 0x00003F00
149 #define AR_PHY_AIC_SRAM_VGA_DIR_SIGN 0x00004000
151 #define AR_PHY_AIC_SRAM_COM_ATT_6DB 0x00038000
153 #define AR_PHY_AIC_CAL_ROT_ATT_DB_EST_ISO 0x0000E000
155 #define AR_PHY_AIC_CAL_COM_ATT_DB_EST_ISO 0x00001E00
157 #define AR_PHY_AIC_CAL_ISO_EST_INIT_SETTING 0x000001F8
159 #define AR_PHY_AIC_CAL_COM_ATT_DB_BACKOFF 0x00000006
161 #define AR_PHY_AIC_CAL_COM_ATT_DB_FIXED 0x00000001
162 #define AR_PHY_AIC_CAL_COM_ATT_DB_FIXED_S 0