Lines Matching defs:ath9k_ops_config
334 struct ath9k_ops_config { struct
335 int dma_beacon_response_time;
336 int sw_beacon_response_time;
337 bool cwm_ignore_extcca;
338 u32 pcie_waen;
339 u8 analog_shiftreg;
340 u32 ofdm_trig_low;
341 u32 ofdm_trig_high;
342 u32 cck_trig_high;
343 u32 cck_trig_low;
344 bool enable_paprd;
345 int serialize_regmode;
346 bool rx_intr_mitigation;
347 bool tx_intr_mitigation;
348 u8 max_txtrig_level;
349 u16 ani_poll_interval; /* ANI poll interval in ms */
350 u16 hw_hang_checks;
351 u16 rimt_first;
352 u16 rimt_last;
355 u32 aspm_l1_fix;
356 u32 xlna_gpio;
357 u32 ant_ctrl_comm2g_switch_enable;
358 bool xatten_margin_cfg;
359 bool alt_mingainidx;
360 u8 pll_pwrsave;
361 bool tx_gain_buffalo;
362 bool led_active_high;