Lines Matching +full:len +full:- +full:or +full:- +full:define
2 * Copyright (c) 2010-2011 Atheros Communications Inc.
4 * Permission to use, copy, modify, and/or distribute this software for any
5 * purpose with or without fee is hereby granted, provided that the above
11 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
12 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
13 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
14 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
18 #define AR9003_MCI_H
20 #define MCI_FLAG_DISABLE_TIMESTAMP 0x00000001 /* Disable time stamp */
21 #define MCI_RECOVERY_DUR_TSF (100 * 1000) /* 100 ms */
24 #define MCI_GPM_COEX_MAJOR_VERSION_DEFAULT 3
25 #define MCI_GPM_COEX_MINOR_VERSION_DEFAULT 0
28 #define MCI_GPM_COEX_MAJOR_VERSION_WLAN 3
29 #define MCI_GPM_COEX_MINOR_VERSION_WLAN 0
48 #define MCI_NUM_BT_CHANNELS 79
50 #define MCI_BT_MCI_FLAGS_UPDATE_CORR 0x00000002
51 #define MCI_BT_MCI_FLAGS_UPDATE_HDR 0x00000004
52 #define MCI_BT_MCI_FLAGS_UPDATE_PLD 0x00000008
53 #define MCI_BT_MCI_FLAGS_LNA_CTRL 0x00000010
54 #define MCI_BT_MCI_FLAGS_DEBUG 0x00000020
55 #define MCI_BT_MCI_FLAGS_SCHED_MSG 0x00000040
56 #define MCI_BT_MCI_FLAGS_CONT_MSG 0x00000080
57 #define MCI_BT_MCI_FLAGS_COEX_GPM 0x00000100
58 #define MCI_BT_MCI_FLAGS_CPU_INT_MSG 0x00000200
59 #define MCI_BT_MCI_FLAGS_MCI_MODE 0x00000400
60 #define MCI_BT_MCI_FLAGS_AR9462_MODE 0x00001000
61 #define MCI_BT_MCI_FLAGS_OTHER 0x00010000
63 #define MCI_DEFAULT_BT_MCI_FLAGS 0x00011dde
65 #define MCI_TOGGLE_BT_MCI_FLAGS (MCI_BT_MCI_FLAGS_UPDATE_CORR | \
70 #define MCI_2G_FLAGS_CLEAR_MASK 0x00000000
71 #define MCI_2G_FLAGS_SET_MASK MCI_TOGGLE_BT_MCI_FLAGS
72 #define MCI_2G_FLAGS MCI_DEFAULT_BT_MCI_FLAGS
74 #define MCI_5G_FLAGS_CLEAR_MASK MCI_TOGGLE_BT_MCI_FLAGS
75 #define MCI_5G_FLAGS_SET_MASK 0x00000000
76 #define MCI_5G_FLAGS (MCI_DEFAULT_BT_MCI_FLAGS & \
82 #define ATH_MCI_CONFIG_CONCUR_TX 0x00000003
83 #define ATH_MCI_CONFIG_MCI_OBS_MCI 0x00000004
84 #define ATH_MCI_CONFIG_MCI_OBS_TXRX 0x00000008
85 #define ATH_MCI_CONFIG_MCI_OBS_BT 0x00000010
86 #define ATH_MCI_CONFIG_DISABLE_MCI_CAL 0x00000020
87 #define ATH_MCI_CONFIG_DISABLE_OSLA 0x00000040
88 #define ATH_MCI_CONFIG_DISABLE_FTP_STOMP 0x00000080
89 #define ATH_MCI_CONFIG_AGGR_THRESH 0x00000700
90 #define ATH_MCI_CONFIG_AGGR_THRESH_S 8
91 #define ATH_MCI_CONFIG_DISABLE_AGGR_THRESH 0x00000800
92 #define ATH_MCI_CONFIG_CLK_DIV 0x00003000
93 #define ATH_MCI_CONFIG_CLK_DIV_S 12
94 #define ATH_MCI_CONFIG_DISABLE_TUNING 0x00004000
95 #define ATH_MCI_CONFIG_DISABLE_AIC 0x00008000
96 #define ATH_MCI_CONFIG_AIC_CAL_NUM_CHAN 0x007f0000
97 #define ATH_MCI_CONFIG_AIC_CAL_NUM_CHAN_S 16
98 #define ATH_MCI_CONFIG_NO_QUIET_ACK 0x00800000
99 #define ATH_MCI_CONFIG_NO_QUIET_ACK_S 23
100 #define ATH_MCI_CONFIG_ANT_ARCH 0x07000000
101 #define ATH_MCI_CONFIG_ANT_ARCH_S 24
102 #define ATH_MCI_CONFIG_FORCE_QUIET_ACK 0x08000000
103 #define ATH_MCI_CONFIG_FORCE_QUIET_ACK_S 27
104 #define ATH_MCI_CONFIG_FORCE_2CHAIN_ACK 0x10000000
105 #define ATH_MCI_CONFIG_MCI_STAT_DBG 0x20000000
106 #define ATH_MCI_CONFIG_MCI_WEIGHT_DBG 0x40000000
107 #define ATH_MCI_CONFIG_DISABLE_MCI 0x80000000
109 #define ATH_MCI_CONFIG_MCI_OBS_MASK (ATH_MCI_CONFIG_MCI_OBS_MCI | \
113 #define ATH_MCI_CONFIG_MCI_OBS_GPIO 0x0000002F
115 #define ATH_MCI_ANT_ARCH_1_ANT_PA_LNA_NON_SHARED 0x00
116 #define ATH_MCI_ANT_ARCH_1_ANT_PA_LNA_SHARED 0x01
117 #define ATH_MCI_ANT_ARCH_2_ANT_PA_LNA_NON_SHARED 0x02
118 #define ATH_MCI_ANT_ARCH_2_ANT_PA_LNA_SHARED 0x03
119 #define ATH_MCI_ANT_ARCH_3_ANT 0x04
121 #define MCI_ANT_ARCH_PA_LNA_SHARED(mci) \
122 ((MS(mci->config, ATH_MCI_CONFIG_ANT_ARCH) == ATH_MCI_ANT_ARCH_1_ANT_PA_LNA_SHARED) || \
123 (MS(mci->config, ATH_MCI_CONFIG_ANT_ARCH) == ATH_MCI_ANT_ARCH_2_ANT_PA_LNA_SHARED))
126 MCI_LNA_CTRL = 0x10, /* len = 0 */
127 MCI_CONT_NACK = 0x20, /* len = 0 */
128 MCI_CONT_INFO = 0x30, /* len = 4 */
129 MCI_CONT_RST = 0x40, /* len = 0 */
130 MCI_SCHD_INFO = 0x50, /* len = 16 */
131 MCI_CPU_INT = 0x60, /* len = 4 */
132 MCI_SYS_WAKING = 0x70, /* len = 0 */
133 MCI_GPM = 0x80, /* len = 16 */
134 MCI_LNA_INFO = 0x90, /* len = 1 */
138 MCI_SYS_SLEEPING = 0xa0, /* len = 0 */
139 MCI_REQ_WAKE = 0xc0, /* len = 0 */
140 MCI_DEBUG_16 = 0xfe, /* len = 2 */
141 MCI_REMOTE_RESET = 0xff /* len = 16 */
277 #define MCI_GPM_NOMORE 0
278 #define MCI_GPM_MORE 1
279 #define MCI_GPM_INVALID 0xffffffff
281 #define MCI_GPM_RECYCLE(_p_gpm) do { \
286 #define MCI_GPM_TYPE(_p_gpm) \
289 #define MCI_GPM_OPCODE(_p_gpm) \
292 #define MCI_GPM_SET_CAL_TYPE(_p_gpm, _cal_type) do { \
296 #define MCI_GPM_SET_TYPE_OPCODE(_p_gpm, _type, _opcode) do { \
301 #define MCI_GPM_IS_CAL_TYPE(_type) ((_type) <= MCI_GPM_WLAN_CAL_DONE)
307 u32 *payload, u8 len, bool wait_done,
311 u16 len, u32 sched_addr);
388 return -1; in ar9003_mci_get_max_txpower()