Lines Matching refs:ah
38 static void ar9003_hw_setup_calibration(struct ath_hw *ah, in ar9003_hw_setup_calibration() argument
41 struct ath_common *common = ath9k_hw_common(ah); in ar9003_hw_setup_calibration()
50 REG_RMW_FIELD(ah, AR_PHY_TIMING4, in ar9003_hw_setup_calibration()
53 REG_WRITE(ah, AR_PHY_CALMODE, AR_PHY_CALMODE_IQ); in ar9003_hw_setup_calibration()
59 REG_SET_BIT(ah, AR_PHY_TIMING4, AR_PHY_TIMING4_DO_CAL); in ar9003_hw_setup_calibration()
72 static bool ar9003_hw_per_calibration(struct ath_hw *ah, in ar9003_hw_per_calibration() argument
77 struct ath9k_hw_cal_data *caldata = ah->caldata; in ar9003_hw_per_calibration()
83 if (REG_READ(ah, AR_PHY_TIMING4) & AR_PHY_TIMING4_DO_CAL) in ar9003_hw_per_calibration()
89 cur_caldata->calCollect(ah); in ar9003_hw_per_calibration()
90 ah->cal_samples++; in ar9003_hw_per_calibration()
92 if (ah->cal_samples >= cur_caldata->calNumSamples) { in ar9003_hw_per_calibration()
102 cur_caldata->calPostProc(ah, numChains); in ar9003_hw_per_calibration()
113 ar9003_hw_setup_calibration(ah, currCal); in ar9003_hw_per_calibration()
117 ath9k_hw_reset_calibration(ah, currCal); in ar9003_hw_per_calibration()
123 static int ar9003_hw_calibrate(struct ath_hw *ah, struct ath9k_channel *chan, in ar9003_hw_calibrate() argument
127 struct ath9k_cal_list *currCal = ah->cal_list_curr; in ar9003_hw_calibrate()
142 iscaldone = ar9003_hw_per_calibration(ah, chan, in ar9003_hw_calibrate()
145 ah->cal_list_curr = currCal = currCal->calNext; in ar9003_hw_calibrate()
149 ath9k_hw_reset_calibration(ah, currCal); in ar9003_hw_calibrate()
158 if (longcal && ath9k_hw_getnf(ah, chan)) { in ar9003_hw_calibrate()
164 ret = ath9k_hw_loadnf(ah, ah->curchan); in ar9003_hw_calibrate()
169 ath9k_hw_start_nfcal(ah, false); in ar9003_hw_calibrate()
175 static void ar9003_hw_iqcal_collect(struct ath_hw *ah) in ar9003_hw_iqcal_collect() argument
181 if (ah->txchainmask & BIT(i)) { in ar9003_hw_iqcal_collect()
182 ah->totalPowerMeasI[i] += in ar9003_hw_iqcal_collect()
183 REG_READ(ah, AR_PHY_CAL_MEAS_0(i)); in ar9003_hw_iqcal_collect()
184 ah->totalPowerMeasQ[i] += in ar9003_hw_iqcal_collect()
185 REG_READ(ah, AR_PHY_CAL_MEAS_1(i)); in ar9003_hw_iqcal_collect()
186 ah->totalIqCorrMeas[i] += in ar9003_hw_iqcal_collect()
187 (int32_t) REG_READ(ah, AR_PHY_CAL_MEAS_2(i)); in ar9003_hw_iqcal_collect()
188 ath_dbg(ath9k_hw_common(ah), CALIBRATE, in ar9003_hw_iqcal_collect()
190 ah->cal_samples, i, ah->totalPowerMeasI[i], in ar9003_hw_iqcal_collect()
191 ah->totalPowerMeasQ[i], in ar9003_hw_iqcal_collect()
192 ah->totalIqCorrMeas[i]); in ar9003_hw_iqcal_collect()
197 static void ar9003_hw_iqcalibrate(struct ath_hw *ah, u8 numChains) in ar9003_hw_iqcalibrate() argument
199 struct ath_common *common = ath9k_hw_common(ah); in ar9003_hw_iqcalibrate()
211 powerMeasI = ah->totalPowerMeasI[i]; in ar9003_hw_iqcalibrate()
212 powerMeasQ = ah->totalPowerMeasQ[i]; in ar9003_hw_iqcalibrate()
213 iqCorrMeas = ah->totalIqCorrMeas[i]; in ar9003_hw_iqcalibrate()
220 i, ah->totalIqCorrMeas[i]); in ar9003_hw_iqcalibrate()
271 REG_READ(ah, offset_array[i])); in ar9003_hw_iqcalibrate()
273 if (AR_SREV_9565(ah) && in ar9003_hw_iqcalibrate()
278 REG_RMW_FIELD(ah, offset_array[i], in ar9003_hw_iqcalibrate()
281 REG_RMW_FIELD(ah, offset_array[i], in ar9003_hw_iqcalibrate()
288 REG_READ(ah, offset_array[i])); in ar9003_hw_iqcalibrate()
293 REG_READ(ah, offset_array[i])); in ar9003_hw_iqcalibrate()
300 REG_SET_BIT(ah, AR_PHY_RX_IQCAL_CORR_B0, in ar9003_hw_iqcalibrate()
306 REG_READ(ah, AR_PHY_RX_IQCAL_CORR_B0)); in ar9003_hw_iqcalibrate()
317 static void ar9003_hw_init_cal_settings(struct ath_hw *ah) in ar9003_hw_init_cal_settings() argument
319 ah->iq_caldata.calData = &iq_cal_single_sample; in ar9003_hw_init_cal_settings()
321 if (AR_SREV_9300_20_OR_LATER(ah)) { in ar9003_hw_init_cal_settings()
322 ah->enabled_cals |= TX_IQ_CAL; in ar9003_hw_init_cal_settings()
323 if (AR_SREV_9485_OR_LATER(ah) && !AR_SREV_9340(ah)) in ar9003_hw_init_cal_settings()
324 ah->enabled_cals |= TX_IQ_ON_AGC_CAL; in ar9003_hw_init_cal_settings()
327 ah->supp_cals = IQ_MISMATCH_CAL; in ar9003_hw_init_cal_settings()
333 static bool ar9003_hw_dynamic_osdac_selection(struct ath_hw *ah, in ar9003_hw_dynamic_osdac_selection() argument
336 struct ath_common *common = ath9k_hw_common(ah); in ar9003_hw_dynamic_osdac_selection()
349 REG_CLR_BIT(ah, AR_PHY_AGC_CONTROL(ah), in ar9003_hw_dynamic_osdac_selection()
351 REG_CLR_BIT(ah, AR_PHY_TX_IQCAL_CONTROL_0(ah), in ar9003_hw_dynamic_osdac_selection()
353 REG_WRITE(ah, AR_PHY_AGC_CONTROL(ah), in ar9003_hw_dynamic_osdac_selection()
354 REG_READ(ah, AR_PHY_AGC_CONTROL(ah)) | AR_PHY_AGC_CONTROL_CAL); in ar9003_hw_dynamic_osdac_selection()
356 status = ath9k_hw_wait(ah, AR_PHY_AGC_CONTROL(ah), in ar9003_hw_dynamic_osdac_selection()
370 REG_SET_BIT(ah, AR_PHY_AGC_CONTROL(ah), in ar9003_hw_dynamic_osdac_selection()
372 REG_CLR_BIT(ah, AR_PHY_CL_CAL_CTL, in ar9003_hw_dynamic_osdac_selection()
374 REG_CLR_BIT(ah, AR_PHY_AGC_CONTROL(ah), in ar9003_hw_dynamic_osdac_selection()
376 REG_CLR_BIT(ah, AR_PHY_AGC_CONTROL(ah), in ar9003_hw_dynamic_osdac_selection()
384 osdac_ch0 = (REG_READ(ah, AR_PHY_65NM_CH0_BB1) >> 30) & 0x3; in ar9003_hw_dynamic_osdac_selection()
385 osdac_ch1 = (REG_READ(ah, AR_PHY_65NM_CH1_BB1) >> 30) & 0x3; in ar9003_hw_dynamic_osdac_selection()
386 osdac_ch2 = (REG_READ(ah, AR_PHY_65NM_CH2_BB1) >> 30) & 0x3; in ar9003_hw_dynamic_osdac_selection()
388 REG_SET_BIT(ah, AR_PHY_ACTIVE, AR_PHY_ACTIVE_EN); in ar9003_hw_dynamic_osdac_selection()
390 REG_WRITE(ah, AR_PHY_AGC_CONTROL(ah), in ar9003_hw_dynamic_osdac_selection()
391 REG_READ(ah, AR_PHY_AGC_CONTROL(ah)) | AR_PHY_AGC_CONTROL_CAL); in ar9003_hw_dynamic_osdac_selection()
393 status = ath9k_hw_wait(ah, AR_PHY_AGC_CONTROL(ah), in ar9003_hw_dynamic_osdac_selection()
402 REG_CLR_BIT(ah, AR_PHY_ACTIVE, AR_PHY_ACTIVE_EN); in ar9003_hw_dynamic_osdac_selection()
407 REG_WRITE(ah, AR_PHY_65NM_CH0_BB3, in ar9003_hw_dynamic_osdac_selection()
408 ((REG_READ(ah, AR_PHY_65NM_CH0_BB3) & 0xfffffcff) | (1 << 8))); in ar9003_hw_dynamic_osdac_selection()
409 REG_WRITE(ah, AR_PHY_65NM_CH1_BB3, in ar9003_hw_dynamic_osdac_selection()
410 ((REG_READ(ah, AR_PHY_65NM_CH1_BB3) & 0xfffffcff) | (1 << 8))); in ar9003_hw_dynamic_osdac_selection()
411 REG_WRITE(ah, AR_PHY_65NM_CH2_BB3, in ar9003_hw_dynamic_osdac_selection()
412 ((REG_READ(ah, AR_PHY_65NM_CH2_BB3) & 0xfffffcff) | (1 << 8))); in ar9003_hw_dynamic_osdac_selection()
414 temp = REG_READ(ah, AR_PHY_65NM_CH0_BB3); in ar9003_hw_dynamic_osdac_selection()
418 temp = REG_READ(ah, AR_PHY_65NM_CH1_BB3); in ar9003_hw_dynamic_osdac_selection()
422 temp = REG_READ(ah, AR_PHY_65NM_CH2_BB3); in ar9003_hw_dynamic_osdac_selection()
429 REG_WRITE(ah, AR_PHY_65NM_CH0_BB3, in ar9003_hw_dynamic_osdac_selection()
430 ((REG_READ(ah, AR_PHY_65NM_CH0_BB3) & 0xfffffcff) | (2 << 8))); in ar9003_hw_dynamic_osdac_selection()
431 REG_WRITE(ah, AR_PHY_65NM_CH1_BB3, in ar9003_hw_dynamic_osdac_selection()
432 ((REG_READ(ah, AR_PHY_65NM_CH1_BB3) & 0xfffffcff) | (2 << 8))); in ar9003_hw_dynamic_osdac_selection()
433 REG_WRITE(ah, AR_PHY_65NM_CH2_BB3, in ar9003_hw_dynamic_osdac_selection()
434 ((REG_READ(ah, AR_PHY_65NM_CH2_BB3) & 0xfffffcff) | (2 << 8))); in ar9003_hw_dynamic_osdac_selection()
436 temp = REG_READ(ah, AR_PHY_65NM_CH0_BB3); in ar9003_hw_dynamic_osdac_selection()
440 temp = REG_READ(ah, AR_PHY_65NM_CH1_BB3); in ar9003_hw_dynamic_osdac_selection()
444 temp = REG_READ(ah, AR_PHY_65NM_CH2_BB3); in ar9003_hw_dynamic_osdac_selection()
451 REG_WRITE(ah, AR_PHY_65NM_CH0_BB3, in ar9003_hw_dynamic_osdac_selection()
452 ((REG_READ(ah, AR_PHY_65NM_CH0_BB3) & 0xfffffcff) | (3 << 8))); in ar9003_hw_dynamic_osdac_selection()
453 REG_WRITE(ah, AR_PHY_65NM_CH1_BB3, in ar9003_hw_dynamic_osdac_selection()
454 ((REG_READ(ah, AR_PHY_65NM_CH1_BB3) & 0xfffffcff) | (3 << 8))); in ar9003_hw_dynamic_osdac_selection()
455 REG_WRITE(ah, AR_PHY_65NM_CH2_BB3, in ar9003_hw_dynamic_osdac_selection()
456 ((REG_READ(ah, AR_PHY_65NM_CH2_BB3) & 0xfffffcff) | (3 << 8))); in ar9003_hw_dynamic_osdac_selection()
458 temp = REG_READ(ah, AR_PHY_65NM_CH0_BB3); in ar9003_hw_dynamic_osdac_selection()
462 temp = REG_READ(ah, AR_PHY_65NM_CH1_BB3); in ar9003_hw_dynamic_osdac_selection()
466 temp = REG_READ(ah, AR_PHY_65NM_CH2_BB3); in ar9003_hw_dynamic_osdac_selection()
481 val = REG_READ(ah, AR_PHY_65NM_CH0_BB1) & 0x3fffffff; in ar9003_hw_dynamic_osdac_selection()
483 REG_WRITE(ah, AR_PHY_65NM_CH0_BB1, val); in ar9003_hw_dynamic_osdac_selection()
502 val = REG_READ(ah, AR_PHY_65NM_CH1_BB1) & 0x3fffffff; in ar9003_hw_dynamic_osdac_selection()
504 REG_WRITE(ah, AR_PHY_65NM_CH1_BB1, val); in ar9003_hw_dynamic_osdac_selection()
523 val = REG_READ(ah, AR_PHY_65NM_CH2_BB1) & 0x3fffffff; in ar9003_hw_dynamic_osdac_selection()
525 REG_WRITE(ah, AR_PHY_65NM_CH2_BB1, val); in ar9003_hw_dynamic_osdac_selection()
534 REG_CLR_BIT(ah, AR_PHY_AGC_CONTROL(ah), in ar9003_hw_dynamic_osdac_selection()
536 REG_SET_BIT(ah, AR_PHY_ACTIVE, AR_PHY_ACTIVE_EN); in ar9003_hw_dynamic_osdac_selection()
542 REG_SET_BIT(ah, AR_PHY_TX_IQCAL_CONTROL_0(ah), in ar9003_hw_dynamic_osdac_selection()
551 static bool ar9003_hw_solve_iq_cal(struct ath_hw *ah, in ar9003_hw_solve_iq_cal() argument
567 struct ath_common *common = ath9k_hw_common(ah); in ar9003_hw_solve_iq_cal()
599 static s32 ar9003_hw_find_mag_approx(struct ath_hw *ah, s32 in_re, s32 in_im) in ar9003_hw_find_mag_approx() argument
618 static bool ar9003_hw_calc_iq_corr(struct ath_hw *ah, in ar9003_hw_calc_iq_corr() argument
637 struct ath_common *common = ath9k_hw_common(ah); in ar9003_hw_calc_iq_corr()
739 mag1 = ar9003_hw_find_mag_approx(ah, cos_2phi_1, sin_2phi_1); in ar9003_hw_calc_iq_corr()
740 mag2 = ar9003_hw_find_mag_approx(ah, cos_2phi_2, sin_2phi_2); in ar9003_hw_calc_iq_corr()
755 if (!ar9003_hw_solve_iq_cal(ah, in ar9003_hw_calc_iq_corr()
888 static void ar9003_hw_tx_iq_cal_outlier_detection(struct ath_hw *ah, in ar9003_hw_tx_iq_cal_outlier_detection() argument
895 struct ath9k_hw_cal_data *caldata = ah->caldata; in ar9003_hw_tx_iq_cal_outlier_detection()
900 AR_PHY_TX_IQCAL_CORR_COEFF_B0(ah, i); in ar9003_hw_tx_iq_cal_outlier_detection()
901 if (!AR_SREV_9485(ah)) { in ar9003_hw_tx_iq_cal_outlier_detection()
914 if (!(ah->txchainmask & (1 << i))) in ar9003_hw_tx_iq_cal_outlier_detection()
916 nmeasurement = REG_READ_FIELD(ah, in ar9003_hw_tx_iq_cal_outlier_detection()
917 AR_PHY_TX_IQCAL_STATUS_B0(ah), in ar9003_hw_tx_iq_cal_outlier_detection()
926 if (!AR_SREV_9550(ah)) { in ar9003_hw_tx_iq_cal_outlier_detection()
949 REG_RMW_FIELD(ah, tx_corr_coeff[im][i], in ar9003_hw_tx_iq_cal_outlier_detection()
953 REG_RMW_FIELD(ah, tx_corr_coeff[im][i], in ar9003_hw_tx_iq_cal_outlier_detection()
965 REG_RMW_FIELD(ah, AR_PHY_TX_IQCAL_CONTROL_3, in ar9003_hw_tx_iq_cal_outlier_detection()
967 REG_RMW_FIELD(ah, AR_PHY_RX_IQCAL_CORR_B0, in ar9003_hw_tx_iq_cal_outlier_detection()
980 static bool ar9003_hw_tx_iq_cal_run(struct ath_hw *ah) in ar9003_hw_tx_iq_cal_run() argument
982 struct ath_common *common = ath9k_hw_common(ah); in ar9003_hw_tx_iq_cal_run()
985 tx_gain_forced = REG_READ_FIELD(ah, AR_PHY_TX_FORCED_GAIN, in ar9003_hw_tx_iq_cal_run()
988 REG_RMW_FIELD(ah, AR_PHY_TX_FORCED_GAIN, in ar9003_hw_tx_iq_cal_run()
991 REG_RMW_FIELD(ah, AR_PHY_TX_IQCAL_START(ah), in ar9003_hw_tx_iq_cal_run()
994 if (!ath9k_hw_wait(ah, AR_PHY_TX_IQCAL_START(ah), in ar9003_hw_tx_iq_cal_run()
1003 static void __ar955x_tx_iq_cal_sort(struct ath_hw *ah, in __ar955x_tx_iq_cal_sort() argument
1007 struct ath_common *common = ath9k_hw_common(ah); in __ar955x_tx_iq_cal_sort()
1036 static bool ar955x_tx_iq_cal_median(struct ath_hw *ah, in ar955x_tx_iq_cal_median() argument
1047 __ar955x_tx_iq_cal_sort(ah, coeff, i, nmeasurement); in ar955x_tx_iq_cal_median()
1053 static void ar9003_hw_tx_iq_cal_post_proc(struct ath_hw *ah, in ar9003_hw_tx_iq_cal_post_proc() argument
1057 struct ath_common *common = ath9k_hw_common(ah); in ar9003_hw_tx_iq_cal_post_proc()
1059 AR_PHY_TX_IQCAL_STATUS_B0(ah), in ar9003_hw_tx_iq_cal_post_proc()
1075 if (!(ah->txchainmask & (1 << i))) in ar9003_hw_tx_iq_cal_post_proc()
1078 nmeasurement = REG_READ_FIELD(ah, in ar9003_hw_tx_iq_cal_post_proc()
1079 AR_PHY_TX_IQCAL_STATUS_B0(ah), in ar9003_hw_tx_iq_cal_post_proc()
1088 if (REG_READ(ah, txiqcal_status[i]) & in ar9003_hw_tx_iq_cal_post_proc()
1098 REG_RMW_FIELD(ah, in ar9003_hw_tx_iq_cal_post_proc()
1099 AR_PHY_CHAN_INFO_MEMORY(ah), in ar9003_hw_tx_iq_cal_post_proc()
1104 iq_res[idx] = REG_READ(ah, in ar9003_hw_tx_iq_cal_post_proc()
1108 REG_RMW_FIELD(ah, in ar9003_hw_tx_iq_cal_post_proc()
1109 AR_PHY_CHAN_INFO_MEMORY(ah), in ar9003_hw_tx_iq_cal_post_proc()
1114 iq_res[idx + 1] = 0xffff & REG_READ(ah, in ar9003_hw_tx_iq_cal_post_proc()
1123 if (!ar9003_hw_calc_iq_corr(ah, i, iq_res, in ar9003_hw_tx_iq_cal_post_proc()
1142 if (AR_SREV_9550(ah)) in ar9003_hw_tx_iq_cal_post_proc()
1143 outlier_detect = ar955x_tx_iq_cal_median(ah, &coeff, in ar9003_hw_tx_iq_cal_post_proc()
1146 ar9003_hw_tx_iq_cal_outlier_detection(ah, &coeff, is_reusable); in ar9003_hw_tx_iq_cal_post_proc()
1155 static void ar9003_hw_tx_iq_cal_reload(struct ath_hw *ah) in ar9003_hw_tx_iq_cal_reload() argument
1157 struct ath9k_hw_cal_data *caldata = ah->caldata; in ar9003_hw_tx_iq_cal_reload()
1164 AR_PHY_TX_IQCAL_CORR_COEFF_B0(ah, i); in ar9003_hw_tx_iq_cal_reload()
1165 if (!AR_SREV_9485(ah)) { in ar9003_hw_tx_iq_cal_reload()
1177 if (!(ah->txchainmask & (1 << i))) in ar9003_hw_tx_iq_cal_reload()
1182 REG_RMW_FIELD(ah, tx_corr_coeff[im][i], in ar9003_hw_tx_iq_cal_reload()
1186 REG_RMW_FIELD(ah, tx_corr_coeff[im][i], in ar9003_hw_tx_iq_cal_reload()
1192 REG_RMW_FIELD(ah, AR_PHY_TX_IQCAL_CONTROL_3, in ar9003_hw_tx_iq_cal_reload()
1194 REG_RMW_FIELD(ah, AR_PHY_RX_IQCAL_CORR_B0, in ar9003_hw_tx_iq_cal_reload()
1198 static void ar9003_hw_manual_peak_cal(struct ath_hw *ah, u8 chain, bool is_2g) in ar9003_hw_manual_peak_cal() argument
1203 if (AR_SREV_9550(ah) || AR_SREV_9531(ah)) in ar9003_hw_manual_peak_cal()
1205 else if (AR_SREV_9561(ah)) in ar9003_hw_manual_peak_cal()
1211 REG_RMW_FIELD(ah, AR_PHY_65NM_RXRF_GAINSTAGES(chain), in ar9003_hw_manual_peak_cal()
1213 REG_RMW_FIELD(ah, AR_PHY_65NM_RXRF_GAINSTAGES(chain), in ar9003_hw_manual_peak_cal()
1216 if (AR_SREV_9003_PCOEM(ah) || AR_SREV_9330_11(ah)) { in ar9003_hw_manual_peak_cal()
1218 REG_RMW_FIELD(ah, AR_PHY_65NM_RXRF_GAINSTAGES(chain), in ar9003_hw_manual_peak_cal()
1221 REG_RMW_FIELD(ah, AR_PHY_65NM_RXRF_GAINSTAGES(chain), in ar9003_hw_manual_peak_cal()
1228 REG_RMW_FIELD(ah, AR_PHY_65NM_RXTX2(chain), in ar9003_hw_manual_peak_cal()
1230 REG_RMW_FIELD(ah, AR_PHY_65NM_RXTX2(chain), in ar9003_hw_manual_peak_cal()
1236 REG_RMW_FIELD(ah, AR_PHY_65NM_RXRF_AGC(chain), in ar9003_hw_manual_peak_cal()
1238 REG_RMW_FIELD(ah, AR_PHY_65NM_RXRF_AGC(chain), in ar9003_hw_manual_peak_cal()
1240 REG_RMW_FIELD(ah, AR_PHY_65NM_RXRF_AGC(chain), in ar9003_hw_manual_peak_cal()
1243 if (AR_SREV_9330_11(ah)) in ar9003_hw_manual_peak_cal()
1244 REG_RMW_FIELD(ah, AR_PHY_65NM_RXRF_AGC(chain), in ar9003_hw_manual_peak_cal()
1248 REG_RMW_FIELD(ah, AR_PHY_65NM_RXRF_AGC(chain), in ar9003_hw_manual_peak_cal()
1252 REG_RMW_FIELD(ah, AR_PHY_65NM_RXRF_AGC(chain), in ar9003_hw_manual_peak_cal()
1261 REG_RMW_FIELD(ah, AR_PHY_65NM_RXRF_AGC(chain), in ar9003_hw_manual_peak_cal()
1265 REG_RMW_FIELD(ah, AR_PHY_65NM_RXRF_AGC(chain), in ar9003_hw_manual_peak_cal()
1269 agc_out = REG_READ_FIELD(ah, AR_PHY_65NM_RXRF_AGC(chain), in ar9003_hw_manual_peak_cal()
1276 REG_RMW_FIELD(ah, AR_PHY_65NM_RXRF_AGC(chain), in ar9003_hw_manual_peak_cal()
1279 REG_RMW_FIELD(ah, AR_PHY_65NM_RXRF_AGC(chain), in ar9003_hw_manual_peak_cal()
1285 REG_RMW_FIELD(ah, AR_PHY_65NM_RXRF_GAINSTAGES(chain), in ar9003_hw_manual_peak_cal()
1290 REG_RMW_FIELD(ah, AR_PHY_65NM_RXTX2(chain), in ar9003_hw_manual_peak_cal()
1295 REG_RMW_FIELD(ah, AR_PHY_65NM_RXRF_AGC(chain), in ar9003_hw_manual_peak_cal()
1299 static void ar9003_hw_do_pcoem_manual_peak_cal(struct ath_hw *ah, in ar9003_hw_do_pcoem_manual_peak_cal() argument
1303 struct ath9k_hw_cal_data *caldata = ah->caldata; in ar9003_hw_do_pcoem_manual_peak_cal()
1306 if ((ah->caps.hw_caps & ATH9K_HW_CAP_RTT) && !run_rtt_cal) in ar9003_hw_do_pcoem_manual_peak_cal()
1310 if (!(ah->rxchainmask & (1 << i))) in ar9003_hw_do_pcoem_manual_peak_cal()
1312 ar9003_hw_manual_peak_cal(ah, i, IS_CHAN_2GHZ(chan)); in ar9003_hw_do_pcoem_manual_peak_cal()
1318 if ((ah->caps.hw_caps & ATH9K_HW_CAP_RTT) && caldata) { in ar9003_hw_do_pcoem_manual_peak_cal()
1320 caldata->caldac[0] = REG_READ_FIELD(ah, in ar9003_hw_do_pcoem_manual_peak_cal()
1323 caldata->caldac[1] = REG_READ_FIELD(ah, in ar9003_hw_do_pcoem_manual_peak_cal()
1327 caldata->caldac[0] = REG_READ_FIELD(ah, in ar9003_hw_do_pcoem_manual_peak_cal()
1330 caldata->caldac[1] = REG_READ_FIELD(ah, in ar9003_hw_do_pcoem_manual_peak_cal()
1337 static void ar9003_hw_cl_cal_post_proc(struct ath_hw *ah, bool is_reusable) in ar9003_hw_cl_cal_post_proc() argument
1342 struct ath9k_hw_cal_data *caldata = ah->caldata; in ar9003_hw_cl_cal_post_proc()
1346 if (!caldata || !(ah->enabled_cals & TX_CL_CAL)) in ar9003_hw_cl_cal_post_proc()
1349 txclcal_done = !!(REG_READ(ah, AR_PHY_AGC_CONTROL(ah)) & in ar9003_hw_cl_cal_post_proc()
1354 if (!(ah->txchainmask & (1 << i))) in ar9003_hw_cl_cal_post_proc()
1357 REG_WRITE(ah, CL_TAB_ENTRY(cl_idx[i]), in ar9003_hw_cl_cal_post_proc()
1362 if (!(ah->txchainmask & (1 << i))) in ar9003_hw_cl_cal_post_proc()
1366 REG_READ(ah, CL_TAB_ENTRY(cl_idx[i])); in ar9003_hw_cl_cal_post_proc()
1372 static void ar9003_hw_init_cal_common(struct ath_hw *ah) in ar9003_hw_init_cal_common() argument
1374 struct ath9k_hw_cal_data *caldata = ah->caldata; in ar9003_hw_init_cal_common()
1377 ah->cal_list = ah->cal_list_last = ah->cal_list_curr = NULL; in ar9003_hw_init_cal_common()
1379 INIT_CAL(&ah->iq_caldata); in ar9003_hw_init_cal_common()
1380 INSERT_CAL(ah, &ah->iq_caldata); in ar9003_hw_init_cal_common()
1383 ah->cal_list_curr = ah->cal_list; in ar9003_hw_init_cal_common()
1385 if (ah->cal_list_curr) in ar9003_hw_init_cal_common()
1386 ath9k_hw_reset_calibration(ah, ah->cal_list_curr); in ar9003_hw_init_cal_common()
1392 static bool ar9003_hw_init_cal_pcoem(struct ath_hw *ah, in ar9003_hw_init_cal_pcoem() argument
1395 struct ath_common *common = ath9k_hw_common(ah); in ar9003_hw_init_cal_pcoem()
1396 struct ath9k_hw_cal_data *caldata = ah->caldata; in ar9003_hw_init_cal_pcoem()
1400 bool rtt = !!(ah->caps.hw_caps & ATH9K_HW_CAP_RTT); in ar9003_hw_init_cal_pcoem()
1407 ar9003_hw_set_chain_masks(ah, ah->caps.rx_chainmask, ah->caps.tx_chainmask); in ar9003_hw_init_cal_pcoem()
1410 if (!ar9003_hw_rtt_restore(ah, chan)) in ar9003_hw_init_cal_pcoem()
1420 ar9003_hw_rtt_enable(ah); in ar9003_hw_init_cal_pcoem()
1421 ar9003_hw_rtt_set_mask(ah, 0x00); in ar9003_hw_init_cal_pcoem()
1422 ar9003_hw_rtt_clear_hist(ah); in ar9003_hw_init_cal_pcoem()
1427 agc_ctrl = REG_READ(ah, AR_PHY_AGC_CONTROL(ah)); in ar9003_hw_init_cal_pcoem()
1432 REG_WRITE(ah, AR_PHY_AGC_CONTROL(ah), agc_ctrl); in ar9003_hw_init_cal_pcoem()
1434 if (ah->ah_flags & AH_FASTCC) in ar9003_hw_init_cal_pcoem()
1439 if (ah->enabled_cals & TX_CL_CAL) { in ar9003_hw_init_cal_pcoem()
1441 REG_CLR_BIT(ah, AR_PHY_CL_CAL_CTL, in ar9003_hw_init_cal_pcoem()
1444 REG_SET_BIT(ah, AR_PHY_CL_CAL_CTL, in ar9003_hw_init_cal_pcoem()
1451 !(ah->enabled_cals & TX_IQ_CAL)) in ar9003_hw_init_cal_pcoem()
1455 REG_RMW_FIELD(ah, AR_PHY_TX_IQCAL_CONTROL_1(ah), in ar9003_hw_init_cal_pcoem()
1463 if (ah->enabled_cals & TX_IQ_ON_AGC_CAL) { in ar9003_hw_init_cal_pcoem()
1465 REG_SET_BIT(ah, AR_PHY_TX_IQCAL_CONTROL_0(ah), in ar9003_hw_init_cal_pcoem()
1468 REG_CLR_BIT(ah, AR_PHY_TX_IQCAL_CONTROL_0(ah), in ar9003_hw_init_cal_pcoem()
1474 if (ath9k_hw_mci_is_enabled(ah) && IS_CHAN_2GHZ(chan) && run_agc_cal) in ar9003_hw_init_cal_pcoem()
1475 ar9003_mci_init_cal_req(ah, &is_reusable); in ar9003_hw_init_cal_pcoem()
1477 if (REG_READ(ah, AR_PHY_CL_CAL_CTL) & AR_PHY_CL_CAL_ENABLE) { in ar9003_hw_init_cal_pcoem()
1478 rx_delay = REG_READ(ah, AR_PHY_RX_DELAY); in ar9003_hw_init_cal_pcoem()
1480 REG_WRITE(ah, AR_PHY_ACTIVE, AR_PHY_ACTIVE_DIS); in ar9003_hw_init_cal_pcoem()
1482 REG_WRITE(ah, AR_PHY_RX_DELAY, AR_PHY_RX_DELAY_DELAY); in ar9003_hw_init_cal_pcoem()
1483 REG_WRITE(ah, AR_PHY_ACTIVE, AR_PHY_ACTIVE_EN); in ar9003_hw_init_cal_pcoem()
1486 if (run_agc_cal || !(ah->ah_flags & AH_FASTCC)) { in ar9003_hw_init_cal_pcoem()
1488 REG_WRITE(ah, AR_PHY_AGC_CONTROL(ah), in ar9003_hw_init_cal_pcoem()
1489 REG_READ(ah, AR_PHY_AGC_CONTROL(ah)) | in ar9003_hw_init_cal_pcoem()
1493 status = ath9k_hw_wait(ah, AR_PHY_AGC_CONTROL(ah), in ar9003_hw_init_cal_pcoem()
1497 ar9003_hw_do_pcoem_manual_peak_cal(ah, chan, run_rtt_cal); in ar9003_hw_init_cal_pcoem()
1500 if (REG_READ(ah, AR_PHY_CL_CAL_CTL) & AR_PHY_CL_CAL_ENABLE) { in ar9003_hw_init_cal_pcoem()
1501 REG_WRITE(ah, AR_PHY_RX_DELAY, rx_delay); in ar9003_hw_init_cal_pcoem()
1505 if (ath9k_hw_mci_is_enabled(ah) && IS_CHAN_2GHZ(chan) && run_agc_cal) in ar9003_hw_init_cal_pcoem()
1506 ar9003_mci_init_cal_done(ah); in ar9003_hw_init_cal_pcoem()
1510 REG_WRITE(ah, AR_PHY_AGC_CONTROL(ah), agc_ctrl); in ar9003_hw_init_cal_pcoem()
1515 ar9003_hw_rtt_disable(ah); in ar9003_hw_init_cal_pcoem()
1524 ar9003_hw_tx_iq_cal_post_proc(ah, 0, is_reusable); in ar9003_hw_init_cal_pcoem()
1526 ar9003_hw_tx_iq_cal_reload(ah); in ar9003_hw_init_cal_pcoem()
1528 ar9003_hw_cl_cal_post_proc(ah, is_reusable); in ar9003_hw_init_cal_pcoem()
1532 if (!ath9k_hw_rfbus_req(ah)) { in ar9003_hw_init_cal_pcoem()
1533 ath_err(ath9k_hw_common(ah), in ar9003_hw_init_cal_pcoem()
1536 ar9003_hw_rtt_fill_hist(ah); in ar9003_hw_init_cal_pcoem()
1539 ar9003_hw_rtt_load_hist(ah); in ar9003_hw_init_cal_pcoem()
1542 ath9k_hw_rfbus_done(ah); in ar9003_hw_init_cal_pcoem()
1545 ar9003_hw_rtt_disable(ah); in ar9003_hw_init_cal_pcoem()
1549 ar9003_hw_set_chain_masks(ah, ah->rxchainmask, ah->txchainmask); in ar9003_hw_init_cal_pcoem()
1551 ar9003_hw_init_cal_common(ah); in ar9003_hw_init_cal_pcoem()
1556 static bool do_ar9003_agc_cal(struct ath_hw *ah) in do_ar9003_agc_cal() argument
1558 struct ath_common *common = ath9k_hw_common(ah); in do_ar9003_agc_cal()
1561 REG_WRITE(ah, AR_PHY_AGC_CONTROL(ah), in do_ar9003_agc_cal()
1562 REG_READ(ah, AR_PHY_AGC_CONTROL(ah)) | in do_ar9003_agc_cal()
1565 status = ath9k_hw_wait(ah, AR_PHY_AGC_CONTROL(ah), in do_ar9003_agc_cal()
1579 static bool ar9003_hw_init_cal_soc(struct ath_hw *ah, in ar9003_hw_init_cal_soc() argument
1588 ar9003_hw_set_chain_masks(ah, ah->caps.rx_chainmask, ah->caps.tx_chainmask); in ar9003_hw_init_cal_soc()
1590 if (ah->enabled_cals & TX_CL_CAL) { in ar9003_hw_init_cal_soc()
1591 REG_SET_BIT(ah, AR_PHY_CL_CAL_CTL, AR_PHY_CL_CAL_ENABLE); in ar9003_hw_init_cal_soc()
1599 REG_RMW_FIELD(ah, AR_PHY_TX_IQCAL_CONTROL_1(ah), in ar9003_hw_init_cal_soc()
1607 if (ah->enabled_cals & TX_IQ_ON_AGC_CAL) { in ar9003_hw_init_cal_soc()
1608 if (REG_READ_FIELD(ah, AR_PHY_TX_IQCAL_CONTROL_0(ah), in ar9003_hw_init_cal_soc()
1624 txiqcal_done = ar9003_hw_tx_iq_cal_run(ah); in ar9003_hw_init_cal_soc()
1625 REG_WRITE(ah, AR_PHY_ACTIVE, AR_PHY_ACTIVE_DIS); in ar9003_hw_init_cal_soc()
1627 REG_WRITE(ah, AR_PHY_ACTIVE, AR_PHY_ACTIVE_EN); in ar9003_hw_init_cal_soc()
1630 if (AR_SREV_9550(ah) && IS_CHAN_2GHZ(chan)) { in ar9003_hw_init_cal_soc()
1631 if (!ar9003_hw_dynamic_osdac_selection(ah, txiqcal_done)) in ar9003_hw_init_cal_soc()
1636 if (run_agc_cal || !(ah->ah_flags & AH_FASTCC)) { in ar9003_hw_init_cal_soc()
1638 if (!(ah->rxchainmask & (1 << i))) in ar9003_hw_init_cal_soc()
1641 ar9003_hw_manual_peak_cal(ah, i, in ar9003_hw_init_cal_soc()
1653 if (!AR_SREV_9550(ah)) { in ar9003_hw_init_cal_soc()
1654 status = do_ar9003_agc_cal(ah); in ar9003_hw_init_cal_soc()
1659 ar9003_hw_tx_iq_cal_post_proc(ah, 0, false); in ar9003_hw_init_cal_soc()
1662 status = do_ar9003_agc_cal(ah); in ar9003_hw_init_cal_soc()
1667 status = do_ar9003_agc_cal(ah); in ar9003_hw_init_cal_soc()
1670 ar9003_hw_tx_iq_cal_post_proc(ah, i, false); in ar9003_hw_init_cal_soc()
1677 ar9003_hw_set_chain_masks(ah, ah->rxchainmask, ah->txchainmask); in ar9003_hw_init_cal_soc()
1679 ar9003_hw_init_cal_common(ah); in ar9003_hw_init_cal_soc()
1684 void ar9003_hw_attach_calib_ops(struct ath_hw *ah) in ar9003_hw_attach_calib_ops() argument
1686 struct ath_hw_private_ops *priv_ops = ath9k_hw_private_ops(ah); in ar9003_hw_attach_calib_ops()
1687 struct ath_hw_ops *ops = ath9k_hw_ops(ah); in ar9003_hw_attach_calib_ops()
1689 if (AR_SREV_9003_PCOEM(ah)) in ar9003_hw_attach_calib_ops()