Lines Matching refs:AR5K_PHY_AGCCTL

1599 	if (ath5k_hw_reg_read(ah, AR5K_PHY_AGCCTL) & AR5K_PHY_AGCCTL_NF) {  in ath5k_hw_update_noise_floor()
1631 	AR5K_REG_MASKED_BITS(ah, AR5K_PHY_AGCCTL, AR5K_PHY_AGCCTL_NF,  in ath5k_hw_update_noise_floor()
1634 	ath5k_hw_register_timeout(ah, AR5K_PHY_AGCCTL, AR5K_PHY_AGCCTL_NF,  in ath5k_hw_update_noise_floor()
1645 	AR5K_REG_ENABLE_BITS(ah, AR5K_PHY_AGCCTL,  in ath5k_hw_update_noise_floor()
1738 	AR5K_REG_ENABLE_BITS(ah, AR5K_PHY_AGCCTL, AR5K_PHY_AGCCTL_CAL);  in ath5k_hw_rf5110_calibrate()
1740 	ret = ath5k_hw_register_timeout(ah, AR5K_PHY_AGCCTL,  in ath5k_hw_rf5110_calibrate()
2217 			AR5K_REG_DISABLE_BITS(ah, AR5K_PHY_AGCCTL,  in ath5k_hw_set_fast_div()
2220 			AR5K_REG_ENABLE_BITS(ah, AR5K_PHY_AGCCTL,  in ath5k_hw_set_fast_div()
2224 		AR5K_REG_ENABLE_BITS(ah, AR5K_PHY_AGCCTL,  in ath5k_hw_set_fast_div()
3837 		AR5K_REG_ENABLE_BITS(ah, AR5K_PHY_AGCCTL,  in ath5k_hw_phy_init()
3932 	AR5K_REG_ENABLE_BITS(ah, AR5K_PHY_AGCCTL,  in ath5k_hw_phy_init()
3948 	if (ath5k_hw_register_timeout(ah, AR5K_PHY_AGCCTL,  in ath5k_hw_phy_init()